Use the external clock input for our PLL.

This may not be a generally valid configuration, but neither is relying
on the PCI clock to be stable.

The only currently known and supported hardware is the VPN14x1 from
Soekris, and since it has external clock, we fail safe(r) by using
it.

Unfortunately there is no way to probe this reliably.

sys/dev/hifn/hifn7751reg.h

@@ -375,7 +375,7 @@ typedef struct hifn_desc {
 /*
  * PLL config register 
  */
-#define	HIFN_PLL_7956		0x00001d18	/* 7956 PLL config value */ 
+#define	HIFN_PLL_7956		0x00001d19	/* 7956 PLL config value */ 
 
 /*********************************************************************
  * Structs for board commands