Add a delta missed in the last iommu.c commit. This unbreaks the sparc64
kernel build. Pointy hat to: tmm
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@ -54,18 +54,20 @@
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*/
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/* iommmu registers */
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struct iommureg {
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u_int64_t iommu_cr; /* IOMMU control register */
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u_int64_t iommu_tsb; /* IOMMU TSB base register */
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u_int64_t iommu_flush; /* IOMMU flush register */
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};
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#define IMR_CTL 0x0000 /* IOMMU control register */
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#define IMR_TSB 0x0008 /* IOMMU TSB base register */
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#define IMR_FLUSH 0x0010 /* IOMMU flush register */
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/* streaming buffer registers */
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struct iommu_strbuf {
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u_int64_t strbuf_ctl; /* streaming buffer control reg */
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u_int64_t strbuf_pgflush; /* streaming buffer page flush */
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u_int64_t strbuf_flushsync;/* streaming buffer flush sync */
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};
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#define ISR_CTL 0x0000 /* streaming buffer control reg */
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#define ISR_PGFLUSH 0x0008 /* streaming buffer page flush */
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#define ISR_FLUSHSYNC 0x0010 /* streaming buffer flush sync */
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/* streaming buffer diagnostics registers. */
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#define ISD_DATA_DIAG 0x0000 /* streaming buffer data RAM diag 0..127 */
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#define ISD_ERROR_DIAG 0x0400 /* streaming buffer error status diag 0..127 */
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#define ISD_PG_TAG_DIAG 0x0800 /* streaming buffer page tag diag 0..15 */
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#define ISD_LN_TAG_DIAG 0x0900 /* streaming buffer line tag diag 0..15 */
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/* streaming buffer control register */
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#define STRBUF_EN 0x0000000000000001UL
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@ -78,6 +80,7 @@ struct iommu_strbuf {
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* control register bits
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*/
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/* Nummber of entries in IOTSB */
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#define IOMMUCR_TSBSZ_SHIFT 16
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#define IOMMUCR_TSB1K 0x0000000000000000UL
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#define IOMMUCR_TSB2K 0x0000000000010000UL
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#define IOMMUCR_TSB4K 0x0000000000020000UL
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@ -116,6 +119,15 @@ struct iommu_strbuf {
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/* Writeable */
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#define IOTTE_W 0x0000000000000002UL
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/* log2 of the IOMMU TTE size. */
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#define IOTTE_SHIFT 3
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/*
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* Number of bytes written by a stream buffer flushsync operation to indicate
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* completion.
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*/
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#define STRBUF_FLUSHSYNC_NBYTES 64
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/*
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* On sun4u each bus controller has a separate IOMMU. The IOMMU has
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* a TSB which must be page aligned and physically contiguous. Mappings
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@ -143,7 +155,7 @@ struct iommu_strbuf {
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*
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*/
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#define IOTSB_VEND (~PAGE_MASK)
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#define IOTSB_VEND (~IO_PAGE_MASK)
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#define IOTSB_VSTART(sz) (u_int)(IOTSB_VEND << ((sz) + 10))
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#define MAKEIOTTE(pa,w,c,s) \
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@ -151,6 +163,6 @@ struct iommu_strbuf {
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((c) ? IOTTE_C : 0) | ((s) ? IOTTE_STREAM : 0) | \
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(IOTTE_V | IOTTE_8K))
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#define IOTSBSLOT(va,sz) \
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((u_int)(((vm_offset_t)(va)) - (is->is_dvmabase)) >> PAGE_SHIFT)
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((u_int)(((vm_offset_t)(va)) - (is->is_dvmabase)) >> IO_PAGE_SHIFT)
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#endif /* !_MACHINE_IOMMUREG_H_ */
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