- Fix BCM5754 support found in Dell PowerEdge SC440.
- Move some PHY bug detections from brgphy.c to if_bge.c. - Do not penalize working PHYs. - Re-arrange bge_flags roughly by their categories. - Fix minor style(9) nits. PR: kern/107257 Obtained from: OpenBSD Tested by: Mike Hibler <mike at flux dot utah dot edu>
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@ -1686,7 +1686,7 @@ bge_probe(device_t dev)
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br != NULL ? "" : "unknown ", id >> 16);
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device_set_desc_copy(dev, buf);
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if (pci_get_subvendor(dev) == DELL_VENDORID)
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sc->bge_flags |= BGE_FLAG_NO3LED;
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sc->bge_flags |= BGE_FLAG_NO_3LED;
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return (0);
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}
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t++;
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@ -2197,25 +2197,36 @@ bge_attach(device_t dev)
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case BGE_ASICREV_BCM5704:
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sc->bge_flags |= BGE_FLAG_5700_FAMILY | BGE_FLAG_JUMBO;
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break;
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case BGE_ASICREV_BCM5714_A0:
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case BGE_ASICREV_BCM5780:
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case BGE_ASICREV_BCM5714:
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sc->bge_flags |= BGE_FLAG_5714_FAMILY /* | BGE_FLAG_JUMBO */;
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/* Fall through */
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/* FALLTHRU */
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case BGE_ASICREV_BCM5750:
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case BGE_ASICREV_BCM5752:
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case BGE_ASICREV_BCM5755:
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case BGE_ASICREV_BCM5787:
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sc->bge_flags |= BGE_FLAG_575X_PLUS;
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/* Fall through */
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/* FALLTHRU */
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case BGE_ASICREV_BCM5705:
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sc->bge_flags |= BGE_FLAG_5705_PLUS;
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break;
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}
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/* Set various bug flags. */
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if (sc->bge_chiprev == BGE_CHIPREV_5703_AX ||
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sc->bge_chiprev == BGE_CHIPREV_5704_AX)
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sc->bge_flags |= BGE_FLAG_ADC_BUG;
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if (sc->bge_chipid == BGE_CHIPID_BCM5704_A0)
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sc->bge_flags |= BGE_FLAG_5704_A0_BUG;
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if (BGE_IS_5705_PLUS(sc)) {
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if (sc->bge_asicrev == BGE_ASICREV_BCM5755 ||
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sc->bge_asicrev == BGE_ASICREV_BCM5787)
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sc->bge_flags |= BGE_FLAG_JITTER_BUG;
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else
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sc->bge_flags |= BGE_FLAG_BER_BUG;
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}
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/*
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* Check if this is a PCI-X or PCI Express device.
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*/
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@ -4190,7 +4201,7 @@ bge_sysctl_debug_info(SYSCTL_HANDLER_ARGS)
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printf(" - PCI-X Bus\n");
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if (sc->bge_flags & BGE_FLAG_PCIE)
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printf(" - PCI Express Bus\n");
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if (sc->bge_flags & BGE_FLAG_NO3LED)
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if (sc->bge_flags & BGE_FLAG_NO_3LED)
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printf(" - No 3 LEDs\n");
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if (sc->bge_flags & BGE_FLAG_RX_ALIGNBUG)
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printf(" - RX Alignment Bug\n");
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@ -303,6 +303,9 @@
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#define BGE_CHIPREV_5700_BX 0x71
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#define BGE_CHIPREV_5700_CX 0x72
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#define BGE_CHIPREV_5701_AX 0x00
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#define BGE_CHIPREV_5703_AX 0x10
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#define BGE_CHIPREV_5704_AX 0x20
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#define BGE_CHIPREV_5704_BX 0x21
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#define BGE_CHIPREV_5750_AX 0x40
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#define BGE_CHIPREV_5750_BX 0x41
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@ -2445,18 +2448,21 @@ struct bge_softc {
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struct resource *bge_res;
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struct ifmedia bge_ifmedia; /* TBI media info */
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uint32_t bge_flags;
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#define BGE_FLAG_EXTRAM 0x00000001 /* External SSRAM (unused) */
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#define BGE_FLAG_TBI 0x00000002
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#define BGE_FLAG_RX_ALIGNBUG 0x00000004
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#define BGE_FLAG_NO3LED 0x00000008
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#define BGE_FLAG_PCIX 0x00000010
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#define BGE_FLAG_PCIE 0x00000020
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#define BGE_FLAG_JUMBO 0x00000040
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#define BGE_FLAG_5700_FAMILY 0x00000100
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#define BGE_FLAG_5705_PLUS 0x00000200
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#define BGE_FLAG_5714_FAMILY 0x00000400
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#define BGE_FLAG_575X_PLUS 0x00000800
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#define BGE_FLAG_MSI 0x00001000
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#define BGE_FLAG_TBI 0x00000001
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#define BGE_FLAG_JUMBO 0x00000002
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#define BGE_FLAG_MSI 0x00000100
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#define BGE_FLAG_PCIX 0x00000200
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#define BGE_FLAG_PCIE 0x00000400
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#define BGE_FLAG_5700_FAMILY 0x00001000
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#define BGE_FLAG_5705_PLUS 0x00002000
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#define BGE_FLAG_5714_FAMILY 0x00004000
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#define BGE_FLAG_575X_PLUS 0x00008000
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#define BGE_FLAG_RX_ALIGNBUG 0x00100000
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#define BGE_FLAG_NO_3LED 0x00200000
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#define BGE_FLAG_ADC_BUG 0x00400000
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#define BGE_FLAG_5704_A0_BUG 0x00800000
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#define BGE_FLAG_JITTER_BUG 0x01000000
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#define BGE_FLAG_BER_BUG 0x02000000
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uint32_t bge_chipid;
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uint8_t bge_asicrev;
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uint8_t bge_chiprev;
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@ -93,9 +93,12 @@ static void brgphy_reset(struct mii_softc *);
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static void brgphy_loop(struct mii_softc *);
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static void bcm5401_load_dspcode(struct mii_softc *);
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static void bcm5411_load_dspcode(struct mii_softc *);
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static void bcm5703_load_dspcode(struct mii_softc *);
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static void bcm5750_load_dspcode(struct mii_softc *);
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static void brgphy_fixup_adc_bug(struct mii_softc *);
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static void brgphy_fixup_5704_a0_bug(struct mii_softc *);
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static void brgphy_fixup_ber_bug(struct mii_softc *);
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static void brgphy_fixup_jitter_bug(struct mii_softc *);
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static int brgphy_mii_model;
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static int brgphy_mii_rev;
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static const struct mii_phydesc brgphys[] = {
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MII_PHY_DESC(xxBROADCOM, BCM5400),
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@ -112,6 +115,7 @@ static const struct mii_phydesc brgphys[] = {
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MII_PHY_DESC(xxBROADCOM, BCM5752),
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MII_PHY_DESC(xxBROADCOM, BCM5754),
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MII_PHY_DESC(xxBROADCOM, BCM5780),
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MII_PHY_DESC(xxBROADCOM_ALT1, BCM5787),
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MII_PHY_END
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};
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@ -158,6 +162,7 @@ brgphy_attach(device_t dev)
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#endif
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brgphy_mii_model = MII_MODEL(ma->mii_id2);
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brgphy_mii_rev = MII_REV(ma->mii_id2);
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brgphy_reset(sc);
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sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & ma->mii_capmask;
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@ -303,7 +308,10 @@ brgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
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cmd == MII_MEDIACHG) {
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switch (brgphy_mii_model) {
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case MII_MODEL_xxBROADCOM_BCM5400:
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bcm5401_load_dspcode(sc);
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break;
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case MII_MODEL_xxBROADCOM_BCM5401:
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if (brgphy_mii_rev == 1 || brgphy_mii_rev == 3)
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bcm5401_load_dspcode(sc);
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break;
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case MII_MODEL_xxBROADCOM_BCM5411:
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@ -515,7 +523,7 @@ bcm5411_load_dspcode(struct mii_softc *sc)
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}
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static void
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bcm5703_load_dspcode(struct mii_softc *sc)
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brgphy_fixup_adc_bug(struct mii_softc *sc)
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{
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static const struct {
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int reg;
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@ -533,7 +541,7 @@ bcm5703_load_dspcode(struct mii_softc *sc)
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}
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static void
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bcm5704_load_dspcode(struct mii_softc *sc)
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brgphy_fixup_5704_a0_bug(struct mii_softc *sc)
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{
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static const struct {
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int reg;
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@ -550,7 +558,7 @@ bcm5704_load_dspcode(struct mii_softc *sc)
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}
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static void
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bcm5750_load_dspcode(struct mii_softc *sc)
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brgphy_fixup_ber_bug(struct mii_softc *sc)
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{
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static const struct {
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int reg;
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@ -572,6 +580,25 @@ bcm5750_load_dspcode(struct mii_softc *sc)
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PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
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}
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static void
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brgphy_fixup_jitter_bug(struct mii_softc *sc)
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{
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static const struct {
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int reg;
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uint16_t val;
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} dspcode[] = {
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{ BRGPHY_MII_AUXCTL, 0x0c00 },
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{ BRGPHY_MII_DSP_ADDR_REG, 0x000a },
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{ BRGPHY_MII_DSP_RW_PORT, 0x010b },
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{ BRGPHY_MII_AUXCTL, 0x0400 },
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{ 0, 0 },
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};
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int i;
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for (i = 0; dspcode[i].reg != 0; i++)
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PHY_WRITE(sc, dspcode[i].reg, dspcode[i].val);
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}
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static void
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brgphy_reset(struct mii_softc *sc)
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{
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@ -584,26 +611,15 @@ brgphy_reset(struct mii_softc *sc)
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switch (brgphy_mii_model) {
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case MII_MODEL_xxBROADCOM_BCM5400:
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bcm5401_load_dspcode(sc);
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break;
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case MII_MODEL_xxBROADCOM_BCM5401:
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if (brgphy_mii_rev == 1 || brgphy_mii_rev == 3)
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bcm5401_load_dspcode(sc);
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break;
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case MII_MODEL_xxBROADCOM_BCM5411:
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bcm5411_load_dspcode(sc);
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break;
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case MII_MODEL_xxBROADCOM_BCM5703:
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bcm5703_load_dspcode(sc);
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break;
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case MII_MODEL_xxBROADCOM_BCM5704:
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bcm5704_load_dspcode(sc);
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break;
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case MII_MODEL_xxBROADCOM_BCM5750:
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case MII_MODEL_xxBROADCOM_BCM5752:
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case MII_MODEL_xxBROADCOM_BCM5714:
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case MII_MODEL_xxBROADCOM_BCM5780:
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case MII_MODEL_xxBROADCOM_BCM5706C:
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case MII_MODEL_xxBROADCOM_BCM5708C:
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bcm5750_load_dspcode(sc);
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break;
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}
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ifp = sc->mii_pdata->mii_ifp;
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@ -634,11 +650,21 @@ brgphy_reset(struct mii_softc *sc)
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PHY_WRITE(sc, BRGPHY_MII_AUXCTL, val | (1 << 15) | (1 << 4));
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/* Enable Link LED on Dell boxes */
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if (bge_sc->bge_flags & BGE_FLAG_NO3LED) {
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if (bge_sc->bge_flags & BGE_FLAG_NO_3LED) {
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PHY_WRITE(sc, BRGPHY_MII_PHY_EXTCTL,
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PHY_READ(sc, BRGPHY_MII_PHY_EXTCTL) &
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~BRGPHY_PHY_EXTCTL_3_LED);
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}
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/* Fix up various bugs */
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if (bge_sc->bge_flags & BGE_FLAG_ADC_BUG)
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brgphy_fixup_adc_bug(sc);
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if (bge_sc->bge_flags & BGE_FLAG_5704_A0_BUG)
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brgphy_fixup_5704_a0_bug(sc);
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if (bge_sc->bge_flags & BGE_FLAG_BER_BUG)
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brgphy_fixup_ber_bug(sc);
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if (bge_sc->bge_flags & BGE_FLAG_JITTER_BUG)
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brgphy_fixup_jitter_bug(sc);
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} else if (bce_sc) {
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/* Set or clear jumbo frame settings in the PHY. */
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if (ifp->if_mtu > ETHER_MAX_LEN) {
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@ -131,6 +131,7 @@ model xxBROADCOM BCM5714 0x0034 BCM5714 10/100/1000baseTX PHY
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model xxBROADCOM BCM5780 0x0035 BCM5780 10/100/1000baseTX PHY
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model xxBROADCOM BCM5706C 0x0015 BCM5706C 10/100/1000baseTX PHY
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model xxBROADCOM BCM5708C 0x0036 BCM5708C 10/100/1000baseTX PHY
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model xxBROADCOM_ALT1 BCM5787 0x000e BCM5787 10/100/1000baseTX PHY
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/* Cicada Semiconductor PHYs (now owned by Vitesse?) */
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model CICADA CS8201 0x0001 Cicada CS8201 10/100/1000TX PHY
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