Fix reversed condition in the logic to wait for the chipset buffers
flush wait on the Gen2 chipsets. Confirmed by the inspection of the Linux agp code. Submitted by: Taku YAMAMOTO <taku@tackymt.homeip.net> MFC after: 2 weeks
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@ -2228,7 +2228,7 @@ agp_i830_chipset_flush(device_t dev)
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bus_write_4(sc->sc_res[0], AGP_I830_HIC, hic | (1 << 31));
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for (i = 0; i < 20000 /* 1 sec */; i++) {
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hic = bus_read_4(sc->sc_res[0], AGP_I830_HIC);
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if ((hic & (1 << 31)) != 0)
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if ((hic & (1 << 31)) == 0)
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break;
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DELAY(50);
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}
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