Cleanup the interrupt code that deals with the busmaster bits.

This commit is contained in:
Søren Schmidt 2003-10-28 21:08:14 +00:00
parent 5e17543a23
commit 60279a3808

View File

@ -139,18 +139,19 @@ ata_generic_intr(void *data)
{ {
struct ata_pci_controller *ctlr = data; struct ata_pci_controller *ctlr = data;
struct ata_channel *ch; struct ata_channel *ch;
u_int8_t dmastat;
int unit; int unit;
/* implement this as a toggle instead to balance load XXX */ /* implement this as a toggle instead to balance load XXX */
for (unit = 0; unit < 2; unit++) { for (unit = 0; unit < 2; unit++) {
if (!(ch = ctlr->interrupt[unit].argument)) if (!(ch = ctlr->interrupt[unit].argument))
continue; continue;
if (ch->dma->flags & ATA_DMA_ACTIVE) { if (ch->dma) {
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
ATA_BMSTAT_INTERRUPT)
continue; continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT); ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
DELAY(1); DELAY(1);
} }
ctlr->interrupt[unit].function(ch); ctlr->interrupt[unit].function(ch);
@ -223,22 +224,24 @@ ata_acard_intr(void *data)
{ {
struct ata_pci_controller *ctlr = data; struct ata_pci_controller *ctlr = data;
struct ata_channel *ch; struct ata_channel *ch;
u_int8_t dmastat;
int unit; int unit;
/* implement this as a toggle instead to balance load XXX */ /* implement this as a toggle instead to balance load XXX */
for (unit = 0; unit < 2; unit++) { for (unit = 0; unit < 2; unit++) {
if (ctlr->chip->cfg1 == ATPOLD && ctlr->locked_ch != unit) if (ctlr->chip->cfg1 == ATPOLD && ctlr->locked_ch != unit)
continue;
if (!(ch = ctlr->interrupt[unit].argument))
continue;
if (ch->dma) {
int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
ATA_BMSTAT_INTERRUPT)
continue; continue;
ch = ctlr->interrupt[unit].argument; ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
if (ch->dma->flags & ATA_DMA_ACTIVE) {
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT);
DELAY(1); DELAY(1);
ATA_IDX_OUTB(ch, ATA_BMCMD_PORT, ATA_IDX_OUTB(ch, ATA_BMCMD_PORT,
ATA_IDX_INB(ch, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); ATA_IDX_INB(ch, ATA_BMCMD_PORT)&~ATA_BMCMD_START_STOP);
DELAY(1); DELAY(1);
} }
ctlr->interrupt[unit].function(ch); ctlr->interrupt[unit].function(ch);
@ -678,18 +681,21 @@ ata_highpoint_intr(void *data)
{ {
struct ata_pci_controller *ctlr = data; struct ata_pci_controller *ctlr = data;
struct ata_channel *ch; struct ata_channel *ch;
u_int8_t dmastat;
int unit; int unit;
/* implement this as a toggle instead to balance load XXX */ /* implement this as a toggle instead to balance load XXX */
for (unit = 0; unit < 2; unit++) { for (unit = 0; unit < 2; unit++) {
if (!(ch = ctlr->interrupt[unit].argument)) if (!(ch = ctlr->interrupt[unit].argument))
continue; continue;
if (((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK)) & if (ch->dma) {
(ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT))!=ATA_BMSTAT_INTERRUPT) int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
DELAY(1); ATA_BMSTAT_INTERRUPT)
continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
DELAY(1);
}
ctlr->interrupt[unit].function(ch); ctlr->interrupt[unit].function(ch);
} }
} }
@ -1210,7 +1216,6 @@ ata_promise_old_intr(void *data)
{ {
struct ata_pci_controller *ctlr = data; struct ata_pci_controller *ctlr = data;
struct ata_channel *ch; struct ata_channel *ch;
u_int8_t dmastat;
int unit; int unit;
/* implement this as a toggle instead to balance load XXX */ /* implement this as a toggle instead to balance load XXX */
@ -1218,11 +1223,13 @@ ata_promise_old_intr(void *data)
if (!(ch = ctlr->interrupt[unit].argument)) if (!(ch = ctlr->interrupt[unit].argument))
continue; continue;
if (ATA_INL(ctlr->r_io1, 0x1c) & (ch->unit ? 0x00004000 : 0x00000400)) { if (ATA_INL(ctlr->r_io1, 0x1c) & (ch->unit ? 0x00004000 : 0x00000400)) {
if (ch->dma->flags & ATA_DMA_ACTIVE) { if (ch->dma) {
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
ATA_BMSTAT_INTERRUPT)
continue; continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT); ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
DELAY(1); DELAY(1);
} }
ctlr->interrupt[unit].function(ch); ctlr->interrupt[unit].function(ch);
@ -1235,7 +1242,6 @@ ata_promise_tx2_intr(void *data)
{ {
struct ata_pci_controller *ctlr = data; struct ata_pci_controller *ctlr = data;
struct ata_channel *ch; struct ata_channel *ch;
u_int8_t dmastat;
int unit; int unit;
/* implement this as a toggle instead to balance load XXX */ /* implement this as a toggle instead to balance load XXX */
@ -1244,11 +1250,13 @@ ata_promise_tx2_intr(void *data)
continue; continue;
ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b); ATA_IDX_OUTB(ch, ATA_BMDEVSPEC_0, 0x0b);
if (ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x20) { if (ATA_IDX_INB(ch, ATA_BMDEVSPEC_1) & 0x20) {
if (ch->dma->flags & ATA_DMA_ACTIVE) { if (ch->dma) {
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
ATA_BMSTAT_INTERRUPT)
continue; continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT); ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
DELAY(1); DELAY(1);
} }
ctlr->interrupt[unit].function(ch); ctlr->interrupt[unit].function(ch);
@ -1668,7 +1676,6 @@ ata_sii_intr(void *data)
{ {
struct ata_pci_controller *ctlr = data; struct ata_pci_controller *ctlr = data;
struct ata_channel *ch; struct ata_channel *ch;
u_int8_t dmastat;
int unit; int unit;
/* implement this as a toggle instead to balance load XXX */ /* implement this as a toggle instead to balance load XXX */
@ -1676,11 +1683,13 @@ ata_sii_intr(void *data)
if (!(ch = ctlr->interrupt[unit].argument)) if (!(ch = ctlr->interrupt[unit].argument))
continue; continue;
if (ATA_IDX_INB(ch, ATA_BMDEVSPEC_0) & 0x08) { if (ATA_IDX_INB(ch, ATA_BMDEVSPEC_0) & 0x08) {
if (ch->dma->flags & ATA_DMA_ACTIVE) { if (ch->dma) {
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT))
if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
ATA_BMSTAT_INTERRUPT)
continue; continue;
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat|ATA_BMSTAT_INTERRUPT); ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
DELAY(1); DELAY(1);
} }
ctlr->interrupt[unit].function(ch); ctlr->interrupt[unit].function(ch);
@ -1693,26 +1702,28 @@ ata_cmd_intr(void *data)
{ {
struct ata_pci_controller *ctlr = data; struct ata_pci_controller *ctlr = data;
struct ata_channel *ch; struct ata_channel *ch;
u_int8_t dmastat, reg71; u_int8_t reg71;
int unit; int unit;
/* implement this as a toggle instead to balance load XXX */ /* implement this as a toggle instead to balance load XXX */
for (unit = 0; unit < 2; unit++) { for (unit = 0; unit < 2; unit++) {
if (!(ch = ctlr->interrupt[unit].argument)) if (!(ch = ctlr->interrupt[unit].argument))
continue; continue;
if (!((reg71 = pci_read_config(device_get_parent(ch->dev), 0x71, 1)) & if (((reg71 = pci_read_config(device_get_parent(ch->dev), 0x71, 1)) &
(ch->unit ? 0x08 : 0x04))) (ch->unit ? 0x08 : 0x04))) {
continue; pci_write_config(device_get_parent(ch->dev), 0x71,
pci_write_config(device_get_parent(ch->dev), 0x71, reg71 & ~(ch->unit ? 0x04 : 0x08), 1);
reg71 & ~(ch->unit ? 0x04 : 0x08), 1); if (ch->dma) {
if (ch->dma->flags & ATA_DMA_ACTIVE) { int bmstat = ATA_IDX_INB(ch, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK;
if (!((dmastat = (ATA_IDX_INB(ch, ATA_BMSTAT_PORT) &
ATA_BMSTAT_MASK)) & ATA_BMSTAT_INTERRUPT)) if ((bmstat & (ATA_BMSTAT_ACTIVE | ATA_BMSTAT_INTERRUPT)) !=
continue; ATA_BMSTAT_INTERRUPT)
ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, dmastat | ATA_BMSTAT_INTERRUPT); continue;
DELAY(1); ATA_IDX_OUTB(ch, ATA_BMSTAT_PORT, bmstat & ~ATA_BMSTAT_ERROR);
DELAY(1);
}
ctlr->interrupt[unit].function(ch);
} }
ctlr->interrupt[unit].function(ch);
} }
} }