- Don't use a separate set of rx queues for UDP, hash them into the same
set as TCP. - Eliminate the fully linear non-scatter/gather rx path, there is no harm in using arrays of clusters for both TCP and UDP. - Implement support for enabling/disabling per-vlan priority pause and queues via sysctl.
This commit is contained in:
Jeff Roberson
parent
a17878b872
commit
6146335abb
@ -236,9 +236,8 @@ static void *mlx4_en_add(struct mlx4_dev *dev)
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mlx4_info(mdev, "Using %d tx rings for port:%d\n",
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mdev->profile.prof[i].tx_ring_num, i);
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mdev->profile.prof[i].rx_ring_num = rounddown_pow_of_two(
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min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS/2)) +
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(mdev->profile.udp_rss ? rounddown_pow_of_two(
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min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS/2)) : 1);
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min_t(int, dev->caps.num_comp_vectors, MAX_RX_RINGS));
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mlx4_info(mdev, "Defaulting to %d rx rings for port:%d\n",
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mdev->profile.prof[i].rx_ring_num, i);
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}
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@ -277,10 +277,7 @@ static void mlx4_en_netpoll(struct net_device *dev)
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cq = &priv->rx_cq[i];
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spin_lock_irqsave(&cq->lock, flags);
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napi_synchronize(&cq->napi);
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if (priv->rx_ring[i].use_frags)
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mlx4_en_process_rx_cq(dev, cq, 0);
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else
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mlx4_en_process_rx_cq_mb(dev, cq, 0);
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mlx4_en_process_rx_cq(dev, cq, 0);
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spin_unlock_irqrestore(&cq->lock, flags);
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}
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}
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@ -866,10 +863,6 @@ int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
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prof->rx_ring_size, i, RX))
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goto err;
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if (i > priv->rx_ring_num - priv->udp_rings - 1)
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priv->rx_ring[i].use_frags = 0;
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else
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priv->rx_ring[i].use_frags = 1;
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if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
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prof->rx_ring_size))
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goto err;
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@ -880,7 +873,7 @@ int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
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/* Populate Tx priority mappings */
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mlx4_en_set_prio_map(priv, priv->tx_prio_map,
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prof->tx_ring_num - MLX4_EN_NUM_HASH_RINGS);
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priv->tx_ring_num - MLX4_EN_NUM_HASH_RINGS);
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return 0;
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@ -1193,6 +1186,83 @@ static int mlx4_en_set_tx_ring_size(SYSCTL_HANDLER_ARGS)
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return (error);
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}
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static int mlx4_en_set_tx_ppp(SYSCTL_HANDLER_ARGS)
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{
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struct mlx4_en_priv *priv;
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int ppp;
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int error;
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priv = arg1;
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ppp = priv->prof->tx_ppp;
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error = sysctl_handle_int(oidp, &ppp, 0, req);
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if (error || !req->newptr)
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return (error);
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if (ppp > 0xff || ppp < 0)
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return (-EINVAL);
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priv->prof->tx_ppp = ppp;
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error = -mlx4_SET_PORT_general(priv->mdev->dev, priv->port,
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priv->rx_mb_size + ETHER_CRC_LEN,
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priv->prof->tx_pause,
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priv->prof->tx_ppp,
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priv->prof->rx_pause,
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priv->prof->rx_ppp);
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return (error);
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}
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static int mlx4_en_set_rx_ppp(SYSCTL_HANDLER_ARGS)
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{
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struct mlx4_en_priv *priv;
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struct mlx4_en_dev *mdev;
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int tx_ring_num;
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int ppp;
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int error;
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int port_up;
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port_up = 0;
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priv = arg1;
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mdev = priv->mdev;
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ppp = priv->prof->rx_ppp;
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error = sysctl_handle_int(oidp, &ppp, 0, req);
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if (error || !req->newptr)
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return (error);
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if (ppp > 0xff || ppp < 0)
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return (-EINVAL);
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/* See if we have to change the number of tx queues. */
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if (!ppp != !priv->prof->rx_ppp) {
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tx_ring_num = MLX4_EN_NUM_HASH_RINGS + 1 +
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(!!ppp) * MLX4_EN_NUM_PPP_RINGS;
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mutex_lock(&mdev->state_lock);
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if (priv->port_up) {
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port_up = 1;
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mlx4_en_stop_port(priv->dev);
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}
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mlx4_en_free_resources(priv);
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priv->tx_ring_num = tx_ring_num;
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priv->prof->rx_ppp = ppp;
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error = -mlx4_en_alloc_resources(priv);
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if (error)
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en_err(priv, "Failed reallocating port resources\n");
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if (error == 0 && port_up) {
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error = -mlx4_en_start_port(priv->dev);
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if (error)
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en_err(priv, "Failed starting port\n");
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}
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mutex_unlock(&mdev->state_lock);
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return (error);
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}
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priv->prof->rx_ppp = ppp;
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error = -mlx4_SET_PORT_general(priv->mdev->dev, priv->port,
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priv->rx_mb_size + ETHER_CRC_LEN,
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priv->prof->tx_pause,
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priv->prof->tx_ppp,
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priv->prof->rx_pause,
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priv->prof->rx_ppp);
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return (error);
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}
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static void mlx4_en_sysctl_conf(struct mlx4_en_priv *priv)
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{
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struct net_device *dev;
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@ -1222,14 +1292,20 @@ static void mlx4_en_sysctl_conf(struct mlx4_en_priv *priv)
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CTLTYPE_INT | CTLFLAG_RD, &priv->tx_ring_num, 0,
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"Number of transmit rings");
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SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "rx_size",
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CTLTYPE_INT | CTLFLAG_RW, priv, 0, mlx4_en_set_rx_ring_size, "I",
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"Receive ring size");
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CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
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mlx4_en_set_rx_ring_size, "I", "Receive ring size");
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SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "tx_size",
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CTLTYPE_INT | CTLFLAG_RW, priv, 0, mlx4_en_set_tx_ring_size, "I",
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"Transmit ring size");
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CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
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mlx4_en_set_tx_ring_size, "I", "Transmit ring size");
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SYSCTL_ADD_UINT(ctx, node_list, OID_AUTO, "ip_reasm",
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CTLFLAG_RD, &priv->mdev->profile.ip_reasm, 0,
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CTLFLAG_RW, &priv->ip_reasm, 0,
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"Allow reassembly of IP fragments.");
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SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "tx_ppp",
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CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
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mlx4_en_set_tx_ppp, "I", "TX Per-priority pause");
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SYSCTL_ADD_PROC(ctx, node_list, OID_AUTO, "rx_ppp",
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CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, priv, 0,
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mlx4_en_set_rx_ppp, "I", "RX Per-priority pause");
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/* Add coalescer configuration. */
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coal = SYSCTL_ADD_NODE(ctx, node_list, OID_AUTO,
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@ -1416,9 +1492,9 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
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priv->flags = prof->flags;
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priv->tx_ring_num = prof->tx_ring_num;
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priv->rx_ring_num = prof->rx_ring_num;
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priv->udp_rings = mdev->profile.udp_rss ? prof->rx_ring_num / 2 : 1;
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priv->mac_index = -1;
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priv->msg_enable = MLX4_EN_MSG_LEVEL;
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priv->ip_reasm = priv->mdev->profile.ip_reasm;
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mtx_init(&priv->stats_lock.m, "mlx4 stats", NULL, MTX_DEF);
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mtx_init(&priv->vlan_lock.m, "mlx4 vlan", NULL, MTX_DEF);
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INIT_WORK(&priv->mcast_task, mlx4_en_do_set_multicast);
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@ -69,16 +69,6 @@ static int mlx4_en_alloc_buf(struct mlx4_en_priv *priv,
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return 0;
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}
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static void
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mlx4_en_init_rx_desc_mb(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_ring *ring, int index)
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{
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struct mlx4_en_rx_desc *rx_desc = ring->buf + ring->stride * index;
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rx_desc->data->byte_count = cpu_to_be32(priv->rx_mb_size);
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rx_desc->data->lkey = cpu_to_be32(priv->mdev->mr.key);
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}
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static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_ring *ring, int index)
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{
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@ -104,42 +94,6 @@ static void mlx4_en_init_rx_desc(struct mlx4_en_priv *priv,
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}
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}
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static int
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mlx4_en_alloc_rx_mb(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_desc *rx_desc,
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struct mbuf **pmb, int unmap)
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{
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struct mlx4_en_dev *mdev = priv->mdev;
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dma_addr_t dma;
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int size = priv->rx_mb_size;
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struct mbuf *new_mb;
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new_mb = m_getjcl(M_NOWAIT, MT_DATA, M_PKTHDR, size);
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if (unlikely(new_mb == NULL)) {
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priv->port_stats.rx_alloc_failed++;
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return -ENOMEM;
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}
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if (unmap)
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pci_unmap_single(mdev->pdev, be64_to_cpu(rx_desc->data->addr),
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be32_to_cpu(rx_desc->data->byte_count),
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PCI_DMA_FROMDEVICE);
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dma = pci_map_single(priv->mdev->pdev, new_mb->m_data, size, DMA_FROM_DEVICE);
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*pmb = new_mb;
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rx_desc->data->addr = cpu_to_be64(dma);
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return 0;
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}
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static int
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mlx4_en_prepare_rx_desc_mb(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_ring *ring, int index)
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{
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struct mlx4_en_rx_desc *rx_desc = ring->buf + (index * ring->stride);
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struct mbuf **pmb = (struct mbuf **) ring->rx_info + index;
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return mlx4_en_alloc_rx_mb(priv, rx_desc, pmb, 0);
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}
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static int mlx4_en_prepare_rx_desc(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_ring *ring, int index)
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{
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@ -171,30 +125,20 @@ static void mlx4_en_free_rx_desc(struct mlx4_en_priv *priv,
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struct mlx4_en_frag_info *frag_info;
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struct mlx4_en_dev *mdev = priv->mdev;
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struct mbuf **mb_list;
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struct mbuf *mb;
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struct mlx4_en_rx_desc *rx_desc = ring->buf + (index << ring->log_stride);
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dma_addr_t dma;
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int nr;
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if (ring->use_frags) {
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mb_list = ring->rx_info + (index << priv->log_rx_info);
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for (nr = 0; nr < priv->num_frags; nr++) {
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en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
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frag_info = &priv->frag_info[nr];
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dma = be64_to_cpu(rx_desc->data[nr].addr);
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mb_list = ring->rx_info + (index << priv->log_rx_info);
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for (nr = 0; nr < priv->num_frags; nr++) {
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en_dbg(DRV, priv, "Freeing fragment:%d\n", nr);
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frag_info = &priv->frag_info[nr];
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dma = be64_to_cpu(rx_desc->data[nr].addr);
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en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
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pci_unmap_single(mdev->pdev, dma, frag_info->frag_size,
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PCI_DMA_FROMDEVICE);
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m_free(mb_list[nr]);
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}
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} else {
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mb = *((struct mbuf **) ring->rx_info + index);
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dma = be64_to_cpu(rx_desc->data->addr);
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pci_unmap_single(mdev->pdev, dma,
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priv->rx_mb_size,
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en_dbg(DRV, priv, "Unmaping buffer at dma:0x%llx\n", (u64) dma);
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pci_unmap_single(mdev->pdev, dma, frag_info->frag_size,
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PCI_DMA_FROMDEVICE);
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m_free(mb);
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m_free(mb_list[nr]);
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}
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}
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@ -210,12 +154,8 @@ static int mlx4_en_fill_rx_buffers(struct mlx4_en_priv *priv)
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for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++) {
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ring = &priv->rx_ring[ring_ind];
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if (ring->use_frags)
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err = mlx4_en_prepare_rx_desc(priv, ring,
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ring->actual_size);
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else
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err = mlx4_en_prepare_rx_desc_mb(priv, ring,
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ring->actual_size);
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err = mlx4_en_prepare_rx_desc(priv, ring,
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ring->actual_size);
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if (err) {
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if (ring->actual_size == 0) {
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en_err(priv, "Failed to allocate "
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@ -280,16 +220,12 @@ int mlx4_en_create_rx_ring(struct mlx4_en_priv *priv,
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ring->size = size;
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ring->size_mask = size - 1;
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ring->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
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DS_SIZE * (ring->use_frags ?
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MLX4_EN_MAX_RX_FRAGS : 1));
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DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
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ring->log_stride = ffs(ring->stride) - 1;
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ring->buf_size = ring->size * ring->stride + TXBB_SIZE;
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if (ring->use_frags)
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tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
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sizeof(struct mbuf *));
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else
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tmp = size * sizeof(struct mbuf *);
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tmp = size * roundup_pow_of_two(MLX4_EN_MAX_RX_FRAGS *
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sizeof(struct mbuf *));
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ring->rx_info = kmalloc(tmp, GFP_KERNEL);
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if (!ring->rx_info) {
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@ -338,9 +274,7 @@ int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
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ring->cons = 0;
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ring->actual_size = 0;
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ring->cqn = priv->rx_cq[ring_ind].mcq.cqn;
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if (ring->use_frags)
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ring->stride = stride;
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ring->stride = stride;
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if (ring->stride <= TXBB_SIZE)
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ring->buf += TXBB_SIZE;
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@ -350,14 +284,9 @@ int mlx4_en_activate_rx_rings(struct mlx4_en_priv *priv)
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memset(ring->buf, 0, ring->buf_size);
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mlx4_en_update_rx_prod_db(ring);
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if (ring->use_frags) {
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/* Initailize all descriptors */
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for (i = 0; i < ring->size; i++)
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mlx4_en_init_rx_desc(priv, ring, i);
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} else {
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for (i = 0; i < ring->size; i++)
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mlx4_en_init_rx_desc_mb(priv, ring, i);
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}
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/* Initailize all descriptors */
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for (i = 0; i < ring->size; i++)
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mlx4_en_init_rx_desc(priv, ring, i);
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/* Configure lro mngr */
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if (priv->dev->if_capenable & IFCAP_LRO) {
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if (tcp_lro_init(&ring->lro))
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@ -384,7 +313,6 @@ err_buffers:
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for (ring_ind = 0; ring_ind < priv->rx_ring_num; ring_ind++)
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mlx4_en_free_rx_buf(priv, &priv->rx_ring[ring_ind]);
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ring_ind = priv->rx_ring_num - 1;
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return err;
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}
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@ -458,21 +386,6 @@ fail:
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}
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static struct mbuf *mlx4_en_rx_mb(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_desc *rx_desc,
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struct mbuf **mb_list,
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unsigned int length)
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{
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struct mbuf *mb;
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mb = mb_list[0];
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/* Move relevant fragments to mb */
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if (unlikely(mlx4_en_complete_rx_desc(priv, rx_desc, mb_list, length)))
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return NULL;
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return mb;
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}
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static inline int invalid_cqe(struct mlx4_en_priv *priv,
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struct mlx4_cqe *cqe)
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{
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@ -493,40 +406,6 @@ static inline int invalid_cqe(struct mlx4_en_priv *priv,
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return 0;
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}
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static struct mbuf *
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mlx4_en_get_rx_mb(struct mlx4_en_priv *priv,
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struct mlx4_en_rx_desc *rx_desc,
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struct mbuf **pmb,
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unsigned int length)
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{
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struct mlx4_en_dev *mdev = priv->mdev;
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struct mbuf *mb;
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dma_addr_t dma;
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if (length <= SMALL_PACKET_SIZE) {
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mb = m_gethdr(M_WAITOK, MT_DATA);
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if (unlikely(mb == NULL))
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return NULL;
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/* We are copying all relevant data to the mb - temporarily
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* synch buffers for the copy */
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dma = be64_to_cpu(rx_desc->data->addr);
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dma_sync_single_range_for_cpu(&mdev->pdev->dev, dma, 0,
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length, DMA_FROM_DEVICE);
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memcpy(mb->m_data, (*pmb)->m_data, length);
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dma_sync_single_range_for_device(&mdev->pdev->dev, dma, 0,
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length, DMA_FROM_DEVICE);
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} else {
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mb = *pmb;
|
||||
if (unlikely(mlx4_en_alloc_rx_mb(priv, rx_desc, pmb, 1)))
|
||||
return NULL;
|
||||
}
|
||||
|
||||
mb->m_len = length;
|
||||
mb->m_pkthdr.len = length;
|
||||
return mb;
|
||||
}
|
||||
|
||||
static void validate_loopback(struct mlx4_en_priv *priv, struct mbuf *mb)
|
||||
{
|
||||
int i;
|
||||
@ -543,107 +422,22 @@ out_loopback:
|
||||
m_freem(mb);
|
||||
}
|
||||
|
||||
int mlx4_en_process_rx_cq_mb(struct net_device *dev,
|
||||
struct mlx4_en_cq *cq, int budget)
|
||||
static struct mbuf *mlx4_en_rx_mb(struct mlx4_en_priv *priv,
|
||||
struct mlx4_en_rx_desc *rx_desc,
|
||||
struct mbuf **mb_list,
|
||||
unsigned int length)
|
||||
{
|
||||
struct mlx4_en_priv *priv = netdev_priv(dev);
|
||||
struct mlx4_cqe *cqe;
|
||||
struct mlx4_en_rx_ring *ring = &priv->rx_ring[cq->ring];
|
||||
struct mlx4_en_rx_desc *rx_desc;
|
||||
struct mbuf **pmb;
|
||||
struct mbuf *mb;
|
||||
int index;
|
||||
unsigned int length;
|
||||
int polled = 0;
|
||||
|
||||
if (!priv->port_up)
|
||||
return 0;
|
||||
mb = mb_list[0];
|
||||
/* Move relevant fragments to mb */
|
||||
if (unlikely(mlx4_en_complete_rx_desc(priv, rx_desc, mb_list, length)))
|
||||
return NULL;
|
||||
|
||||
/* We assume a 1:1 mapping between CQEs and Rx descriptors, so Rx
|
||||
* descriptor offset can be deduced from the CQE index instead of
|
||||
* reading 'cqe->index' */
|
||||
index = cq->mcq.cons_index & ring->size_mask;
|
||||
cqe = &cq->buf[index];
|
||||
|
||||
/* Process all completed CQEs */
|
||||
while (XNOR(cqe->owner_sr_opcode & MLX4_CQE_OWNER_MASK,
|
||||
cq->mcq.cons_index & cq->size)) {
|
||||
|
||||
pmb = (struct mbuf **) ring->rx_info + index;
|
||||
rx_desc = ring->buf + (index << ring->log_stride);
|
||||
|
||||
/*
|
||||
* make sure we read the CQE after we read the ownership bit
|
||||
*/
|
||||
rmb();
|
||||
|
||||
if (invalid_cqe(priv, cqe))
|
||||
goto next;
|
||||
|
||||
/*
|
||||
* Packet is OK - process it.
|
||||
*/
|
||||
length = be32_to_cpu(cqe->byte_cnt);
|
||||
|
||||
mb = mlx4_en_get_rx_mb(priv, rx_desc, pmb, length);
|
||||
if (unlikely(!mb)){
|
||||
ring->errors++;
|
||||
goto next;
|
||||
}
|
||||
|
||||
ring->bytes += length;
|
||||
ring->packets++;
|
||||
|
||||
if (unlikely(priv->validate_loopback)) {
|
||||
validate_loopback(priv, mb);
|
||||
goto next;
|
||||
}
|
||||
mb->m_pkthdr.flowid = cq->ring;
|
||||
mb->m_flags |= M_FLOWID;
|
||||
mb->m_pkthdr.rcvif = dev;
|
||||
if (be32_to_cpu(cqe->vlan_my_qpn) &
|
||||
MLX4_CQE_VLAN_PRESENT_MASK) {
|
||||
mb->m_pkthdr.ether_vtag = be16_to_cpu(cqe->sl_vid);
|
||||
mb->m_flags |= M_VLANTAG;
|
||||
}
|
||||
|
||||
if (likely(priv->rx_csum && cqe->checksum == 0xffff)) {
|
||||
priv->port_stats.rx_chksum_good++;
|
||||
mb->m_pkthdr.csum_flags =
|
||||
CSUM_IP_CHECKED | CSUM_IP_VALID |
|
||||
CSUM_DATA_VALID | CSUM_PSEUDO_HDR;
|
||||
mb->m_pkthdr.csum_data = htons(0xffff);
|
||||
} else {
|
||||
priv->port_stats.rx_chksum_none++;
|
||||
mb->m_pkthdr.csum_flags = 0;
|
||||
if (priv->mdev->profile.ip_reasm &&
|
||||
cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPV4) &&
|
||||
!mlx4_en_rx_frags(priv, ring, mb, cqe))
|
||||
goto next;
|
||||
}
|
||||
/* Push it up the stack */
|
||||
dev->if_input(dev, mb);
|
||||
|
||||
next:
|
||||
++cq->mcq.cons_index;
|
||||
index = (cq->mcq.cons_index) & ring->size_mask;
|
||||
cqe = &cq->buf[index];
|
||||
if (++polled == budget)
|
||||
break;
|
||||
}
|
||||
|
||||
/* If CQ is empty, flush all pending IP reassembly sessions */
|
||||
mlx4_en_flush_frags(priv, ring);
|
||||
|
||||
AVG_PERF_COUNTER(priv->pstats.rx_coal_avg, polled);
|
||||
mlx4_cq_set_ci(&cq->mcq);
|
||||
wmb(); /* ensure HW sees CQ consumer before we post new buffers */
|
||||
ring->cons = cq->mcq.cons_index;
|
||||
ring->prod += polled; /* Polled descriptors were realocated in place */
|
||||
mlx4_en_update_rx_prod_db(ring);
|
||||
return polled;
|
||||
return mb;
|
||||
}
|
||||
|
||||
|
||||
int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int budget)
|
||||
{
|
||||
struct mlx4_en_priv *priv = netdev_priv(dev);
|
||||
@ -733,6 +527,10 @@ int mlx4_en_process_rx_cq(struct net_device *dev, struct mlx4_en_cq *cq, int bud
|
||||
} else {
|
||||
mb->m_pkthdr.csum_flags = 0;
|
||||
priv->port_stats.rx_chksum_none++;
|
||||
if (priv->ip_reasm &&
|
||||
cqe->status & cpu_to_be16(MLX4_CQE_STATUS_IPV4) &&
|
||||
!mlx4_en_rx_frags(priv, ring, mb, cqe))
|
||||
goto next;
|
||||
}
|
||||
|
||||
/* Push it up the stack */
|
||||
@ -743,8 +541,11 @@ next:
|
||||
index = (cq->mcq.cons_index) & ring->size_mask;
|
||||
cqe = &cq->buf[index];
|
||||
if (++polled == budget)
|
||||
break;
|
||||
goto out;
|
||||
}
|
||||
/* Flush all pending IP reassembly sessions */
|
||||
out:
|
||||
mlx4_en_flush_frags(priv, ring);
|
||||
while ((queued = SLIST_FIRST(&ring->lro.lro_active)) != NULL) {
|
||||
SLIST_REMOVE_HEAD(&ring->lro.lro_active, next);
|
||||
tcp_lro_flush(&ring->lro, queued);
|
||||
@ -763,14 +564,9 @@ next:
|
||||
static int mlx4_en_poll_rx_cq(struct mlx4_en_cq *cq, int budget)
|
||||
{
|
||||
struct net_device *dev = cq->dev;
|
||||
struct mlx4_en_priv *priv = netdev_priv(dev);
|
||||
int done;
|
||||
|
||||
if (priv->rx_ring[cq->ring].use_frags)
|
||||
done = mlx4_en_process_rx_cq(dev, cq, budget);
|
||||
else
|
||||
done = mlx4_en_process_rx_cq_mb(dev, cq, budget);
|
||||
|
||||
done = mlx4_en_process_rx_cq(dev, cq, budget);
|
||||
cq->tot_rx += done;
|
||||
|
||||
return done;
|
||||
@ -835,17 +631,7 @@ void mlx4_en_calc_rx_buf(struct net_device *dev)
|
||||
}
|
||||
|
||||
priv->num_frags = frag;
|
||||
/*
|
||||
* For use_frags == 0 calculate the size extbuf we require.
|
||||
*/
|
||||
if (eff_mtu <= MCLBYTES)
|
||||
priv->rx_mb_size = MCLBYTES;
|
||||
else if (eff_mtu <= MJUMPAGESIZE)
|
||||
priv->rx_mb_size = MJUMPAGESIZE;
|
||||
else if (eff_mtu <= MJUM9BYTES)
|
||||
priv->rx_mb_size = MJUM9BYTES;
|
||||
else
|
||||
priv->rx_mb_size = MJUM16BYTES;
|
||||
priv->rx_mb_size = eff_mtu;
|
||||
priv->log_rx_info =
|
||||
ROUNDUP_LOG2(priv->num_frags * sizeof(struct mbuf *));
|
||||
|
||||
@ -906,11 +692,15 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
|
||||
struct mlx4_qp_context context;
|
||||
struct mlx4_en_rss_context *rss_context;
|
||||
void *ptr;
|
||||
u8 rss_mask = (priv->udp_rings > 1) ? 0x3f : 0x14;
|
||||
u8 rss_mask;
|
||||
int i, qpn;
|
||||
int err = 0;
|
||||
int good_qps = 0;
|
||||
|
||||
if (mdev->profile.udp_rss)
|
||||
rss_mask = 0x3f;
|
||||
else
|
||||
rss_mask = 0x14;
|
||||
en_dbg(DRV, priv, "Configuring rss steering\n");
|
||||
err = mlx4_qp_reserve_range(mdev->dev, priv->rx_ring_num,
|
||||
roundup_pow_of_two(priv->rx_ring_num),
|
||||
@ -950,14 +740,11 @@ int mlx4_en_config_rss_steer(struct mlx4_en_priv *priv)
|
||||
|
||||
ptr = ((void *) &context) + 0x3c;
|
||||
rss_context = (struct mlx4_en_rss_context *) ptr;
|
||||
rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num - priv->udp_rings) << 24 |
|
||||
rss_context->base_qpn = cpu_to_be32(ilog2(priv->rx_ring_num) << 24 |
|
||||
(rss_map->base_qpn));
|
||||
rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn +
|
||||
priv->rx_ring_num -
|
||||
priv->udp_rings);
|
||||
rss_context->default_qpn = cpu_to_be32(rss_map->base_qpn);
|
||||
rss_context->flags = rss_mask;
|
||||
if (priv->udp_rings > 1)
|
||||
rss_context->base_qpn_udp = rss_context->default_qpn;
|
||||
rss_context->base_qpn_udp = rss_context->default_qpn;
|
||||
|
||||
err = mlx4_qp_to_ready(mdev->dev, &priv->res.mtt, &context,
|
||||
&rss_map->indir_qp, &rss_map->indir_state);
|
||||
|
||||
@ -335,7 +335,6 @@ struct mlx4_en_rx_ring {
|
||||
unsigned long bytes;
|
||||
unsigned long packets;
|
||||
unsigned long errors;
|
||||
unsigned int use_frags;
|
||||
struct lro_ctrl lro;
|
||||
struct mlx4_en_ipfrag ipfrag[MLX4_EN_NUM_IPFRAG_SESSIONS];
|
||||
};
|
||||
@ -383,9 +382,9 @@ struct mlx4_en_port_profile {
|
||||
u32 tx_ring_size;
|
||||
u32 rx_ring_size;
|
||||
u8 rx_pause;
|
||||
u8 rx_ppp;
|
||||
u8 tx_pause;
|
||||
u8 tx_ppp;
|
||||
u32 rx_ppp;
|
||||
u32 tx_ppp;
|
||||
};
|
||||
|
||||
struct mlx4_en_profile {
|
||||
@ -533,11 +532,11 @@ struct mlx4_en_priv {
|
||||
#define MLX4_EN_FLAG_PROMISC 0x1
|
||||
u32 tx_ring_num;
|
||||
u32 rx_ring_num;
|
||||
u32 udp_rings;
|
||||
u32 rx_mb_size;
|
||||
struct mlx4_en_frag_info frag_info[MLX4_EN_MAX_RX_FRAGS];
|
||||
u16 num_frags;
|
||||
u16 log_rx_info;
|
||||
int ip_reasm;
|
||||
|
||||
struct mlx4_en_tx_ring tx_ring[MAX_TX_RINGS];
|
||||
struct mlx4_en_rx_ring rx_ring[MAX_RX_RINGS];
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user