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Merging ^/head r279596 through r279758.

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This commit is contained in:
Dimitry Andric 2015-03-07 23:01:27 +00:00
commit 6404f697a0
134 changed files with 2314 additions and 858 deletions
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6
UPDATING
View File

@ -34,6 +34,12 @@ NOTE TO PEOPLE WHO THINK THAT FreeBSD 11.x IS SLOW:
2015mmdd:
Clang and llvm have been upgraded to 3.6.0 release.
20150307:
The 32-bit PowerPC kernel has been changed to a position-independent
executable. This can only be booted with a version of loader(8)
newer than January 31, 2015, so make sure to update both world and
kernel before rebooting.
20150217:
If you are running a -CURRENT kernel since r273872 (Oct 30th, 2014),
but before r278950, the RNG was not seeded properly. Immediately

1
bin/rcp/Makefile
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@ -7,6 +7,5 @@ CFLAGS+=-DBINDIR=${BINDIR}
BINOWN= root
BINMODE=4555
PRECIOUSPROG=
.include <bsd.prog.mk>

1
contrib/libc++/include/__bit_reference
View File

@ -906,7 +906,6 @@ rotate(__bit_iterator<_Cp, false> __first, __bit_iterator<_Cp, false> __middle,
{
typedef __bit_iterator<_Cp, false> _I1;
typedef typename _I1::difference_type difference_type;
typedef typename _I1::__storage_type __storage_type;
difference_type __d1 = __middle - __first;
difference_type __d2 = __last - __middle;
_I1 __r = __first + __d2;

1
contrib/libc++/include/__tree
View File

@ -2069,7 +2069,6 @@ template <class _Key>
typename __tree<_Tp, _Compare, _Allocator>::size_type
__tree<_Tp, _Compare, _Allocator>::__count_multi(const _Key& __k) const
{
typedef pair<const_iterator, const_iterator> _Pp;
__node_const_pointer __result = __end_node();
__node_const_pointer __rt = __root();
while (__rt != nullptr)

4
contrib/libc++/include/algorithm
View File

@ -4365,8 +4365,6 @@ __buffered_inplace_merge(_BidirectionalIterator __first, _BidirectionalIterator
typename iterator_traits<_BidirectionalIterator>::value_type* __buff)
{
typedef typename iterator_traits<_BidirectionalIterator>::value_type value_type;
typedef typename iterator_traits<_BidirectionalIterator>::difference_type difference_type;
typedef typename iterator_traits<_BidirectionalIterator>::pointer pointer;
__destruct_n __d(0);
unique_ptr<value_type, __destruct_n&> __h2(__buff, __d);
if (__len1 <= __len2)
@ -4400,7 +4398,6 @@ __inplace_merge(_BidirectionalIterator __first, _BidirectionalIterator __middle,
typename iterator_traits<_BidirectionalIterator>::difference_type __len2,
typename iterator_traits<_BidirectionalIterator>::value_type* __buff, ptrdiff_t __buff_size)
{
typedef typename iterator_traits<_BidirectionalIterator>::value_type value_type;
typedef typename iterator_traits<_BidirectionalIterator>::difference_type difference_type;
while (true)
{
@ -4799,7 +4796,6 @@ void
__sift_up(_RandomAccessIterator __first, _RandomAccessIterator __last, _Compare __comp,
typename iterator_traits<_RandomAccessIterator>::difference_type __len)
{
typedef typename iterator_traits<_RandomAccessIterator>::difference_type difference_type;
typedef typename iterator_traits<_RandomAccessIterator>::value_type value_type;
if (__len > 1)
{

9
contrib/tzdata/antarctica
View File

@ -47,8 +47,8 @@ Rule ChileAQ 2009 only - Mar Sun>=9 3:00u 0 -
Rule ChileAQ 2010 only - Apr Sun>=1 3:00u 0 -
Rule ChileAQ 2011 only - May Sun>=2 3:00u 0 -
Rule ChileAQ 2011 only - Aug Sun>=16 4:00u 1:00 S
Rule ChileAQ 2012 max - Apr Sun>=23 3:00u 0 -
Rule ChileAQ 2012 max - Sep Sun>=2 4:00u 1:00 S
Rule ChileAQ 2012 2015 - Apr Sun>=23 3:00u 0 -
Rule ChileAQ 2012 2014 - Sep Sun>=2 4:00u 1:00 S
# Argentina - year-round bases
# Belgrano II, Confin Coast, -770227-0343737, since 1972-02-05
@ -354,9 +354,10 @@ Zone Antarctica/Rothera 0 - zzz 1976 Dec 1
#
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Antarctica/Palmer 0 - zzz 1965
-4:00 ArgAQ AR%sT 1969 Oct 5
-4:00 ArgAQ AR%sT 1969 Oct 5
-3:00 ArgAQ AR%sT 1982 May
-4:00 ChileAQ CL%sT
-4:00 ChileAQ CL%sT 2015 Apr 26 3:00u
-3:00 - CLT
#
#
# McMurdo Station, Ross Island, since 1955-12

28
contrib/tzdata/asia
View File

@ -145,10 +145,7 @@ Zone Asia/Baku 3:19:24 - LMT 1924 May 2
4:00 Azer AZ%sT
# Bahrain
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Asia/Bahrain 3:22:20 - LMT 1920 # Manamah
4:00 - GST 1972 Jun
3:00 - AST
# See Asia/Qatar.
# Bangladesh
# From Alexander Krivenyshev (2009-05-13):
@ -1731,9 +1728,7 @@ Zone Asia/Pyongyang 8:23:00 - LMT 1908 Apr 1
###############################################################################
# Kuwait
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Asia/Kuwait 3:11:56 - LMT 1950
3:00 - AST
# See Asia/Riyadh.
# Laos
# See Asia/Bangkok.
@ -1954,12 +1949,7 @@ Zone Asia/Kathmandu 5:41:16 - LMT 1920
5:45 - NPT # Nepal Time
# Oman
# Milne says 3:54:24 was the meridian of the Muscat Tidal Observatory.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Asia/Muscat 3:54:24 - LMT 1920
4:00 - GST
# See Asia/Dubai.
# Pakistan
@ -2453,6 +2443,7 @@ Zone Asia/Manila -15:56:00 - LMT 1844 Dec 31
Zone Asia/Qatar 3:26:08 - LMT 1920 # Al Dawhah / Doha
4:00 - GST 1972 Jun
3:00 - AST
Link Asia/Qatar Asia/Bahrain
# Saudi Arabia
#
@ -2479,6 +2470,8 @@ Zone Asia/Qatar 3:26:08 - LMT 1920 # Al Dawhah / Doha
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Asia/Riyadh 3:06:52 - LMT 1947 Mar 14
3:00 - AST
Link Asia/Riyadh Asia/Aden # Yemen
Link Asia/Riyadh Asia/Kuwait
# Singapore
# taken from Mok Ly Yng (2003-10-30)
@ -2767,6 +2760,7 @@ Zone Asia/Ashgabat 3:53:32 - LMT 1924 May 2 # or Ashkhabad
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Asia/Dubai 3:41:12 - LMT 1920
4:00 - GST
Link Asia/Dubai Asia/Muscat # Oman
# Uzbekistan
# Byalokoz 1919 says Uzbekistan was 4:27:53.
@ -2851,10 +2845,4 @@ Zone Asia/Ho_Chi_Minh 7:06:40 - LMT 1906 Jul 1
7:00 - ICT
# Yemen
# Milne says 2:59:54 was the meridian of the saluting battery at Aden,
# and that Yemen was at 1:55:56, the meridian of the Hagia Sophia.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Asia/Aden 2:59:54 - LMT 1950
3:00 - AST
# See Asia/Riyadh.

2
contrib/tzdata/backward
View File

@ -5,7 +5,7 @@
# and their old names. Many names changed in late 1993.
# Link TARGET LINK-NAME
Link Africa/Asmara Africa/Asmera
Link Africa/Nairobi Africa/Asmera
Link Africa/Abidjan Africa/Timbuktu
Link America/Argentina/Catamarca America/Argentina/ComodRivadavia
Link America/Adak America/Atka

29
contrib/tzdata/europe
View File

@ -1407,35 +1407,32 @@ Zone Europe/Budapest 1:16:20 - LMT 1890 Oct
# might be a reference to the Julian calendar as opposed to Gregorian, or it
# might mean something else (???).
#
# From Paul Eggert (2006-03-22):
# The Iceland Almanak, Shanks & Pottenger, and Whitman disagree on many points.
# We go with the Almanak, except for one claim from Shanks & Pottenger, namely
# that Reykavik was 21W57 from 1837 to 1908, local mean time before that.
# From Paul Eggert (2014-11-22):
# The information below is taken from the 1988 Almanak; see
# http://www.almanak.hi.is/klukkan.html
#
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Iceland 1917 1918 - Feb 19 23:00 1:00 S
Rule Iceland 1917 1919 - Feb 19 23:00 1:00 S
Rule Iceland 1917 only - Oct 21 1:00 0 -
Rule Iceland 1918 only - Nov 16 1:00 0 -
Rule Iceland 1918 1919 - Nov 16 1:00 0 -
Rule Iceland 1921 only - Mar 19 23:00 1:00 S
Rule Iceland 1921 only - Jun 23 1:00 0 -
Rule Iceland 1939 only - Apr 29 23:00 1:00 S
Rule Iceland 1939 only - Nov 29 2:00 0 -
Rule Iceland 1939 only - Oct 29 2:00 0 -
Rule Iceland 1940 only - Feb 25 2:00 1:00 S
Rule Iceland 1940 only - Nov 3 2:00 0 -
Rule Iceland 1941 only - Mar 2 1:00s 1:00 S
Rule Iceland 1941 only - Nov 2 1:00s 0 -
Rule Iceland 1942 only - Mar 8 1:00s 1:00 S
Rule Iceland 1942 only - Oct 25 1:00s 0 -
Rule Iceland 1940 1941 - Nov Sun>=2 1:00s 0 -
Rule Iceland 1941 1942 - Mar Sun>=2 1:00s 1:00 S
# 1943-1946 - first Sunday in March until first Sunday in winter
Rule Iceland 1943 1946 - Mar Sun>=1 1:00s 1:00 S
Rule Iceland 1943 1948 - Oct Sun>=22 1:00s 0 -
Rule Iceland 1942 1948 - Oct Sun>=22 1:00s 0 -
# 1947-1967 - first Sunday in April until first Sunday in winter
Rule Iceland 1947 1967 - Apr Sun>=1 1:00s 1:00 S
# 1949 Oct transition delayed by 1 week
# 1949 and 1967 Oct transitions delayed by 1 week
Rule Iceland 1949 only - Oct 30 1:00s 0 -
Rule Iceland 1950 1966 - Oct Sun>=22 1:00s 0 -
Rule Iceland 1967 only - Oct 29 1:00s 0 -
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
Zone Atlantic/Reykjavik -1:27:24 - LMT 1837
-1:27:48 - RMT 1908 # Reykjavik Mean Time?
Zone Atlantic/Reykjavik -1:28 - LMT 1908
-1:00 Iceland IS%sT 1968 Apr 7 1:00s
0:00 - GMT

24
contrib/tzdata/leap-seconds.list
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@ -47,7 +47,7 @@
# and can be ignored for many purposes. These differences
# are tabulated in Circular T, which is published monthly
# by the International Bureau of Weights and Measures
# (BIPM). See www.bipm.fr for more information.
# (BIPM). See www.bipm.org for more information.
#
# 3. The current definition of the relationship between UTC
# and TAI dates from 1 January 1972. A number of different
@ -127,6 +127,15 @@
# with, since the difficulty of unambiguously representing the epoch
# during the leap second does not arise.
#
# Some systems implement leap seconds by amortizing the leap second
# over the last few minutes of the day. The frequency of the local
# clock is decreased (or increased) to realize the positive (or
# negative) leap second. This method removes the time step described
# above. Although the long-term behavior of the time scale is correct
# in this case, this method introduces an error during the adjustment
# period both in time and in frequency with respect to the official
# defintion of UTC.
#
# Questions or comments to:
# Judah Levine
# Time and Frequency Division
@ -134,7 +143,7 @@
# Boulder, Colorado
# Judah.Levine@nist.gov
#
# Last Update of leap second values: 11 January 2012
# Last Update of leap second values: 5 January 2015
#
# The following line shows this last update date in NTP timestamp
# format. This is the date on which the most recent change to
@ -142,7 +151,7 @@
# be identified by the unique pair of characters in the first two
# columns as shown below.
#
#$ 3535228800
#$ 3629404800
#
# The NTP timestamps are in units of seconds since the NTP epoch,
# which is 1 January 1900, 00:00:00. The Modified Julian Day number
@ -190,10 +199,10 @@
# current -- the update time stamp, the data and the name of the file
# will not change.
#
# Updated through IERS Bulletin C48
# File expires on: 28 June 2015
# Updated through IERS Bulletin C49
# File expires on: 28 December 2015
#
#@ 3644438400
#@ 3660249600
#
2272060800 10 # 1 Jan 1972
2287785600 11 # 1 Jul 1972
@ -221,6 +230,7 @@
3345062400 33 # 1 Jan 2006
3439756800 34 # 1 Jan 2009
3550089600 35 # 1 Jul 2012
3644697600 36 # 1 Jul 2015
#
# the following special comment contains the
# hash value of the data in this file computed
@ -236,4 +246,4 @@
# the hash line is also ignored in the
# computation.
#
#h a4862ccd c6f43c6 964f3604 85944a26 b5cfad4e
#h 45e70fa7 a9df2033 f4a49ab0 ec648273 7b6c22c

27
contrib/tzdata/northamerica
View File

@ -124,7 +124,7 @@ Rule US 1918 1919 - Mar lastSun 2:00 1:00 D
Rule US 1918 1919 - Oct lastSun 2:00 0 S
Rule US 1942 only - Feb 9 2:00 1:00 W # War
Rule US 1945 only - Aug 14 23:00u 1:00 P # Peace
Rule US 1945 only - Sep 30 2:00 0 S
Rule US 1945 only - Sep lastSun 2:00 0 S
Rule US 1967 2006 - Oct lastSun 2:00 0 S
Rule US 1967 1973 - Apr lastSun 2:00 1:00 D
Rule US 1974 only - Jan 6 2:00 1:00 D
@ -2124,11 +2124,11 @@ Zone America/Dawson -9:17:40 - LMT 1900 Aug 20
# Mexico
# From Paul Eggert (2001-03-05):
# From Paul Eggert (2014-12-07):
# The Investigation and Analysis Service of the
# Mexican Library of Congress (MLoC) has published a
# history of Mexican local time (in Spanish)
# http://www.cddhcu.gob.mx/bibliot/publica/inveyana/polisoc/horver/
# http://www.diputados.gob.mx/bibliot/publica/inveyana/polisoc/horver/index.htm
#
# Here are the discrepancies between Shanks & Pottenger (S&P) and the MLoC.
# (In all cases we go with the MLoC.)
@ -2297,6 +2297,24 @@ Zone America/Dawson -9:17:40 - LMT 1900 Aug 20
# efecto desde las dos horas del segundo domingo de marzo y concluirá a
# las dos horas del primer domingo de noviembre.
# From Steffen Thorsen (2014-12-08), translated by Gwillim Law:
# The Mexican state of Quintana Roo will likely change to EST in 2015.
#
# http://www.unioncancun.mx/articulo/2014/12/04/medio-ambiente/congreso-aprueba-una-hora-mas-de-sol-en-qroo
# "With this change, the time conflict that has existed between the municipios
# of Quintana Roo and the municipio of Felipe Carrillo Puerto may come to an
# end. The latter declared itself in rebellion 15 years ago when a time change
# was initiated in Mexico, and since then it has refused to change its time
# zone along with the rest of the country."
#
# From Steffen Thorsen (2015-01-14), translated by Gwillim Law:
# http://sipse.com/novedades/confirman-aplicacion-de-nueva-zona-horaria-para-quintana-roo-132331.html
# "...the new time zone will come into effect at two o'clock on the first Sunday
# of February, when we will have to advance the clock one hour from its current
# time..."
#
# Also, the new zone will not use DST.
# Rule NAME FROM TO TYPE IN ON AT SAVE LETTER/S
Rule Mexico 1939 only - Feb 5 0:00 1:00 D
Rule Mexico 1939 only - Jun 25 0:00 0 S
@ -2317,7 +2335,8 @@ Rule Mexico 2002 max - Oct lastSun 2:00 0 S
Zone America/Cancun -5:47:04 - LMT 1922 Jan 1 0:12:56
-6:00 - CST 1981 Dec 23
-5:00 Mexico E%sT 1998 Aug 2 2:00
-6:00 Mexico C%sT
-6:00 Mexico C%sT 2015 Feb 1 2:00
-5:00 - EST
# Campeche, Yucatán; represented by Mérida
Zone America/Merida -5:58:28 - LMT 1922 Jan 1 0:01:32
-6:00 - CST 1981 Dec 23

17
contrib/tzdata/southamerica
View File

@ -1206,6 +1206,11 @@ Zone America/Rio_Branco -4:31:12 - LMT 1914
# DST Start: first Saturday of September 2014 (Sun 07 Sep 2014 04:00 UTC)
# http://www.diariooficial.interior.gob.cl//media/2014/02/19/do-20140219.pdf
# From Juan Correa (2015-01-28):
# ... today the Ministry of Energy announced that Chile will drop DST, will keep
# "summer time" (UTC -3 / UTC -5) all year round....
# http://www.minenergia.cl/ministerio/noticias/generales/ministerio-de-energia-anuncia.html
# NOTE: ChileAQ rules for Antarctic bases are stored separately in the
# 'antarctica' file.
@ -1247,8 +1252,8 @@ Rule Chile 2009 only - Mar Sun>=9 3:00u 0 -
Rule Chile 2010 only - Apr Sun>=1 3:00u 0 -
Rule Chile 2011 only - May Sun>=2 3:00u 0 -
Rule Chile 2011 only - Aug Sun>=16 4:00u 1:00 S
Rule Chile 2012 max - Apr Sun>=23 3:00u 0 -
Rule Chile 2012 max - Sep Sun>=2 4:00u 1:00 S
Rule Chile 2012 2015 - Apr Sun>=23 3:00u 0 -
Rule Chile 2012 2014 - Sep Sun>=2 4:00u 1:00 S
# IATA SSIM anomalies: (1992-02) says 1992-03-14;
# (1996-09) says 1998-03-08. Ignore these.
# Zone NAME GMTOFF RULES FORMAT [UNTIL]
@ -1259,11 +1264,13 @@ Zone America/Santiago -4:42:46 - LMT 1890
-4:00 - CLT 1919 Jul 1 # Chile Time
-4:42:46 - SMT 1927 Sep 1 # Santiago Mean Time
-5:00 Chile CL%sT 1947 May 22 # Chile Time
-4:00 Chile CL%sT
-4:00 Chile CL%sT 2015 Apr 26 3:00u
-3:00 - CLT
Zone Pacific/Easter -7:17:44 - LMT 1890
-7:17:28 - EMT 1932 Sep # Easter Mean Time
-7:00 Chile EAS%sT 1982 Mar 13 21:00 # Easter Time
-6:00 Chile EAS%sT
-7:00 Chile EAS%sT 1982 Mar 13 3:00u # Easter Time
-6:00 Chile EAS%sT 2015 Apr 26 3:00u
-5:00 - EAST
#
# Salas y Gómez Island is uninhabited.
# Other Chilean locations, including Juan Fernández Is, Desventuradas Is,

2
contrib/tzdata/zone.tab
View File

@ -274,7 +274,7 @@ MU -2010+05730 Indian/Mauritius
MV +0410+07330 Indian/Maldives
MW -1547+03500 Africa/Blantyre
MX +1924-09909 America/Mexico_City Central Time - most locations
MX +2105-08646 America/Cancun Central Time - Quintana Roo
MX +2105-08646 America/Cancun Eastern Standard Time - Quintana Roo
MX +2058-08937 America/Merida Central Time - Campeche, Yucatan
MX +2540-10019 America/Monterrey Mexican Central Time - Coahuila, Durango, Nuevo Leon, Tamaulipas away from US border
MX +2550-09730 America/Matamoros US Central Time - Coahuila, Durango, Nuevo Leon, Tamaulipas near US border

2
contrib/tzdata/zone1970.tab
View File

@ -234,7 +234,7 @@ MT +3554+01431 Europe/Malta
MU -2010+05730 Indian/Mauritius
MV +0410+07330 Indian/Maldives
MX +1924-09909 America/Mexico_City Central Time - most locations
MX +2105-08646 America/Cancun Central Time - Quintana Roo
MX +2105-08646 America/Cancun Eastern Standard Time - Quintana Roo
MX +2058-08937 America/Merida Central Time - Campeche, Yucatán
MX +2540-10019 America/Monterrey Mexican Central Time - Coahuila, Durango, Nuevo León, Tamaulipas away from US border
MX +2550-09730 America/Matamoros US Central Time - Coahuila, Durango, Nuevo León, Tamaulipas near US border

2
lib/libc/gen/getpwent.c
View File

@ -1942,7 +1942,7 @@ compat_passwd(void *retval, void *mdata, va_list ap)
break;
}
fin:
if (!stayopen && st->db != NULL) {
if (st->db != NULL && !stayopen) {
(void)st->db->close(st->db);
st->db = NULL;
}

53
lib/libc/stdlib/qsort.c
View File

@ -41,47 +41,55 @@ typedef int cmp_t(void *, const void *, const void *);
typedef int cmp_t(const void *, const void *);
#endif
static inline char *med3(char *, char *, char *, cmp_t *, void *);
static inline void swapfunc(char *, char *, int, int);
static inline void swapfunc(char *, char *, int, int, int);
#define min(a, b) (a) < (b) ? a : b
#define MIN(a, b) ((a) < (b) ? a : b)
/*
* Qsort routine from Bentley & McIlroy's "Engineering a Sort Function".
*/
#define swapcode(TYPE, parmi, parmj, n) { \
long i = (n) / sizeof (TYPE); \
TYPE *pi = (TYPE *) (parmi); \
TYPE *pj = (TYPE *) (parmj); \
#define swapcode(TYPE, parmi, parmj, n) { \
long i = (n) / sizeof (TYPE); \
TYPE *pi = (TYPE *) (parmi); \
TYPE *pj = (TYPE *) (parmj); \
do { \
TYPE t = *pi; \
*pi++ = *pj; \
*pj++ = t; \
} while (--i > 0); \
} while (--i > 0); \
}
#define SWAPINIT(a, es) swaptype = ((char *)a - (char *)0) % sizeof(long) || \
es % sizeof(long) ? 2 : es == sizeof(long)? 0 : 1;
#define SWAPINIT(TYPE, a, es) swaptype_ ## TYPE = \
((char *)a - (char *)0) % sizeof(TYPE) || \
es % sizeof(TYPE) ? 2 : es == sizeof(TYPE) ? 0 : 1;
static inline void
swapfunc(a, b, n, swaptype)
swapfunc(a, b, n, swaptype_long, swaptype_int)
char *a, *b;
int n, swaptype;
int n, swaptype_long, swaptype_int;
{
if(swaptype <= 1)
if (swaptype_long <= 1)
swapcode(long, a, b, n)
else if (swaptype_int <= 1)
swapcode(int, a, b, n)
else
swapcode(char, a, b, n)
}
#define swap(a, b) \
if (swaptype == 0) { \
#define swap(a, b) \
if (swaptype_long == 0) { \
long t = *(long *)(a); \
*(long *)(a) = *(long *)(b); \
*(long *)(b) = t; \
} else if (swaptype_int == 0) { \
int t = *(int *)(a); \
*(int *)(a) = *(int *)(b); \
*(int *)(b) = t; \
} else \
swapfunc(a, b, es, swaptype)
swapfunc(a, b, es, swaptype_long, swaptype_int)
#define vecswap(a, b, n) if ((n) > 0) swapfunc(a, b, n, swaptype)
#define vecswap(a, b, n) \
if ((n) > 0) swapfunc(a, b, n, swaptype_long, swaptype_int)
#ifdef I_AM_QSORT_R
#define CMP(t, x, y) (cmp((t), (x), (y)))
@ -98,14 +106,14 @@ __unused
{
return CMP(thunk, a, b) < 0 ?
(CMP(thunk, b, c) < 0 ? b : (CMP(thunk, a, c) < 0 ? c : a ))
:(CMP(thunk, b, c) > 0 ? b : (CMP(thunk, a, c) < 0 ? a : c ));
:(CMP(thunk, b, c) > 0 ? b : (CMP(thunk, a, c) < 0 ? a : c ));
}
#ifdef I_AM_QSORT_R
void
qsort_r(void *a, size_t n, size_t es, void *thunk, cmp_t *cmp)
#else
#define thunk NULL
#define thunk NULL
void
qsort(void *a, size_t n, size_t es, cmp_t *cmp)
#endif
@ -113,9 +121,10 @@ qsort(void *a, size_t n, size_t es, cmp_t *cmp)
char *pa, *pb, *pc, *pd, *pl, *pm, *pn;
size_t d, r;
int cmp_result;
int swaptype, swap_cnt;
int swaptype_long, swaptype_int, swap_cnt;
loop: SWAPINIT(a, es);
loop: SWAPINIT(long, a, es);
SWAPINIT(int, a, es);
swap_cnt = 0;
if (n < 7) {
for (pm = (char *)a + es; pm < (char *)a + n * es; pm += es)
@ -175,9 +184,9 @@ loop: SWAPINIT(a, es);
}
pn = (char *)a + n * es;
r = min(pa - (char *)a, pb - pa);
r = MIN(pa - (char *)a, pb - pa);
vecswap(a, pb - r, r);
r = min(pd - pc, pn - pd - es);
r = MIN(pd - pc, pn - pd - es);
vecswap(pb, pn - r, r);
if ((r = pb - pa) > es)
#ifdef I_AM_QSORT_R

6
lib/libc/sys/cap_ioctls_limit.2
View File

@ -28,7 +28,7 @@
.\"
.\" $FreeBSD$
.\"
.Dd March 27, 2014
.Dd March 6, 2015
.Dt CAP_IOCTLS_LIMIT 2
.Os
.Sh NAME
@ -61,6 +61,8 @@ argument specifies the number of elements in the array.
There can be up to
.Va 256
elements in the array.
Including an element that has been previously revoked will generate an error.
After a successful call only those listed in the array may be used.
.Pp
The list of allowed ioctl commands for a given file descriptor can be obtained
with the
@ -92,7 +94,7 @@ system call was never called for this file descriptor), the
.Fn cap_ioctls_get
system call will return
.Dv CAP_IOCTLS_ALL
and won't modify the buffer pointed to by the
and will not modify the buffer pointed to by the
.Fa cmds
argument.
.Sh RETURN VALUES

4
sbin/ifconfig/af_inet6.c
View File

@ -485,6 +485,10 @@ static struct cmd inet6_cmds[] = {
DEF_CMD("-auto_linklocal",-ND6_IFF_AUTO_LINKLOCAL,setnd6flags),
DEF_CMD("no_prefer_iface",ND6_IFF_NO_PREFER_IFACE,setnd6flags),
DEF_CMD("-no_prefer_iface",-ND6_IFF_NO_PREFER_IFACE,setnd6flags),
DEF_CMD("no_dad", ND6_IFF_NO_DAD, setnd6flags),
DEF_CMD("-no_dad", -ND6_IFF_NO_DAD, setnd6flags),
DEF_CMD("ignoreloop", ND6_IFF_IGNORELOOP, setnd6flags),
DEF_CMD("-ignoreloop", -ND6_IFF_IGNORELOOP, setnd6flags),
DEF_CMD_ARG("pltime", setip6pltime),
DEF_CMD_ARG("vltime", setip6vltime),
DEF_CMD("eui64", 0, setip6eui64),

3
sbin/ifconfig/af_nd6.c
View File

@ -58,7 +58,8 @@ static const char rcsid[] =
#define MAX_SYSCTL_TRY 5
#define ND6BITS "\020\001PERFORMNUD\002ACCEPT_RTADV\003PREFER_SOURCE" \
"\004IFDISABLED\005DONT_SET_IFROUTE\006AUTO_LINKLOCAL" \
"\007NO_RADR\010NO_PREFER_IFACE\020DEFAULTIF"
"\007NO_RADR\010NO_PREFER_IFACE\011IGNORELOOP\012NO_DAD" \
"\020DEFAULTIF"
static int isnd6defif(int);
void setnd6flags(const char *, int, int, const struct afswtch *);

16
sbin/ifconfig/ifconfig.8
View File

@ -28,7 +28,7 @@
.\" From: @(#)ifconfig.8 8.3 (Berkeley) 1/5/94
.\" $FreeBSD$
.\"
.Dd December 16, 2014
.Dd March 6, 2015
.Dt IFCONFIG 8
.Os
.Sh NAME
@ -687,6 +687,20 @@ policy table, configurable with
.It Cm -no_prefer_iface
Clear a flag
.Cm no_prefer_iface .
.It Cm no_dad
Set a flag to disable Duplicate Address Detection.
.It Cm -no_dad
Clear a flag
.Cm no_dad .
.It Cm ignoreloop
Set a flag to disable loopback detection in Enhanced Duplicate Address
Detection Algorithm.
When this flag is set,
Duplicate Address Detection will stop in a finite number of probings
even if a loopback configuration is detected.
.It Cm -ignoreloop
Clear a flag
.Cm ignoreloop .
.El
.Pp
The following parameters are specific for IPv6 addresses.

5
share/dtrace/Makefile
View File

@ -15,7 +15,10 @@ _toolkit= toolkit
SCRIPTS= disklatency \
disklatencycmd \
hotopen \
nfsclienttime
nfsclienttime \
tcpstate \
tcptrack \
tcpconn
SCRIPTSDIR= ${SHAREDIR}/dtrace

47
share/dtrace/tcpconn Executable file
View File

@ -0,0 +1,47 @@
#!/usr/sbin/dtrace -s
/*
* Copyright (c) 2015 George V. Neville-Neil
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*
* The tcpconn D script shows histograms of the source of TCP connections
*
* Usage: tcpconn
*/
#pragma D option quiet
BEGIN
{
printf("Press Ctrl-C for output\n");
printf("Source IP");
}
tcp:kernel::accept-established
{
@sources[args[2]->ip_daddr] = count();
}
tcp:kernel::accept-refused
{
@sources[args[2]->ip_daddr] = count();
}

46
share/dtrace/tcpstate Executable file
View File

@ -0,0 +1,46 @@
#!/usr/sbin/dtrace -s
/*
* Copyright (c) 2015 George V. Neville-Neil
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*
* The tcpstate D script shows TCP sockets transitioning between states.
*
* Usage: tcpstate
*/
#pragma D option quiet
BEGIN
{
printf("Old State\t\tNew State\n");
}
tcp:kernel::state-change
{
newstate = args[3]->tcps_state;
oldstate = args[5]->tcps_state;
printf("%d %s\t\t%s\n", args[1]->pid, tcp_state_string[oldstate],
tcp_state_string[newstate]);
}

83
share/dtrace/tcptrack Executable file
View File

@ -0,0 +1,83 @@
#!/usr/sbin/dtrace -s
/*
* Copyright (c) 2015 George V. Neville-Neil
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*
* The tcptrack D script shows various information about TCP
* connections including acceptance and refusal of inbound and
* outbound connections as well as state changes.
*
* Usage: tcptrack
*/
#pragma D option quiet
tcp:kernel::accept-established
{
printf("Accept connection from %s:%d\tto %s:%d\n",
args[2]->ip_saddr,
args[4]->tcp_sport,
args[2]->ip_daddr,
args[4]->tcp_dport);
}
tcp:kernel::accept-refused
{
printf("Refused connection from %s:%d\tto %s:%d\n",
args[2]->ip_daddr,
args[4]->tcp_dport,
args[2]->ip_saddr,
args[4]->tcp_sport);
}
tcp:kernel::connect-established
{
printf("Connection established to %s:%d from %s:%d\n",
args[2]->ip_saddr,
args[4]->tcp_sport,
args[2]->ip_daddr,
args[4]->tcp_dport);
}
tcp:kernel::connect-refused
{
printf("Connection refused by %s:%d from %s:%d\n",
args[2]->ip_saddr,
args[4]->tcp_sport,
args[2]->ip_daddr,
args[4]->tcp_dport);
}
tcp:kernel::state-change
{
newstate = args[3]->tcps_state;
oldstate = args[5]->tcps_state;
printf("State changed from %s\t\t%s\n", tcp_state_string[oldstate],
tcp_state_string[newstate]);
}

1
share/man/man4/Makefile
View File

@ -119,6 +119,7 @@ MAN= aac.4 \
divert.4 \
${_dpms.4} \
dpt.4 \
ds3231.4 \
dummynet.4 \
ed.4 \
edsc.4 \

2
share/man/man4/ds3231.4
View File

@ -24,7 +24,7 @@
.\"
.\" $FreeBSD$
.\"
.Dd October 26, 2014
.Dd March 6, 2015
.Dt DS3231 4
.Os
.Sh NAME

4
sys/amd64/amd64/mp_machdep.c
View File

@ -828,8 +828,8 @@ set_interrupt_apic_ids(void)
continue;
/* Don't let hyperthreads service interrupts. */
if (hyperthreading_cpus > 1 &&
apic_id % hyperthreading_cpus != 0)
if (cpu_logical > 1 &&
apic_id % cpu_logical != 0)
continue;
intr_add_cpu(i);

1
sys/amd64/vmm/io/vatpic.c
View File

@ -275,6 +275,7 @@ vatpic_icw1(struct vatpic *vatpic, struct atpic *atpic, uint8_t val)
atpic->ready = false;
atpic->icw_num = 1;
atpic->request = 0;
atpic->mask = 0;
atpic->lowprio = 7;
atpic->rd_cmd_reg = 0;

2
sys/arm/arm/db_trace.c
View File

@ -66,7 +66,7 @@ db_stack_trace_cmd(struct unwind_state *state)
finished = false;
while (!finished) {
finished = unwind_stack_one(state, 0);
finished = unwind_stack_one(state, 1);
/* Print the frame details */
sym = db_search_symbol(state->start_pc, DB_STGY_ANY, &offset);

11
sys/arm/arm/exception.S
View File

@ -57,11 +57,6 @@ __FBSDID("$FreeBSD$");
#ifdef KDTRACE_HOOKS
.bss
.align 4
.global _C_LABEL(dtrace_invop_jump_addr)
_C_LABEL(dtrace_invop_jump_addr):
.word 0
.word 0
.global _C_LABEL(dtrace_invop_calltrap_addr)
_C_LABEL(dtrace_invop_calltrap_addr):
.word 0
@ -162,7 +157,8 @@ _C_LABEL(dtrace_invop_calltrap_addr):
msr cpsr_c, r2; /* Punch into SVC mode */ \
mov r2, sp; /* Save SVC sp */ \
bic sp, sp, #7; /* Align sp to an 8-byte addrress */ \
sub sp, sp, #4; /* Pad trapframe to keep alignment */ \
sub sp, sp, #(4 * 17); /* Pad trapframe to keep alignment */ \
/* and for dtrace to emulate push/pop */ \
str r0, [sp, #-4]!; /* Push return address */ \
str lr, [sp, #-4]!; /* Push SVC lr */ \
str r2, [sp, #-4]!; /* Push SVC sp */ \
@ -199,7 +195,8 @@ _C_LABEL(dtrace_invop_calltrap_addr):
msr cpsr_c, r2; /* Punch into SVC mode */ \
mov r2, sp; /* Save SVC sp */ \
bic sp, sp, #7; /* Align sp to an 8-byte addrress */ \
sub sp, sp, #4; /* Pad trapframe to keep alignment */ \
sub sp, sp, #(4 * 17); /* Pad trapframe to keep alignment */ \
/* and for dtrace to emulate push/pop */ \
str r0, [sp, #-4]!; /* Push return address */ \
str lr, [sp, #-4]!; /* Push SVC lr */ \
str r2, [sp, #-4]!; /* Push SVC sp */ \

2
sys/arm/arm/physmem.c
View File

@ -153,7 +153,7 @@ arm_physmem_print_tables()
* Walk the list of hardware regions, processing it against the list of
* exclusions that contain the given exflags, and generating an "avail list".
*
* Updates the kernel global 'realmem' with the sum of all pages in hw regions.
* Updates the value at *pavail with the sum of all pages in all hw regions.
*
* Returns the number of pages of non-excluded memory added to the avail list.
*/

13
sys/arm/arm/undefined.c
View File

@ -86,6 +86,10 @@ __FBSDID("$FreeBSD$");
#include <machine/db_machdep.h>
#endif
#ifdef KDTRACE_HOOKS
int (*dtrace_invop_jump_addr)(struct trapframe *);
#endif
static int gdb_trapper(u_int, u_int, struct trapframe *, int);
LIST_HEAD(, undefined_handler) undefined_handlers[MAX_COPROCS];
@ -286,7 +290,14 @@ undefinedinstruction(struct trapframe *frame)
printf("No debugger in kernel.\n");
#endif
return;
} else
}
#ifdef KDTRACE_HOOKS
else if (dtrace_invop_jump_addr != 0) {
dtrace_invop_jump_addr(frame);
return;
}
#endif
else
panic("Undefined instruction in kernel.\n");
}

1
sys/arm/at91/uart_bus_at91usart.c
View File

@ -46,6 +46,7 @@ __FBSDID("$FreeBSD$");
#include "uart_if.h"
extern struct uart_class at91_usart_class;
static int usart_at91_probe(device_t dev);
static device_method_t usart_at91_methods[] = {

1
sys/arm/at91/uart_cpu_at91usart.c
View File

@ -51,6 +51,7 @@ bus_space_tag_t uart_bus_space_io;
bus_space_tag_t uart_bus_space_mem;
extern struct bus_space at91_bs_tag;
extern struct uart_class at91_usart_class;
int
uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)

12
sys/arm/at91/uart_dev_at91usart.c
View File

@ -40,6 +40,9 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#ifdef FDT
#include <dev/uart/uart_cpu_fdt.h>
#endif
#include <dev/uart/uart_bus.h>
#include <arm/at91/at91_usartreg.h>
#include <arm/at91/at91_pdcreg.h>
@ -865,3 +868,12 @@ struct uart_class at91_usart_class = {
.uc_ops = &at91_usart_ops,
.uc_range = 8
};
#ifdef FDT
static struct ofw_compat_data compat_data[] = {
{"atmel,at91rm9200-usart",(uintptr_t)&at91_usart_class},
{"atmel,at91sam9260-usart",(uintptr_t)&at91_usart_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);
#endif

8
sys/arm/conf/BEAGLEBONE
View File

@ -28,10 +28,10 @@ include "../ti/am335x/std.am335x"
makeoptions WITHOUT_MODULES="ahc"
# DTrace support
options KDTRACE_HOOKS # Kernel DTrace hooks
options DDB_CTF # all architectures - kernel ELF linker loads CTF data
makeoptions WITH_CTF=1
makeoptions MODULES_OVERRIDE="opensolaris dtrace dtrace/lockstat dtrace/profile dtrace/fbt"
options KDTRACE_HOOKS # Kernel DTrace hooks
options DDB_CTF # all architectures - kernel ELF linker loads CTF data
makeoptions WITH_CTF=1
makeoptions MODULES_OVERRIDE="opensolaris dtrace dtrace/lockstat dtrace/profile dtrace/fbt"
options HZ=100
options SCHED_4BSD # 4BSD scheduler

9
sys/arm/freescale/vybrid/vf_uart.c
View File

@ -44,6 +44,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
#include <dev/uart/uart_bus.h>
#include "uart_if.h"
@ -270,7 +271,7 @@ static kobj_method_t vf_uart_methods[] = {
{ 0, 0 }
};
struct uart_class uart_vybrid_class = {
static struct uart_class uart_vybrid_class = {
"vybrid",
vf_uart_methods,
sizeof(struct vf_uart_softc),
@ -279,6 +280,12 @@ struct uart_class uart_vybrid_class = {
.uc_rclk = 24000000 /* TODO: get value from CCM */
};
static struct ofw_compat_data compat_data[] = {
{"fsl,mvf600-uart", (uintptr_t)&uart_vybrid_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);
static int
vf_uart_bus_attach(struct uart_softc *sc)
{

9
sys/arm/samsung/exynos/exynos_uart.c
View File

@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
#include <dev/uart/uart_bus.h>
#include <arm/samsung/exynos/exynos_uart.h>
@ -372,7 +373,7 @@ exynos4210_bus_ioctl(struct uart_softc *sc, int request, intptr_t data)
return (EINVAL);
}
struct uart_class uart_exynos4210_class = {
static struct uart_class uart_exynos4210_class = {
"exynos4210 class",
exynos4210_methods,
1,
@ -380,3 +381,9 @@ struct uart_class uart_exynos4210_class = {
.uc_range = 8,
.uc_rclk = 0,
};
static struct ofw_compat_data compat_data[] = {
{"exynos", (uintptr_t)&uart_exynos4210_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);

2
sys/arm/samsung/s3c2xx0/uart_bus_s3c2410.c
View File

@ -19,6 +19,8 @@ __FBSDID("$FreeBSD$");
#include "uart_if.h"
extern struct uart_class uart_s3c2410_class;
static int uart_s3c2410_probe(device_t dev);
static device_method_t uart_s3c2410_methods[] = {

4
sys/arm/samsung/s3c2xx0/uart_cpu_s3c2410.c
View File

@ -39,11 +39,11 @@ __FBSDID("$FreeBSD$");
#include <arm/samsung/s3c2xx0/s3c2xx0var.h>
extern struct uart_class uart_s3c2410_class;
bus_space_tag_t uart_bus_space_io;
bus_space_tag_t uart_bus_space_mem;
extern struct uart_ops uart_s3c2410_ops;
vm_offset_t s3c2410_uart_vaddr;
unsigned int s3c2410_pclk;

9
sys/arm/xilinx/uart_dev_cdnc.c
View File

@ -48,6 +48,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
#include <dev/uart/uart_bus.h>
#include "uart_if.h"
@ -698,10 +699,16 @@ cdnc_uart_bus_ungrab(struct uart_softc *sc)
CDNC_UART_INT_DMSI);
}
struct uart_class uart_cdnc_class = {
static struct uart_class uart_cdnc_class = {
"cdnc_uart",
cdnc_uart_bus_methods,
sizeof(struct uart_softc),
.uc_ops = &cdnc_uart_ops,
.uc_range = 8
};
static struct ofw_compat_data compat_data[] = {
{"cadence,uart", (uintptr_t)&uart_cdnc_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);

185
sys/arm/xilinx/zy7_devcfg.c
View File

@ -72,10 +72,23 @@ struct zy7_devcfg_softc {
bus_dmamap_t dma_map;
int is_open;
struct sysctl_ctx_list sysctl_tree;
struct sysctl_oid *sysctl_tree_top;
};
static struct zy7_devcfg_softc *zy7_devcfg_softc_p;
#define FCLK_NUM 4
struct zy7_fclk_config {
int source;
int frequency;
int actual_frequency;
};
static struct zy7_fclk_config fclk_configs[FCLK_NUM];
#define DEVCFG_SC_LOCK(sc) mtx_lock(&(sc)->sc_mtx)
#define DEVCFG_SC_UNLOCK(sc) mtx_unlock(&(sc)->sc_mtx)
#define DEVCFG_SC_LOCK_INIT(sc) \
@ -103,13 +116,17 @@ static int zy7_ps_vers = 0;
SYSCTL_INT(_hw, OID_AUTO, ps_vers, CTLFLAG_RD, &zy7_ps_vers, 0,
"Zynq-7000 PS version");
static int zy7_devcfg_fclk_sysctl_level_shifters(SYSCTL_HANDLER_ARGS);
SYSCTL_PROC(_hw_fpga, OID_AUTO, level_shifters,
CTLFLAG_RW | CTLTYPE_INT,
NULL, 0, zy7_devcfg_fclk_sysctl_level_shifters,
"I", "Enable/disable level shifters");
/* cdev entry points. */
static int zy7_devcfg_open(struct cdev *, int, int, struct thread *);
static int zy7_devcfg_write(struct cdev *, struct uio *, int);
static int zy7_devcfg_close(struct cdev *, int, int, struct thread *);
struct cdevsw zy7_devcfg_cdevsw = {
.d_version = D_VERSION,
.d_open = zy7_devcfg_open,
@ -230,6 +247,151 @@ struct cdevsw zy7_devcfg_cdevsw = {
#define ZY7_DEVCFG_XADCIF_RD_FIFO 0x114
#define ZY7_DEVCFG_XADCIF_MCTL 0x118
static int
zy7_devcfg_fclk_sysctl_source(SYSCTL_HANDLER_ARGS)
{
char buf[4];
struct zy7_fclk_config *cfg;
int unit;
int error;
cfg = arg1;
unit = arg2;
switch (cfg->source) {
case ZY7_PL_FCLK_SRC_IO:
case ZY7_PL_FCLK_SRC_IO_ALT:
strncpy(buf, "IO", sizeof(buf));
break;
case ZY7_PL_FCLK_SRC_DDR:
strncpy(buf, "DDR", sizeof(buf));
break;
case ZY7_PL_FCLK_SRC_ARM:
strncpy(buf, "ARM", sizeof(buf));
break;
default:
strncpy(buf, "???", sizeof(buf));
break;
}
error = sysctl_handle_string(oidp, buf, sizeof(buf), req);
if (error != 0 || req->newptr == NULL)
return (error);
if (strcasecmp(buf, "io") == 0)
cfg->source = ZY7_PL_FCLK_SRC_IO;
else if (strcasecmp(buf, "ddr") == 0)
cfg->source = ZY7_PL_FCLK_SRC_DDR;
else if (strcasecmp(buf, "arm") == 0)
cfg->source = ZY7_PL_FCLK_SRC_ARM;
else
return (EINVAL);
zy7_pl_fclk_set_source(unit, cfg->source);
if (cfg->frequency > 0)
cfg->actual_frequency = zy7_pl_fclk_get_freq(unit);
return (0);
}
static int
zy7_devcfg_fclk_sysctl_freq(SYSCTL_HANDLER_ARGS)
{
struct zy7_fclk_config *cfg;
int unit;
int error;
int freq;
int new_actual_freq;
cfg = arg1;
unit = arg2;
freq = cfg->frequency;
error = sysctl_handle_int(oidp, &freq, 0, req);
if (error != 0 || req->newptr == NULL)
return (error);
if (freq > 0) {
new_actual_freq = zy7_pl_fclk_set_freq(unit, freq);
if (new_actual_freq < 0)
return (EINVAL);
if (!zy7_pl_fclk_enabled(unit))
zy7_pl_fclk_enable(unit);
}
else {
zy7_pl_fclk_disable(unit);
new_actual_freq = 0;
}
cfg->frequency = freq;
cfg->actual_frequency = new_actual_freq;
return (0);
}
static int
zy7_devcfg_fclk_sysctl_level_shifters(SYSCTL_HANDLER_ARGS)
{
int error, enabled;
enabled = zy7_pl_level_shifters_enabled();
error = sysctl_handle_int(oidp, &enabled, 0, req);
if (error != 0 || req->newptr == NULL)
return (error);
if (enabled)
zy7_pl_level_shifters_enable();
else
zy7_pl_level_shifters_disable();
return (0);
}
static int
zy7_devcfg_init_fclk_sysctl(struct zy7_devcfg_softc *sc)
{
struct sysctl_oid *fclk_node;
char fclk_num[4];
int i;
sysctl_ctx_init(&sc->sysctl_tree);
sc->sysctl_tree_top = SYSCTL_ADD_NODE(&sc->sysctl_tree,
SYSCTL_STATIC_CHILDREN(_hw_fpga), OID_AUTO, "fclk",
CTLFLAG_RD, 0, "");
if (sc->sysctl_tree_top == NULL) {
sysctl_ctx_free(&sc->sysctl_tree);
return (-1);
}
for (i = 0; i < FCLK_NUM; i++) {
snprintf(fclk_num, sizeof(fclk_num), "%d", i);
fclk_node = SYSCTL_ADD_NODE(&sc->sysctl_tree,
SYSCTL_CHILDREN(sc->sysctl_tree_top), OID_AUTO, fclk_num,
CTLFLAG_RD, 0, "");
SYSCTL_ADD_INT(&sc->sysctl_tree,
SYSCTL_CHILDREN(fclk_node), OID_AUTO,
"actual_freq", CTLFLAG_RD,
&fclk_configs[i].actual_frequency, i,
"Actual frequency");
SYSCTL_ADD_PROC(&sc->sysctl_tree,
SYSCTL_CHILDREN(fclk_node), OID_AUTO,
"freq", CTLFLAG_RW | CTLTYPE_INT,
&fclk_configs[i], i,
zy7_devcfg_fclk_sysctl_freq,
"I", "Configured frequency");
SYSCTL_ADD_PROC(&sc->sysctl_tree,
SYSCTL_CHILDREN(fclk_node), OID_AUTO,
"source", CTLFLAG_RW | CTLTYPE_STRING,
&fclk_configs[i], i,
zy7_devcfg_fclk_sysctl_source,
"A", "Clock source");
}
return (0);
}
/* Enable programming the PL through PCAP. */
static void
@ -334,7 +496,6 @@ zy7_dma_cb2(void *arg, bus_dma_segment_t *seg, int nsegs, int error)
*(bus_addr_t *)arg = seg[0].ds_addr;
}
static int
zy7_devcfg_open(struct cdev *dev, int oflags, int devtype, struct thread *td)
{
@ -474,10 +635,11 @@ zy7_devcfg_close(struct cdev *dev, int fflag, int devtype, struct thread *td)
bus_dma_tag_destroy(sc->dma_tag);
DEVCFG_SC_UNLOCK(sc);
zy7_slcr_postload_pl(zy7_en_level_shifters);
return (0);
}
static void
zy7_devcfg_intr(void *arg)
{
@ -549,6 +711,7 @@ static int
zy7_devcfg_attach(device_t dev)
{
struct zy7_devcfg_softc *sc = device_get_softc(dev);
int i;
int rid, err;
/* Allow only one attach. */
@ -612,6 +775,17 @@ zy7_devcfg_attach(device_t dev)
ZY7_DEVCFG_MCTRL_PS_VERS_MASK) >>
ZY7_DEVCFG_MCTRL_PS_VERS_SHIFT;
for (i = 0; i < FCLK_NUM; i++) {
fclk_configs[i].source = zy7_pl_fclk_get_source(i);
fclk_configs[i].actual_frequency =
zy7_pl_fclk_enabled(i) ? zy7_pl_fclk_get_freq(i) : 0;
/* Initially assume actual frequency is the configure one */
fclk_configs[i].frequency = fclk_configs[i].actual_frequency;
}
if (zy7_devcfg_init_fclk_sysctl(sc) < 0)
device_printf(dev, "failed to initialized sysctl tree\n");
return (0);
}
@ -620,6 +794,11 @@ zy7_devcfg_detach(device_t dev)
{
struct zy7_devcfg_softc *sc = device_get_softc(dev);
if (sc->sysctl_tree_top != NULL) {
sysctl_ctx_free(&sc->sysctl_tree);
sc->sysctl_tree_top = NULL;
}
if (device_is_attached(dev))
bus_generic_detach(dev);

292
sys/arm/xilinx/zy7_slcr.c
View File

@ -79,7 +79,6 @@ extern void (*zynq7_cpu_reset);
#define ZYNQ_DEFAULT_PS_CLK_FREQUENCY 33333333 /* 33.3 Mhz */
SYSCTL_NODE(_hw, OID_AUTO, zynq, CTLFLAG_RD, 0, "Xilinx Zynq-7000");
static char zynq_bootmode[64];
@ -126,7 +125,6 @@ zy7_slcr_lock(struct zy7_slcr_softc *sc)
WR4(sc, ZY7_SLCR_LOCK, ZY7_SLCR_LOCK_MAGIC);
}
static void
zy7_slcr_cpu_reset(void)
{
@ -255,6 +253,296 @@ cgem_set_ref_clk(int unit, int frequency)
return (0);
}
/*
* PL clocks management function
*/
int
zy7_pl_fclk_set_source(int unit, int source)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
uint32_t reg;
if (!sc)
return (-1);
ZSLCR_LOCK(sc);
/* Unlock SLCR registers. */
zy7_slcr_unlock(sc);
/* Modify FPGAx source. */
reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
reg &= ~(ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK);
reg |= (source << ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_SHIFT);
WR4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit), reg);
/* Lock SLCR registers. */
zy7_slcr_lock(sc);
ZSLCR_UNLOCK(sc);
return (0);
}
int
zy7_pl_fclk_get_source(int unit)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
uint32_t reg;
int source;
if (!sc)
return (-1);
ZSLCR_LOCK(sc);
/* Modify GEM reference clock. */
reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
source = (reg & ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK) >>
ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_SHIFT;
/* ZY7_PL_FCLK_SRC_IO is actually b0x */
if ((source & 2) == 0)
source = ZY7_PL_FCLK_SRC_IO;
ZSLCR_UNLOCK(sc);
return (source);
}
int
zy7_pl_fclk_set_freq(int unit, int frequency)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
int div0, div1;
int base_frequency;
uint32_t reg;
int source;
if (!sc)
return (-1);
source = zy7_pl_fclk_get_source(unit);
switch (source) {
case ZY7_PL_FCLK_SRC_IO:
base_frequency = io_pll_frequency;
break;
case ZY7_PL_FCLK_SRC_ARM:
base_frequency = arm_pll_frequency;
break;
case ZY7_PL_FCLK_SRC_DDR:
base_frequency = ddr_pll_frequency;
break;
default:
return (-1);
}
/* Find suitable divisor pairs. Round result to nearest khz
* to test for match.
*/
for (div1 = 1; div1 <= ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR_MAX; div1++) {
div0 = (base_frequency + div1 * frequency / 2) /
div1 / frequency;
if (div0 > 0 && div0 <= ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR_MAX &&
((base_frequency / div0 / div1) + 500) / 1000 ==
(frequency + 500) / 1000)
break;
}
if (div1 > ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR_MAX)
return (-1);
ZSLCR_LOCK(sc);
/* Unlock SLCR registers. */
zy7_slcr_unlock(sc);
/* Modify FPGAx reference clock. */
reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
reg &= ~(ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK |
ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_MASK);
reg |= (div1 << ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_SHIFT) |
(div0 << ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_SHIFT);
WR4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit), reg);
/* Lock SLCR registers. */
zy7_slcr_lock(sc);
ZSLCR_UNLOCK(sc);
return (base_frequency / div0 / div1);
}
int
zy7_pl_fclk_get_freq(int unit)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
int div0, div1;
int base_frequency;
int frequency;
uint32_t reg;
int source;
if (!sc)
return (-1);
source = zy7_pl_fclk_get_source(unit);
switch (source) {
case ZY7_PL_FCLK_SRC_IO:
base_frequency = io_pll_frequency;
break;
case ZY7_PL_FCLK_SRC_ARM:
base_frequency = arm_pll_frequency;
break;
case ZY7_PL_FCLK_SRC_DDR:
base_frequency = ddr_pll_frequency;
break;
default:
return (-1);
}
ZSLCR_LOCK(sc);
/* Modify FPGAx reference clock. */
reg = RD4(sc, ZY7_SLCR_FPGA_CLK_CTRL(unit));
div1 = (reg & ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK) >>
ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_SHIFT;
div0 = (reg & ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_MASK) >>
ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_SHIFT;
ZSLCR_UNLOCK(sc);
if (div0 == 0)
div0 = 1;
if (div1 == 0)
div1 = 1;
frequency = (base_frequency / div0 / div1);
/* Round to KHz */
frequency = (frequency + 500) / 1000;
frequency = frequency * 1000;
return (frequency);
}
int
zy7_pl_fclk_enable(int unit)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
if (!sc)
return (-1);
ZSLCR_LOCK(sc);
/* Unlock SLCR registers. */
zy7_slcr_unlock(sc);
WR4(sc, ZY7_SLCR_FPGA_THR_CTRL(unit), 0);
WR4(sc, ZY7_SLCR_FPGA_THR_CNT(unit), 0);
/* Lock SLCR registers. */
zy7_slcr_lock(sc);
ZSLCR_UNLOCK(sc);
return (0);
}
int
zy7_pl_fclk_disable(int unit)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
if (!sc)
return (-1);
ZSLCR_LOCK(sc);
/* Unlock SLCR registers. */
zy7_slcr_unlock(sc);
WR4(sc, ZY7_SLCR_FPGA_THR_CTRL(unit), 0);
WR4(sc, ZY7_SLCR_FPGA_THR_CNT(unit), 1);
/* Lock SLCR registers. */
zy7_slcr_lock(sc);
ZSLCR_UNLOCK(sc);
return (0);
}
int
zy7_pl_fclk_enabled(int unit)
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
uint32_t reg;
if (!sc)
return (-1);
ZSLCR_LOCK(sc);
reg = RD4(sc, ZY7_SLCR_FPGA_THR_CNT(unit));
ZSLCR_UNLOCK(sc);
return !(reg & 1);
}
int
zy7_pl_level_shifters_enabled()
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
uint32_t reg;
if (!sc)
return (-1);
ZSLCR_LOCK(sc);
reg = RD4(sc, ZY7_SLCR_LVL_SHFTR_EN);
ZSLCR_UNLOCK(sc);
return (reg == ZY7_SLCR_LVL_SHFTR_EN_ALL);
}
void
zy7_pl_level_shifters_enable()
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
if (!sc)
return;
ZSLCR_LOCK(sc);
zy7_slcr_unlock(sc);
WR4(sc, ZY7_SLCR_LVL_SHFTR_EN, ZY7_SLCR_LVL_SHFTR_EN_ALL);
zy7_slcr_lock(sc);
ZSLCR_UNLOCK(sc);
}
void
zy7_pl_level_shifters_disable()
{
struct zy7_slcr_softc *sc = zy7_slcr_softc_p;
if (!sc)
return;
ZSLCR_LOCK(sc);
zy7_slcr_unlock(sc);
WR4(sc, ZY7_SLCR_LVL_SHFTR_EN, 0);
zy7_slcr_lock(sc);
ZSLCR_UNLOCK(sc);
}
static int
zy7_slcr_probe(device_t dev)
{

36
sys/arm/xilinx/zy7_slcr.h
View File

@ -37,7 +37,6 @@
* are in appendix B.28.
*/
#ifndef _ZY7_SLCR_H_
#define _ZY7_SLCR_H_
@ -148,10 +147,19 @@
#define ZY7_SLCR_DBG_CLK_CTRL 0x0164
#define ZY7_SLCR_PCAP_CLK_CTRL 0x0168
#define ZY7_SLCR_TOPSW_CLK_CTRL 0x016c /* central intercnn clk ctrl */
#define ZY7_SLCR_FPGA0_CLK_CTRL 0x0170
#define ZY7_SLCR_FPGA1_CLK_CTRL 0x0180
#define ZY7_SLCR_FPGA2_CLK_CTRL 0x0190
#define ZY7_SLCR_FPGA3_CLK_CTRL 0x01a0
#define ZY7_SLCR_FPGA_CLK_CTRL(unit) (0x0170 + 0x10*(unit))
#define ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_SHIFT 20
#define ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR1_MASK (0x3f << 20)
#define ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_SHIFT 8
#define ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR0_MASK (0x3f << 8)
#define ZY7_SLCR_FPGA_CLK_CTRL_DIVISOR_MAX 0x3f
#define ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_SHIFT 4
#define ZY7_SLCR_FPGA_CLK_CTRL_SRCSEL_MASK (3 << 4)
#define ZY7_SLCR_FPGA_THR_CTRL(unit) (0x0174 + 0x10*(unit))
#define ZY7_SLCR_FPGA_THR_CTRL_CNT_RST (1 << 1)
#define ZY7_SLCR_FPGA_THR_CTRL_CPU_START (1 << 0)
#define ZY7_SLCR_FPGA_THR_CNT(unit) (0x0178 + 0x10*(unit))
#define ZY7_SLCR_FPGA_THR_STA(unit) (0x017c + 0x10*(unit))
#define ZY7_SLCR_CLK_621_TRUE 0x01c4 /* cpu clock ratio mode */
/* Reset controls. */
@ -288,5 +296,23 @@
extern void zy7_slcr_preload_pl(void);
extern void zy7_slcr_postload_pl(int en_level_shifters);
extern int cgem_set_ref_clk(int unit, int frequency);
/* Should be consistent with SRCSEL field of FPGAx_CLK_CTRL */
#define ZY7_PL_FCLK_SRC_IO 0
#define ZY7_PL_FCLK_SRC_IO_ALT 1 /* ZY7_PL_FCLK_SRC_IO is b0x */
#define ZY7_PL_FCLK_SRC_ARM 2
#define ZY7_PL_FCLK_SRC_DDR 3
int zy7_pl_fclk_set_source(int unit, int source);
int zy7_pl_fclk_get_source(int unit);
int zy7_pl_fclk_set_freq(int unit, int freq);
int zy7_pl_fclk_get_freq(int unit);
int zy7_pl_fclk_enable(int unit);
int zy7_pl_fclk_disable(int unit);
int zy7_pl_fclk_enabled(int unit);
int zy7_pl_level_shifters_enabled(void);
void zy7_pl_level_shifters_enable(void);
void zy7_pl_level_shifters_disable(void);
#endif
#endif /* _ZY7_SLCR_H_ */

7
sys/boot/amd64/boot1.efi/boot1.c
View File

@ -307,12 +307,19 @@ load(const char *fname)
/* XXX: For secure boot, we need our own loader here */
status = systab->BootServices->LoadImage(TRUE, image, bootdevpath,
buffer, bufsize, &loaderhandle);
if (EFI_ERROR(status))
printf("LoadImage failed with error %d\n", status);
status = systab->BootServices->HandleProtocol(loaderhandle,
&LoadedImageGUID, (VOID**)&loaded_image);
if (EFI_ERROR(status))
printf("HandleProtocol failed with error %d\n", status);
loaded_image->DeviceHandle = bootdevhandle;
status = systab->BootServices->StartImage(loaderhandle, NULL, NULL);
if (EFI_ERROR(status))
printf("StartImage failed with error %d\n", status);
}
static void

4
sys/boot/i386/boot2/Makefile
View File

@ -41,8 +41,10 @@ CFLAGS= -fomit-frame-pointer \
CFLAGS.gcc+= -Os \
-fno-guess-branch-probability \
-fno-unit-at-a-time \
-mno-align-long-strings \
--param max-inline-insns-single=100
.if ${COMPILER_TYPE} == "gcc" && ${COMPILER_VERSION} <= 40201
CFLAGS.gcc+= -mno-align-long-strings
.endif
CFLAGS.clang+= -Oz ${CLANG_OPT_SMALL}

4
sys/boot/pc98/boot2/Makefile
View File

@ -39,8 +39,10 @@ CFLAGS= -fomit-frame-pointer \
CFLAGS.gcc+= -Os \
-fno-guess-branch-probability \
-fno-unit-at-a-time \
-mno-align-long-strings \
--param max-inline-insns-single=100
.if ${COMPILER_TYPE} == "gcc" && ${COMPILER_VERSION} <= 40201
CFLAGS.gcc+= -mno-align-long-strings
.endif
# Set machine type to PC98_SYSTEM_PARAMETER
#CFLAGS+= -DSET_MACHINE_TYPE

7
sys/cam/scsi/scsi_da.c
View File

@ -1175,6 +1175,13 @@ static struct da_quirk_entry da_quirk_table[] =
{ T_DIRECT, SIP_MEDIA_FIXED, "ATA", "SG9XCS2D*", "*" },
/*quirks*/DA_Q_4K
},
{
/*
* Hama Innostor USB-Stick
*/
{ T_DIRECT, SIP_MEDIA_REMOVABLE, "Innostor", "Innostor*", "*" },
/*quirks*/DA_Q_NO_RC16
},
};
static disk_strategy_t dastrategy;

4
sys/cddl/contrib/opensolaris/uts/common/sys/dtrace.h
View File

@ -2436,6 +2436,10 @@ extern void dtrace_helpers_destroy(proc_t *);
#elif defined(__arm__)
#define DTRACE_INVOP_SHIFT 4
#define DTRACE_INVOP_MASK ((1 << DTRACE_INVOP_SHIFT) - 1)
#define DTRACE_INVOP_DATA(x) ((x) >> DTRACE_INVOP_SHIFT)
#define DTRACE_INVOP_PUSHM 1
#define DTRACE_INVOP_POPM 2
#define DTRACE_INVOP_B 3

8
sys/cddl/dev/dtrace/arm/dtrace_asm.S
View File

@ -208,12 +208,10 @@ EENTRY(dtrace_casptr)
1: ldrex r3, [r0] /* Load target */
cmp r3, r1 /* Check if *target == cmp */
bne 2f /* No, return */
strex r3, r2, [r0] /* Store new to target */
cmp r3, #0 /* Did the store succeed? */
strex ip, r2, [r0] /* Store new to target */
cmp ip, #0 /* Did the store succeed? */
bne 1b /* No, try again */
mov r0, r2 /* Return the new value of the store */
2: movne r0, r3 /* The first compare failed, return */
/* the value loaded from memory */
2: mov r0, r3 /* Return the value loaded from target */
RET
EEND(dtrace_casptr)
END(dtrace_cas32)

104
sys/cddl/dev/dtrace/arm/dtrace_subr.c
View File

@ -46,11 +46,16 @@ __FBSDID("$FreeBSD$");
#include <vm/pmap.h>
#define DELAYBRANCH(x) ((int)(x) < 0)
#define BIT_PC 15
#define BIT_LR 14
#define BIT_SP 13
extern uintptr_t dtrace_in_probe_addr;
extern int dtrace_in_probe;
extern dtrace_id_t dtrace_probeid_error;
extern int (*dtrace_invop_jump_addr)(struct trapframe *);
extern void dtrace_getnanotime(struct timespec *tsp);
int dtrace_invop(uintptr_t, uintptr_t *, uintptr_t);
void dtrace_invop_init(void);
@ -169,11 +174,11 @@ dtrace_gethrtime()
uint64_t
dtrace_gethrestime(void)
{
struct timespec curtime;
struct timespec current_time;
getnanotime(&curtime);
dtrace_getnanotime(&current_time);
return (curtime.tv_sec * 1000000000UL + curtime.tv_nsec);
return (current_time.tv_sec * 1000000000UL + current_time.tv_nsec);
}
/* Function to handle DTrace traps during probes. See amd64/amd64/trap.c */
@ -231,16 +236,97 @@ dtrace_probe_error(dtrace_state_t *state, dtrace_epid_t epid, int which,
static int
dtrace_invop_start(struct trapframe *frame)
{
printf("IMPLEMENT ME: %s\n", __func__);
switch (dtrace_invop(frame->tf_pc, (uintptr_t *)frame, frame->tf_pc)) {
register_t *r0, *sp;
int data, invop, reg, update_sp;
invop = dtrace_invop(frame->tf_pc, (uintptr_t *)frame, frame->tf_pc);
switch (invop & DTRACE_INVOP_MASK) {
case DTRACE_INVOP_PUSHM:
// TODO:
sp = (register_t *)frame->tf_svc_sp;
r0 = &frame->tf_r0;
data = DTRACE_INVOP_DATA(invop);
/*
* Store the pc, lr, and sp. These have their own
* entries in the struct.
*/
if (data & (1 << BIT_PC)) {
sp--;
*sp = frame->tf_pc;
}
if (data & (1 << BIT_LR)) {
sp--;
*sp = frame->tf_svc_lr;
}
if (data & (1 << BIT_SP)) {
sp--;
*sp = frame->tf_svc_sp;
}
/* Store the general registers */
for (reg = 12; reg >= 0; reg--) {
if (data & (1 << reg)) {
sp--;
*sp = r0[reg];
}
}
/* Update the stack pointer and program counter to continue */
frame->tf_svc_sp = (register_t)sp;
frame->tf_pc += 4;
break;
case DTRACE_INVOP_POPM:
// TODO:
sp = (register_t *)frame->tf_svc_sp;
r0 = &frame->tf_r0;
data = DTRACE_INVOP_DATA(invop);
/* Read the general registers */
for (reg = 0; reg <= 12; reg++) {
if (data & (1 << reg)) {
r0[reg] = *sp;
sp++;
}
}
/*
* Set the stack pointer. If we don't update it here we will
* need to update it at the end as the instruction would do
*/
update_sp = 1;
if (data & (1 << BIT_SP)) {
frame->tf_svc_sp = *sp;
*sp++;
update_sp = 0;
}
/* Update the link register, we need to use the correct copy */
if (data & (1 << BIT_LR)) {
frame->tf_svc_lr = *sp;
*sp++;
}
/*
* And the program counter. If it's not in the list skip over
* it when we return so to not hit this again.
*/
if (data & (1 << BIT_PC)) {
frame->tf_pc = *sp;
*sp++;
} else
frame->tf_pc += 4;
/* Update the stack pointer if we haven't already done so */
if (update_sp)
frame->tf_svc_sp = (register_t)sp;
break;
case DTRACE_INVOP_B:
// TODO
data = DTRACE_INVOP_DATA(invop) & 0x00ffffff;
/* Sign extend the data */
if ((data & (1 << 23)) != 0)
data |= 0xff000000;
/* The data is the number of 4-byte words to change the pc */
data *= 4;
data += 8;
frame->tf_pc += data;
break;
default:
return (-1);

2
sys/cddl/dev/dtrace/powerpc/dtrace_subr.c
View File

@ -285,7 +285,7 @@ dtrace_trap(struct trapframe *frame, u_int type)
case EXC_DSE:
/* Flag a bad address. */
cpu_core[curcpu].cpuc_dtrace_flags |= CPU_DTRACE_BADADDR;
cpu_core[curcpu].cpuc_dtrace_illval = frame->cpu.aim.dar;
cpu_core[curcpu].cpuc_dtrace_illval = frame->dar;
/*
* Offset the instruction pointer to the instruction

11
sys/cddl/dev/fbt/arm/fbt_isa.c
View File

@ -38,7 +38,7 @@
#include "fbt.h"
#define FBT_PATCHVAL 0xe06a0cfe /* illegal instruction */
#define FBT_PATCHVAL 0xe7f000f0 /* Specified undefined instruction */
#define FBT_PUSHM 0xe92d0000
#define FBT_POPM 0xe8bd0000
@ -66,7 +66,7 @@ fbt_invop(uintptr_t addr, uintptr_t *stack, uintptr_t rval)
cpu->cpu_dtrace_caller = 0;
return (fbt->fbtp_rval);
return (fbt->fbtp_rval | (fbt->fbtp_savedval << DTRACE_INVOP_SHIFT));
}
}
@ -105,6 +105,13 @@ fbt_provide_module_function(linker_file_t lf, int symindx,
if (name[0] == '_' && name[1] == '_')
return (0);
/*
* Architecture-specific exclusion list, largely to do with FBT trap
* processing, to prevent reentrance.
*/
if (strcmp(name, "undefinedinstruction") == 0)
return (0);
instr = (uint32_t *)symval->value;
limit = (uint32_t *)(symval->value + symval->size);

3
sys/conf/Makefile.powerpc
View File

@ -37,10 +37,9 @@ INCLUDES+= -I$S/contrib/libfdt
CFLAGS+= -msoft-float -Wa,-many
.if ${MACHINE_ARCH} == "powerpc64"
# Build position-independent kernel
CFLAGS+= -fPIC
LDFLAGS+= -pie
.endif
.if !empty(DDB_ENABLED)
CFLAGS+= -fno-omit-frame-pointer

2
sys/dev/acpica/acpi.c
View File

@ -1071,7 +1071,7 @@ acpi_hint_device_unit(device_t acdev, device_t child, const char *name,
}
/*
* Fech the NUMA domain for the given device.
* Fetch the NUMA domain for the given device.
*
* If a device has a _PXM method, map that to a NUMA domain.
*

82
sys/dev/cxgbe/t4_netmap.c
View File

@ -58,6 +58,25 @@ extern int fl_pad; /* XXXNM */
extern int spg_len; /* XXXNM */
extern int fl_pktshift; /* XXXNM */
SYSCTL_NODE(_hw, OID_AUTO, cxgbe, CTLFLAG_RD, 0, "cxgbe netmap parameters");
/*
* 0 = normal netmap rx
* 1 = black hole
* 2 = supermassive black hole (buffer packing enabled)
*/
int black_hole = 0;
SYSCTL_INT(_hw_cxgbe, OID_AUTO, nm_black_hole, CTLFLAG_RDTUN, &black_hole, 0,
"Sink incoming packets.");
int rx_ndesc = 256;
SYSCTL_INT(_hw_cxgbe, OID_AUTO, nm_rx_ndesc, CTLFLAG_RWTUN,
&rx_ndesc, 0, "# of rx descriptors after which the hw cidx is updated.");
int holdoff_tmr_idx = 2;
SYSCTL_INT(_hw_cxgbe, OID_AUTO, nm_holdoff_tmr_idx, CTLFLAG_RWTUN,
&holdoff_tmr_idx, 0, "Holdoff timer index for netmap rx queues.");
/* netmap ifnet routines */
static void cxgbe_nm_init(void *);
static int cxgbe_nm_ioctl(struct ifnet *, unsigned long, caddr_t);
@ -275,11 +294,12 @@ alloc_nm_rxq_hwq(struct port_info *pi, struct sge_nm_rxq *nm_rxq, int cong)
c.iqns_to_fl0congen |=
htobe32(V_FW_IQ_CMD_FL0HOSTFCMODE(X_HOSTFCMODE_NONE) |
F_FW_IQ_CMD_FL0FETCHRO | F_FW_IQ_CMD_FL0DATARO |
(fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0));
(fl_pad ? F_FW_IQ_CMD_FL0PADEN : 0) |
(black_hole == 2 ? F_FW_IQ_CMD_FL0PACKEN : 0));
c.fl0dcaen_to_fl0cidxfthresh =
htobe16(V_FW_IQ_CMD_FL0FBMIN(X_FETCHBURSTMIN_64B) |
V_FW_IQ_CMD_FL0FBMAX(X_FETCHBURSTMAX_512B));
c.fl0size = htobe16(na->num_rx_desc + spg_len / EQ_ESIZE);
c.fl0size = htobe16(na->num_rx_desc / 8 + spg_len / EQ_ESIZE);
c.fl0addr = htobe64(nm_rxq->fl_ba);
rc = -t4_wr_mbox(sc, sc->mbox, &c, sizeof(c), &c);
@ -344,8 +364,8 @@ alloc_nm_rxq_hwq(struct port_info *pi, struct sge_nm_rxq *nm_rxq, int cong)
}
t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
V_SEINTARM(V_QINTR_TIMER_IDX(1)) |
V_INGRESSQID(nm_rxq->iq_cntxt_id));
V_INGRESSQID(nm_rxq->iq_cntxt_id) |
V_SEINTARM(V_QINTR_TIMER_IDX(holdoff_tmr_idx)));
return (rc);
}
@ -491,13 +511,14 @@ cxgbe_netmap_on(struct adapter *sc, struct port_info *pi, struct ifnet *ifp,
/* We deal with 8 bufs at a time */
MPASS((na->num_rx_desc & 7) == 0);
MPASS(na->num_rx_desc == nm_rxq->fl_sidx);
for (j = 0; j < nm_rxq->fl_sidx - 8; j++) {
for (j = 0; j < nm_rxq->fl_sidx; j++) {
uint64_t ba;
PNMB(na, &slot[j], &ba);
MPASS(ba != 0);
nm_rxq->fl_desc[j] = htobe64(ba | hwidx);
}
nm_rxq->fl_pidx = j;
j = nm_rxq->fl_pidx = nm_rxq->fl_sidx - 8;
MPASS((j & 7) == 0);
j /= 8; /* driver pidx to hardware pidx */
wmb();
@ -708,6 +729,7 @@ cxgbe_nm_tx(struct adapter *sc, struct sge_nm_txq *nm_txq,
for (i = 0; i < n; i++) {
slot = &ring->slot[kring->nr_hwcur];
PNMB(kring->na, slot, &ba);
MPASS(ba != 0);
cpl->ctrl0 = nm_txq->cpl_ctrl0;
cpl->pack = 0;
@ -904,6 +926,9 @@ cxgbe_netmap_rxsync(struct netmap_kring *kring, int flags)
u_int n;
int force_update = (flags & NAF_FORCE_READ) || kring->nr_kflags & NKR_PENDINTR;
if (black_hole)
return (0); /* No updates ever. */
if (netmap_no_pendintr || force_update) {
kring->nr_hwtail = atomic_load_acq_32(&nm_rxq->fl_cidx);
kring->nr_kflags &= ~NKR_PENDINTR;
@ -933,6 +958,7 @@ cxgbe_netmap_rxsync(struct netmap_kring *kring, int flags)
while (n > 0) {
for (i = 0; i < 8; i++, fl_pidx++, slot++) {
PNMB(na, slot, &ba);
MPASS(ba != 0);
nm_rxq->fl_desc[fl_pidx] = htobe64(ba | hwidx);
slot->flags &= ~NS_BUF_CHANGED;
MPASS(fl_pidx <= nm_rxq->fl_sidx);
@ -1107,10 +1133,10 @@ t4_nm_intr(void *arg)
struct netmap_ring *ring = kring->ring;
struct iq_desc *d = &nm_rxq->iq_desc[nm_rxq->iq_cidx];
uint32_t lq;
u_int n = 0;
int processed = 0;
u_int n = 0, work = 0;
uint8_t opcode;
uint32_t fl_cidx = atomic_load_acq_32(&nm_rxq->fl_cidx);
u_int fl_credits = fl_cidx & 7;
while ((d->rsp.u.type_gen & F_RSPD_GEN) == nm_rxq->iq_gen) {
@ -1121,8 +1147,10 @@ t4_nm_intr(void *arg)
switch (G_RSPD_TYPE(d->rsp.u.type_gen)) {
case X_RSPD_TYPE_FLBUF:
/* No buffer packing so new buf every time */
MPASS(lq & F_RSPD_NEWBUF);
if (black_hole != 2) {
/* No buffer packing so new buf every time */
MPASS(lq & F_RSPD_NEWBUF);
}
/* fall through */
@ -1138,7 +1166,9 @@ t4_nm_intr(void *arg)
case CPL_RX_PKT:
ring->slot[fl_cidx].len = G_RSPD_LEN(lq) - fl_pktshift;
ring->slot[fl_cidx].flags = kring->nkr_slot_flags;
if (__predict_false(++fl_cidx == nm_rxq->fl_sidx))
fl_cidx += (lq & F_RSPD_NEWBUF) ? 1 : 0;
fl_credits += (lq & F_RSPD_NEWBUF) ? 1 : 0;
if (__predict_false(fl_cidx == nm_rxq->fl_sidx))
fl_cidx = 0;
break;
default:
@ -1164,19 +1194,37 @@ t4_nm_intr(void *arg)
nm_rxq->iq_gen ^= F_RSPD_GEN;
}
if (__predict_false(++n == 64)) { /* XXXNM: tune */
if (__predict_false(++n == rx_ndesc)) {
atomic_store_rel_32(&nm_rxq->fl_cidx, fl_cidx);
if (black_hole && fl_credits >= 8) {
fl_credits /= 8;
IDXINCR(nm_rxq->fl_pidx, fl_credits * 8,
nm_rxq->fl_sidx);
t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
nm_rxq->fl_db_val | V_PIDX(fl_credits));
fl_credits = fl_cidx & 7;
} else if (!black_hole) {
netmap_rx_irq(ifp, nm_rxq->nid, &work);
MPASS(work != 0);
}
t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS),
V_CIDXINC(n) | V_INGRESSQID(nm_rxq->iq_cntxt_id) |
V_SEINTARM(V_QINTR_TIMER_IDX(X_TIMERREG_UPDATE_CIDX)));
n = 0;
}
}
if (fl_cidx != nm_rxq->fl_cidx) {
atomic_store_rel_32(&nm_rxq->fl_cidx, fl_cidx);
netmap_rx_irq(ifp, nm_rxq->nid, &processed);
}
atomic_store_rel_32(&nm_rxq->fl_cidx, fl_cidx);
if (black_hole) {
fl_credits /= 8;
IDXINCR(nm_rxq->fl_pidx, fl_credits * 8, nm_rxq->fl_sidx);
t4_write_reg(sc, MYPF_REG(A_SGE_PF_KDOORBELL),
nm_rxq->fl_db_val | V_PIDX(fl_credits));
} else
netmap_rx_irq(ifp, nm_rxq->nid, &work);
t4_write_reg(sc, MYPF_REG(A_SGE_PF_GTS), V_CIDXINC(n) |
V_INGRESSQID((u32)nm_rxq->iq_cntxt_id) |
V_SEINTARM(V_QINTR_TIMER_IDX(1)));
V_SEINTARM(V_QINTR_TIMER_IDX(holdoff_tmr_idx)));
}
#endif

5
sys/dev/drm2/drm_irq.c
View File

@ -883,7 +883,7 @@ void drm_vblank_off(struct drm_device *dev, int crtc)
*/
void drm_vblank_pre_modeset(struct drm_device *dev, int crtc)
{
/* vblank is not initialized (IRQ not installed ?) */
/* vblank is not initialized (IRQ not installed ?), or has been freed */
if (!dev->num_crtcs)
return;
/*
@ -902,6 +902,9 @@ void drm_vblank_pre_modeset(struct drm_device *dev, int crtc)
void drm_vblank_post_modeset(struct drm_device *dev, int crtc)
{
/* vblank is not initialized (IRQ not installed ?), or has been freed */
if (!dev->num_crtcs)
return;
if (dev->vblank_inmodeset[crtc]) {
mtx_lock(&dev->vbl_lock);

13
sys/dev/fb/fbd.c
View File

@ -51,6 +51,9 @@ __FBSDID("$FreeBSD$");
#include <dev/vt/vt.h>
#include <dev/vt/hw/fb/vt_fb.h>
#include <vm/vm.h>
#include <vm/pmap.h>
#include "fb_if.h"
LIST_HEAD(fb_list_head_t, fb_list_entry) fb_list_head =
@ -167,11 +170,14 @@ fb_mmap(struct cdev *dev, vm_ooffset_t offset, vm_paddr_t *paddr, int nprot,
info = dev->si_drv1;
if ((info->fb_flags & FB_FLAG_NOMMAP) || info->fb_pbase == 0)
if (info->fb_flags & FB_FLAG_NOMMAP)
return (ENODEV);
if (offset < info->fb_size) {
*paddr = info->fb_pbase + offset;
if (offset >= 0 && offset < info->fb_size) {
if (info->fb_pbase == 0)
*paddr = vtophys((uint8_t *)info->fb_vbase + offset);
else
*paddr = info->fb_pbase + offset;
return (0);
}
return (EINVAL);
@ -356,5 +362,6 @@ devclass_t fbd_devclass;
DRIVER_MODULE(fbd, fb, fbd_driver, fbd_devclass, 0, 0);
DRIVER_MODULE(fbd, drmn, fbd_driver, fbd_devclass, 0, 0);
DRIVER_MODULE(fbd, udl, fbd_driver, fbd_devclass, 0, 0);
MODULE_VERSION(fbd, 1);

25
sys/dev/gpio/gpiobus.c
View File

@ -53,6 +53,7 @@ static int gpiobus_attach(device_t);
static int gpiobus_detach(device_t);
static int gpiobus_suspend(device_t);
static int gpiobus_resume(device_t);
static void gpiobus_probe_nomatch(device_t, device_t);
static int gpiobus_print_child(device_t, device_t);
static int gpiobus_child_location_str(device_t, device_t, char *, size_t);
static int gpiobus_child_pnpinfo_str(device_t, device_t, char *, size_t);
@ -229,21 +230,20 @@ gpiobus_free_ivars(struct gpiobus_ivar *devi)
}
int
gpiobus_map_pin(device_t bus, device_t child, uint32_t pin)
gpiobus_map_pin(device_t bus, uint32_t pin)
{
struct gpiobus_softc *sc;
sc = device_get_softc(bus);
/* Consistency check. */
if (pin >= sc->sc_npins) {
device_printf(child,
device_printf(bus,
"invalid pin %d, max: %d\n", pin, sc->sc_npins - 1);
return (-1);
}
/* Mark pin as mapped and give warning if it's already mapped. */
if (sc->sc_pins_mapped[pin]) {
device_printf(child,
"warning: pin %d is already mapped\n", pin);
device_printf(bus, "warning: pin %d is already mapped\n", pin);
return (-1);
}
sc->sc_pins_mapped[pin] = 1;
@ -276,7 +276,7 @@ gpiobus_parse_pins(struct gpiobus_softc *sc, device_t child, int mask)
if ((mask & (1 << i)) == 0)
continue;
/* Reserve the GPIO pin. */
if (gpiobus_map_pin(sc->sc_busdev, child, i) != 0) {
if (gpiobus_map_pin(sc->sc_busdev, i) != 0) {
gpiobus_free_ivars(devi);
return (EINVAL);
}
@ -363,6 +363,20 @@ gpiobus_resume(device_t dev)
return (bus_generic_resume(dev));
}
static void
gpiobus_probe_nomatch(device_t dev, device_t child)
{
char pins[128];
struct gpiobus_ivar *devi;
devi = GPIOBUS_IVAR(child);
memset(pins, 0, sizeof(pins));
gpiobus_print_pins(devi, pins, sizeof(pins));
device_printf(dev, "<unknown device> at pin(s) %s", pins);
resource_list_print_type(&devi->rl, "irq", SYS_RES_IRQ, "%ld");
printf("\n");
}
static int
gpiobus_print_child(device_t dev, device_t child)
{
@ -670,6 +684,7 @@ static device_method_t gpiobus_methods[] = {
DEVMETHOD(bus_deactivate_resource, bus_generic_deactivate_resource),
DEVMETHOD(bus_get_resource_list, gpiobus_get_resource_list),
DEVMETHOD(bus_add_child, gpiobus_add_child),
DEVMETHOD(bus_probe_nomatch, gpiobus_probe_nomatch),
DEVMETHOD(bus_print_child, gpiobus_print_child),
DEVMETHOD(bus_child_pnpinfo_str, gpiobus_child_pnpinfo_str),
DEVMETHOD(bus_child_location_str, gpiobus_child_location_str),

2
sys/dev/gpio/gpiobusvar.h
View File

@ -110,7 +110,7 @@ int gpiobus_detach_bus(device_t);
int gpiobus_init_softc(device_t);
int gpiobus_alloc_ivars(struct gpiobus_ivar *);
void gpiobus_free_ivars(struct gpiobus_ivar *);
int gpiobus_map_pin(device_t, device_t, uint32_t);
int gpiobus_map_pin(device_t, uint32_t);
extern driver_t gpiobus_driver;

42
sys/dev/gpio/ofw_gpiobus.c
View File

@ -41,7 +41,7 @@ __FBSDID("$FreeBSD$");
static struct ofw_gpiobus_devinfo *ofw_gpiobus_setup_devinfo(device_t,
device_t, phandle_t);
static void ofw_gpiobus_destroy_devinfo(struct ofw_gpiobus_devinfo *);
static void ofw_gpiobus_destroy_devinfo(device_t, struct ofw_gpiobus_devinfo *);
static int ofw_gpiobus_parse_gpios_impl(device_t, phandle_t, char *,
struct gpiobus_softc *, struct gpiobus_pin **);
@ -63,7 +63,7 @@ ofw_gpiobus_add_fdt_child(device_t bus, const char *drvname, phandle_t child)
return (NULL);
}
if (device_probe_and_attach(childdev) != 0) {
ofw_gpiobus_destroy_devinfo(dinfo);
ofw_gpiobus_destroy_devinfo(bus, dinfo);
device_delete_child(bus, childdev);
return (NULL);
}
@ -117,41 +117,50 @@ ofw_gpiobus_setup_devinfo(device_t bus, device_t child, phandle_t node)
}
/* Parse the gpios property for the child. */
npins = ofw_gpiobus_parse_gpios_impl(child, node, "gpios", sc, &pins);
if (npins <= 0)
goto fail;
if (npins <= 0) {
ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
free(dinfo, M_DEVBUF);
return (NULL);
}
/* Initialize the irq resource list. */
resource_list_init(&dinfo->opd_dinfo.rl);
/* Allocate the child ivars and copy the parsed pin data. */
devi = &dinfo->opd_dinfo;
devi->npins = (uint32_t)npins;
if (gpiobus_alloc_ivars(devi) != 0) {
free(pins, M_DEVBUF);
goto fail;
ofw_gpiobus_destroy_devinfo(bus, dinfo);
return (NULL);
}
for (i = 0; i < devi->npins; i++) {
devi->flags[i] = pins[i].flags;
devi->pins[i] = pins[i].pin;
}
free(pins, M_DEVBUF);
/* And now the interrupt resources. */
resource_list_init(&dinfo->opd_dinfo.rl);
/* Parse the interrupt resources. */
if (ofw_bus_intr_to_rl(bus, node, &dinfo->opd_dinfo.rl) != 0) {
gpiobus_free_ivars(devi);
goto fail;
ofw_gpiobus_destroy_devinfo(bus, dinfo);
return (NULL);
}
device_set_ivars(child, dinfo);
return (dinfo);
fail:
ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
free(dinfo, M_DEVBUF);
return (NULL);
}
static void
ofw_gpiobus_destroy_devinfo(struct ofw_gpiobus_devinfo *dinfo)
ofw_gpiobus_destroy_devinfo(device_t bus, struct ofw_gpiobus_devinfo *dinfo)
{
int i;
struct gpiobus_ivar *devi;
struct gpiobus_softc *sc;
sc = device_get_softc(bus);
devi = &dinfo->opd_dinfo;
for (i = 0; i < devi->npins; i++) {
if (devi->pins[i] > sc->sc_npins)
continue;
sc->sc_pins_mapped[devi->pins[i]] = 0;
}
gpiobus_free_ivars(devi);
resource_list_free(&dinfo->opd_dinfo.rl);
ofw_bus_gen_destroy_devinfo(&dinfo->opd_obdinfo);
@ -273,8 +282,7 @@ ofw_gpiobus_parse_gpios_impl(device_t consumer, phandle_t cnode, char *pname,
goto fail;
}
/* Reserve the GPIO pin. */
if (gpiobus_map_pin(bussc->sc_busdev, consumer,
(*pins)[j].pin) != 0)
if (gpiobus_map_pin(bussc->sc_busdev, (*pins)[j].pin) != 0)
goto fail;
j++;
i += gpiocells + 1;

13
sys/dev/mps/mps_sas.c
View File

@ -3406,19 +3406,6 @@ mpssas_check_eedp(struct mps_softc *sc, struct cam_path *path,
xpt_path_string(local_path, path_str, sizeof(path_str));
/*
* If this is a SATA direct-access end device,
* mark it so that a SCSI StartStopUnit command
* will be sent to it when the driver is being
* shutdown.
*/
if ((cgd.inq_data.device == T_DIRECT) &&
(target->devinfo & MPI2_SAS_DEVICE_INFO_SATA_DEVICE) &&
((target->devinfo & MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE) ==
MPI2_SAS_DEVICE_INFO_END_DEVICE)) {
lun->stop_at_shutdown = TRUE;
}
mps_dprint(sc, MPS_INFO, "Sending read cap: path %s handle %d\n",
path_str, target->handle);

14
sys/dev/uart/uart.h
View File

@ -64,26 +64,12 @@ struct uart_bas {
*/
struct uart_class;
extern struct uart_class uart_imx_class __attribute__((weak));
extern struct uart_class uart_msm_class __attribute__((weak));
extern struct uart_class uart_ns8250_class __attribute__((weak));
extern struct uart_class uart_quicc_class __attribute__((weak));
extern struct uart_class uart_s3c2410_class __attribute__((weak));
extern struct uart_class uart_sab82532_class __attribute__((weak));
extern struct uart_class uart_sbbc_class __attribute__((weak));
extern struct uart_class uart_z8530_class __attribute__((weak));
extern struct uart_class uart_lpc_class __attribute__((weak));
extern struct uart_class uart_pl011_class __attribute__((weak));
extern struct uart_class uart_cdnc_class __attribute__((weak));
extern struct uart_class uart_ti8250_class __attribute__((weak));
extern struct uart_class uart_vybrid_class __attribute__((weak));
extern struct uart_class at91_usart_class __attribute__((weak));
extern struct uart_class uart_exynos4210_class __attribute__((weak));
#ifdef FDT
struct ofw_compat_data;
extern const struct ofw_compat_data *uart_fdt_compat_data;
#endif
#ifdef PC98
struct uart_class *uart_pc98_getdev(u_long port);

53
sys/dev/uart/uart_bus_fdt.c
View File

@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_bus.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
static int uart_fdt_probe(device_t);
@ -62,37 +63,6 @@ static driver_t uart_fdt_driver = {
sizeof(struct uart_softc),
};
/*
* Compatible devices. Keep this sorted in most- to least-specific order first,
* alphabetical second. That is, "zwie,ns16550" should appear before "ns16550"
* on the theory that the zwie driver knows how to make better use of the
* hardware than the generic driver. Likewise with chips within a family, the
* highest-numbers / most recent models should probably appear earlier.
*/
static struct ofw_compat_data compat_data[] = {
{"arm,pl011", (uintptr_t)&uart_pl011_class},
{"atmel,at91rm9200-usart",(uintptr_t)&at91_usart_class},
{"atmel,at91sam9260-usart",(uintptr_t)&at91_usart_class},
{"cadence,uart", (uintptr_t)&uart_cdnc_class},
{"exynos", (uintptr_t)&uart_exynos4210_class},
{"fsl,imx6q-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx53-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx51-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx31-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx27-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx25-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx21-uart", (uintptr_t)&uart_imx_class},
{"fsl,mvf600-uart", (uintptr_t)&uart_vybrid_class},
{"lpc,uart", (uintptr_t)&uart_lpc_class},
{"qcom,msm-uartdm", (uintptr_t)&uart_msm_class},
{"ti,ns16550", (uintptr_t)&uart_ti8250_class},
{"ns16550", (uintptr_t)&uart_ns8250_class},
{NULL, (uintptr_t)NULL},
};
/* Export the compat_data table for use by the uart_cpu_fdt.c probe routine. */
const struct ofw_compat_data *uart_fdt_compat_data = compat_data;
static int
uart_fdt_get_clock(phandle_t node, pcell_t *cell)
{
@ -127,6 +97,20 @@ uart_fdt_get_shift(phandle_t node, pcell_t *cell)
return (0);
}
static uintptr_t
uart_fdt_find_device(device_t dev)
{
struct ofw_compat_data **cd;
const struct ofw_compat_data *ocd;
SET_FOREACH(cd, uart_fdt_class_and_device_set) {
ocd = ofw_bus_search_compatible(dev, *cd);
if (ocd->ocd_data != 0)
return (ocd->ocd_data);
}
return (0);
}
static int
uart_fdt_probe(device_t dev)
{
@ -134,19 +118,16 @@ uart_fdt_probe(device_t dev)
phandle_t node;
pcell_t clock, shift;
int err;
const struct ofw_compat_data * cd;
sc = device_get_softc(dev);
if (!ofw_bus_status_okay(dev))
return (ENXIO);
cd = ofw_bus_search_compatible(dev, compat_data);
if (cd->ocd_data == (uintptr_t)NULL)
sc->sc_class = (struct uart_class *)uart_fdt_find_device(dev);
if (sc->sc_class == NULL)
return (ENXIO);
sc->sc_class = (struct uart_class *)cd->ocd_data;
node = ofw_bus_get_node(dev);
if ((err = uart_fdt_get_clock(node, &clock)) != 0)

68
sys/dev/uart/uart_cpu_fdt.c
View File

@ -50,6 +50,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_bus.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
/*
* UART console routines.
@ -115,13 +116,46 @@ phandle_chosen_propdev(phandle_t chosen, const char *name, phandle_t *node)
return (0);
}
static const struct ofw_compat_data *
uart_fdt_find_compatible(phandle_t node, const struct ofw_compat_data *cd)
{
const struct ofw_compat_data *ocd;
for (ocd = cd; ocd->ocd_str != NULL; ocd++) {
if (fdt_is_compatible(node, ocd->ocd_str))
return (ocd);
}
return (NULL);
}
static uintptr_t
uart_fdt_find_by_node(phandle_t node, int class_list)
{
struct ofw_compat_data **cd;
const struct ofw_compat_data *ocd;
if (class_list) {
SET_FOREACH(cd, uart_fdt_class_set) {
ocd = uart_fdt_find_compatible(node, *cd);
if ((ocd != NULL) && (ocd->ocd_data != 0))
return (ocd->ocd_data);
}
} else {
SET_FOREACH(cd, uart_fdt_class_and_device_set) {
ocd = uart_fdt_find_compatible(node, *cd);
if ((ocd != NULL) && (ocd->ocd_data != 0))
return (ocd->ocd_data);
}
}
return (0);
}
int
uart_cpu_getdev(int devtype, struct uart_devinfo *di)
{
const char *propnames[] = {"stdout-path", "linux,stdout-path", "stdout",
"stdin-path", "stdin", NULL};
const char **name;
const struct ofw_compat_data *cd;
struct uart_class *class;
phandle_t node, chosen;
pcell_t shift, br, rclk;
@ -160,24 +194,32 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
* Retrieve serial attributes.
*/
uart_fdt_get_shift(node, &shift);
if (OF_getprop(node, "current-speed", &br, sizeof(br)) <= 0)
br = 0;
br = fdt32_to_cpu(br);
else
br = fdt32_to_cpu(br);
/*
* Check old style of UART definition first. Unfortunately, the common
* FDT processing is not possible if we have clock, power domains and
* pinmux stuff.
*/
class = (struct uart_class *)uart_fdt_find_by_node(node, 0);
if (class != NULL) {
if ((err = uart_fdt_get_clock(node, &rclk)) != 0)
return (err);
} else {
/* Check class only linker set */
class =
(struct uart_class *)uart_fdt_find_by_node(node, 1);
if (class == NULL)
return (ENXIO);
rclk = 0;
}
if ((err = uart_fdt_get_clock(node, &rclk)) != 0)
return (err);
/*
* Finalize configuration.
*/
for (cd = uart_fdt_compat_data; cd->ocd_str != NULL; ++cd) {
if (fdt_is_compatible(node, cd->ocd_str))
break;
}
if (cd->ocd_str == NULL)
return (ENXIO);
class = (struct uart_class *)cd->ocd_data;
di->bas.chan = 0;
di->bas.regshft = (u_int)shift;
di->baudrate = br;

54
sys/dev/uart/uart_cpu_fdt.h Normal file
View File

@ -0,0 +1,54 @@
/*-
* Copyright 2015 Michal Meloun
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _DEV_UART_CPU_FDT_H_
#define _DEV_UART_CPU_FDT_H_
#include <sys/linker_set.h>
#include <dev/ofw/ofw_bus_subr.h>
/*
* If your UART driver implements only uart_class and uses uart_cpu_fdt.c
* for device instantiation, then use UART_FDT_CLASS_AND_DEVICE for its
* declaration
*/
SET_DECLARE(uart_fdt_class_and_device_set, struct ofw_compat_data );
#define UART_FDT_CLASS_AND_DEVICE(data) \
DATA_SET(uart_fdt_class_and_device_set, data)
/*
* If your UART driver implements uart_class and custom device layer,
* then use UART_FDT_CLASS for its declaration
*/
SET_DECLARE(uart_fdt_class_set, struct ofw_compat_data );
#define UART_FDT_CLASS(data) \
DATA_SET(uart_fdt_class_set, data)
#endif /* _DEV_UART_CPU_FDT_H_ */

15
sys/dev/uart/uart_dev_imx.c
View File

@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
#include <dev/uart/uart_bus.h>
#include <dev/uart/uart_dev_imx.h>
#include "uart_if.h"
@ -291,7 +292,7 @@ static kobj_method_t imx_uart_methods[] = {
{ 0, 0 }
};
struct uart_class uart_imx_class = {
static struct uart_class uart_imx_class = {
"imx",
imx_uart_methods,
sizeof(struct imx_uart_softc),
@ -300,6 +301,18 @@ struct uart_class uart_imx_class = {
.uc_rclk = 24000000 /* TODO: get value from CCM */
};
static struct ofw_compat_data compat_data[] = {
{"fsl,imx6q-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx53-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx51-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx31-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx27-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx25-uart", (uintptr_t)&uart_imx_class},
{"fsl,imx21-uart", (uintptr_t)&uart_imx_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);
#define SIGCHG(c, i, s, d) \
if (c) { \
i |= (i & s) ? s : s | d; \

9
sys/dev/uart/uart_dev_lpc.c
View File

@ -36,6 +36,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
#include <dev/uart/uart_bus.h>
#include <dev/ic/ns16550.h>
@ -421,7 +422,7 @@ static kobj_method_t lpc_ns8250_methods[] = {
{ 0, 0 }
};
struct uart_class uart_lpc_class = {
static struct uart_class uart_lpc_class = {
"lpc_ns8250",
lpc_ns8250_methods,
sizeof(struct lpc_ns8250_softc),
@ -430,6 +431,12 @@ struct uart_class uart_lpc_class = {
.uc_rclk = DEFAULT_RCLK
};
static struct ofw_compat_data compat_data[] = {
{"lpc,uart", (uintptr_t)&uart_lpc_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);
#define SIGCHG(c, i, s, d) \
if (c) { \
i |= (i & s) ? s : s | d; \

9
sys/dev/uart/uart_dev_msm.c
View File

@ -41,6 +41,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
#include <dev/uart/uart_bus.h>
#include <dev/uart/uart_dev_msm.h>
@ -558,7 +559,7 @@ msm_bus_ungrab(struct uart_softc *sc)
uart_unlock(sc->sc_hwmtx);
}
struct uart_class uart_msm_class = {
static struct uart_class uart_msm_class = {
"msm",
msm_methods,
sizeof(struct msm_uart_softc),
@ -566,3 +567,9 @@ struct uart_class uart_msm_class = {
.uc_range = 8,
.uc_rclk = DEF_CLK,
};
static struct ofw_compat_data compat_data[] = {
{"qcom,msm-uartdm", (uintptr_t)&uart_msm_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);

11
sys/dev/uart/uart_dev_ns8250.c
View File

@ -45,6 +45,9 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#ifdef FDT
#include <dev/uart/uart_cpu_fdt.h>
#endif
#include <dev/uart/uart_bus.h>
#include <dev/uart/uart_dev_ns8250.h>
@ -378,6 +381,14 @@ struct uart_class uart_ns8250_class = {
.uc_rclk = DEFAULT_RCLK
};
#ifdef FDT
static struct ofw_compat_data compat_data[] = {
{"ns16550", (uintptr_t)&uart_ns8250_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);
#endif
#define SIGCHG(c, i, s, d) \
if (c) { \
i |= (i & s) ? s : s | d; \

9
sys/dev/uart/uart_dev_pl011.c
View File

@ -35,6 +35,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
#include <dev/uart/uart_bus.h>
#include "uart_if.h"
@ -266,7 +267,7 @@ static kobj_method_t uart_pl011_methods[] = {
{ 0, 0 }
};
struct uart_class uart_pl011_class = {
static struct uart_class uart_pl011_class = {
"uart_pl011",
uart_pl011_methods,
sizeof(struct uart_pl011_softc),
@ -275,6 +276,12 @@ struct uart_class uart_pl011_class = {
.uc_rclk = 0
};
static struct ofw_compat_data compat_data[] = {
{"arm,pl011", (uintptr_t)&uart_pl011_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);
static int
uart_pl011_bus_attach(struct uart_softc *sc)
{

9
sys/dev/uart/uart_dev_ti8250.c
View File

@ -45,6 +45,7 @@ __FBSDID("$FreeBSD$");
#include <dev/uart/uart.h>
#include <dev/uart/uart_cpu.h>
#include <dev/uart/uart_cpu_fdt.h>
#include <dev/uart/uart_bus.h>
#include <dev/uart/uart_dev_ns8250.h>
@ -130,7 +131,7 @@ static kobj_method_t ti8250_methods[] = {
KOBJMETHOD_END
};
struct uart_class uart_ti8250_class = {
static struct uart_class uart_ti8250_class = {
"ti8250",
ti8250_methods,
sizeof(struct ti8250_softc),
@ -138,4 +139,8 @@ struct uart_class uart_ti8250_class = {
.uc_range = 0x88,
.uc_rclk = 48000000
};
static struct ofw_compat_data compat_data[] = {
{"ti,ns16550", (uintptr_t)&uart_ti8250_class},
{NULL, (uintptr_t)NULL},
};
UART_FDT_CLASS_AND_DEVICE(compat_data);

1
sys/dev/uart/uart_subr.c
View File

@ -53,7 +53,6 @@ static struct uart_class *uart_classes[] = {
&uart_sab82532_class,
&uart_z8530_class,
#if defined(__arm__)
&uart_lpc_class,
&uart_s3c2410_class,
#endif
};

3
sys/dev/usb/quirk/usb_quirk.c
View File

@ -483,7 +483,8 @@ static struct usb_quirk_entry usb_quirks[USB_DEV_QUIRKS_MAX] = {
USB_QUIRK(TOSHIBA, TRANSMEMORY, 0x0000, 0xffff, UQ_MSC_NO_SYNC_CACHE,
UQ_MSC_NO_PREVENT_ALLOW),
USB_QUIRK(VIALABS, USB30SATABRIDGE, 0x0000, 0xffff, UQ_MSC_NO_SYNC_CACHE),
USB_QUIRK(QUALCOMMINC, ZTE_MF730M, 0x0000, 0xffff, UQ_MSC_NO_GETMAXLUN,
UQ_MSC_NO_INQUIRY, UQ_CFG_INDEX_0),
/* Non-standard USB MIDI devices */
USB_QUIRK(ROLAND, UM1, 0x0000, 0xffff, UQ_AU_VENDOR_CLASS),
USB_QUIRK(ROLAND, SC8850, 0x0000, 0xffff, UQ_AU_VENDOR_CLASS),

2
sys/dev/usb/serial/u3g.c
View File

@ -482,6 +482,8 @@ static const STRUCT_USB_HOST_ID u3g_devs[] = {
U3G_DEV(QUALCOMMINC, MF626, 0),
U3G_DEV(QUALCOMMINC, MF628, 0),
U3G_DEV(QUALCOMMINC, MF633R, 0),
/* the following is a RNDIS device, no modem features */
U3G_DEV(QUALCOMMINC, ZTE_MF730M, U3GINIT_SCSIEJECT),
U3G_DEV(QUANTA, GKE, 0),
U3G_DEV(QUANTA, GLE, 0),
U3G_DEV(QUANTA, GLX, 0),

41
sys/dev/usb/serial/usb_serial.c
View File

@ -96,6 +96,11 @@ __FBSDID("$FreeBSD$");
static SYSCTL_NODE(_hw_usb, OID_AUTO, ucom, CTLFLAG_RW, 0, "USB ucom");
static int ucom_pps_mode;
SYSCTL_INT(_hw_usb_ucom, OID_AUTO, pps_mode, CTLFLAG_RWTUN,
&ucom_pps_mode, 0, "pulse capturing mode - 0/1/2 - disabled/CTS/DCD");
#ifdef USB_DEBUG
static int ucom_debug = 0;
@ -409,6 +414,10 @@ ucom_attach_tty(struct ucom_super_softc *ssc, struct ucom_softc *sc)
sc->sc_tty = tp;
sc->sc_pps.ppscap = PPS_CAPTUREBOTH;
sc->sc_pps.mtx = sc->sc_mtx;
pps_init(&sc->sc_pps);
DPRINTF("ttycreate: %s\n", buf);
/* Check if this device should be a console */
@ -858,6 +867,8 @@ ucom_ioctl(struct tty *tp, u_long cmd, caddr_t data, struct thread *td)
} else {
error = ENOIOCTL;
}
if (error == ENOIOCTL)
error = pps_ioctl(cmd, data, &sc->sc_pps);
break;
}
return (error);
@ -1061,7 +1072,7 @@ ucom_cfg_status_change(struct usb_proc_msg *_task)
struct tty *tp;
uint8_t new_msr;
uint8_t new_lsr;
uint8_t onoff;
uint8_t msr_delta;
uint8_t lsr_delta;
tp = sc->sc_tty;
@ -1085,15 +1096,37 @@ ucom_cfg_status_change(struct usb_proc_msg *_task)
/* TTY device closed */
return;
}
onoff = ((sc->sc_msr ^ new_msr) & SER_DCD);
msr_delta = (sc->sc_msr ^ new_msr);
lsr_delta = (sc->sc_lsr ^ new_lsr);
sc->sc_msr = new_msr;
sc->sc_lsr = new_lsr;
if (onoff) {
/* time pulse counting support */
switch(ucom_pps_mode) {
case 1:
if ((sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) &&
(msr_delta & SER_CTS)) {
pps_capture(&sc->sc_pps);
pps_event(&sc->sc_pps, (sc->sc_msr & SER_CTS) ?
PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
}
break;
case 2:
if ((sc->sc_pps.ppsparam.mode & PPS_CAPTUREBOTH) &&
(msr_delta & SER_DCD)) {
pps_capture(&sc->sc_pps);
pps_event(&sc->sc_pps, (sc->sc_msr & SER_DCD) ?
PPS_CAPTUREASSERT : PPS_CAPTURECLEAR);
}
break;
default:
break;
}
onoff = (sc->sc_msr & SER_DCD) ? 1 : 0;
if (msr_delta & SER_DCD) {
int onoff = (sc->sc_msr & SER_DCD) ? 1 : 0;
DPRINTF("DCD changed to %d\n", onoff);

3
sys/dev/usb/serial/usb_serial.h
View File

@ -64,6 +64,7 @@
#include <sys/serial.h>
#include <sys/fcntl.h>
#include <sys/sysctl.h>
#include <sys/timepps.h>
/* Module interface related macros */
#define UCOM_MODVER 1
@ -155,6 +156,8 @@ struct ucom_softc {
struct ucom_cfg_task sc_line_state_task[2];
struct ucom_cfg_task sc_status_task[2];
struct ucom_param_task sc_param_task[2];
/* pulse capturing support, PPS */
struct pps_state sc_pps;
/* Used to set "UCOM_FLAG_GP_DATA" flag: */
struct usb_proc_msg *sc_last_start_xfer;
const struct ucom_callback *sc_callback;

1
sys/dev/usb/usbdevs
View File

@ -3674,6 +3674,7 @@ product QUALCOMMINC E0086 0x0086 3G modem
product QUALCOMMINC SURFSTICK 0x0117 1&1 Surf Stick
product QUALCOMMINC K3772_Z_INIT 0x1179 K3772-Z Initial
product QUALCOMMINC K3772_Z 0x1181 K3772-Z
product QUALCOMMINC ZTE_MF730M 0x1420 3G modem
product QUALCOMMINC MF195E_INIT 0x1514 MF195E initial
product QUALCOMMINC MF195E 0x1516 MF195E
product QUALCOMMINC ZTE_STOR 0x2000 USB ZTE Storage

28
sys/dev/usb/video/udl.c
View File

@ -60,15 +60,22 @@
#define USB_DEBUG_VAR udl_debug
#include <dev/usb/usb_debug.h>
static SYSCTL_NODE(_hw_usb, OID_AUTO, udl, CTLFLAG_RW, 0, "USB UDL");
#ifdef USB_DEBUG
static int udl_debug = 0;
static SYSCTL_NODE(_hw_usb, OID_AUTO, udl, CTLFLAG_RW, 0, "USB UDL");
SYSCTL_INT(_hw_usb_udl, OID_AUTO, debug, CTLFLAG_RWTUN,
&udl_debug, 0, "Debug level");
#endif
#define UDL_FPS_MAX 60
#define UDL_FPS_MIN 1
static int udl_fps = 25;
SYSCTL_INT(_hw_usb_udl, OID_AUTO, fps, CTLFLAG_RWTUN,
&udl_fps, 0, "Frames Per Second, 1-60");
/*
* Prototypes.
*/
@ -206,14 +213,25 @@ udl_callout(void *arg)
{
struct udl_softc *sc = arg;
const uint32_t max = udl_get_fb_size(sc);
int fps;
if (sc->sc_power_save == 0) {
fps = udl_fps;
/* figure out number of frames per second */
if (fps < UDL_FPS_MIN)
fps = UDL_FPS_MIN;
else if (fps > UDL_FPS_MAX)
fps = UDL_FPS_MAX;
if (sc->sc_sync_off >= max)
sc->sc_sync_off = 0;
usbd_transfer_start(sc->sc_xfer[UDL_BULK_WRITE_0]);
usbd_transfer_start(sc->sc_xfer[UDL_BULK_WRITE_1]);
} else {
fps = 1;
}
callout_reset(&sc->sc_callout, hz / 5, &udl_callout, sc);
callout_reset(&sc->sc_callout, hz / fps, &udl_callout, sc);
}
static int
@ -765,6 +783,10 @@ udl_fbmem_alloc(struct udl_softc *sc)
size = udl_get_fb_size(sc);
size = round_page(size);
/*
* It is assumed that allocations above PAGE_SIZE bytes will
* be PAGE_SIZE aligned for use with mmap()
*/
sc->sc_fb_addr = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
sc->sc_fb_copy = malloc(size, M_DEVBUF, M_WAITOK | M_ZERO);
sc->sc_fb_size = size;

1
sys/dev/virtio/block/virtio_blk.c
View File

@ -205,6 +205,7 @@ TUNABLE_INT("hw.vtblk.writecache_mode", &vtblk_writecache_mode);
VIRTIO_BLK_F_RO | \
VIRTIO_BLK_F_BLK_SIZE | \
VIRTIO_BLK_F_WCE | \
VIRTIO_BLK_F_TOPOLOGY | \
VIRTIO_BLK_F_CONFIG_WCE | \
VIRTIO_RING_F_INDIRECT_DESC)

2
sys/dev/virtio/block/virtio_blk.h
View File

@ -67,7 +67,7 @@ struct virtio_blk_config {
uint8_t physical_block_exp;
uint8_t alignment_offset;
uint16_t min_io_size;
uint16_t opt_io_size;
uint32_t opt_io_size;
} topology;
/* Writeback mode (if VIRTIO_BLK_F_CONFIG_WCE) */

17
sys/dev/vt/hw/fb/vt_fb.c
View File

@ -41,6 +41,9 @@ __FBSDID("$FreeBSD$");
#include <dev/vt/hw/fb/vt_fb.h>
#include <dev/vt/colors/vt_termcolors.h>
#include <vm/vm.h>
#include <vm/pmap.h>
static struct vt_driver vt_fb_driver = {
.vd_name = "fb",
.vd_init = vt_fb_init,
@ -136,10 +139,14 @@ vt_fb_mmap(struct vt_device *vd, vm_ooffset_t offset, vm_paddr_t *paddr,
return (ENODEV);
if (offset >= 0 && offset < info->fb_size) {
*paddr = info->fb_pbase + offset;
#ifdef VM_MEMATTR_WRITE_COMBINING
*memattr = VM_MEMATTR_WRITE_COMBINING;
#endif
if (info->fb_pbase == 0) {
*paddr = vtophys((uint8_t *)info->fb_vbase + offset);
} else {
*paddr = info->fb_pbase + offset;
#ifdef VM_MEMATTR_WRITE_COMBINING
*memattr = VM_MEMATTR_WRITE_COMBINING;
#endif
}
return (0);
}
@ -425,7 +432,7 @@ vt_fb_init(struct vt_device *vd)
if (info->fb_size == 0)
return (CN_DEAD);
if (info->fb_pbase == 0)
if (info->fb_pbase == 0 && info->fb_vbase == 0)
info->fb_flags |= FB_FLAG_NOMMAP;
if (info->fb_cmsize <= 0) {

4
sys/i386/i386/mp_machdep.c
View File

@ -842,8 +842,8 @@ set_interrupt_apic_ids(void)
continue;
/* Don't let hyperthreads service interrupts. */
if (hyperthreading_cpus > 1 &&
apic_id % hyperthreading_cpus != 0)
if (cpu_logical > 1 &&
apic_id % cpu_logical != 0)
continue;
intr_add_cpu(i);

7
sys/kern/kern_tc.c
View File

@ -23,10 +23,8 @@ __FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/kernel.h>
#include <sys/limits.h>
#ifdef FFCLOCK
#include <sys/lock.h>
#include <sys/mutex.h>
#endif
#include <sys/sysctl.h>
#include <sys/syslog.h>
#include <sys/systm.h>
@ -1498,7 +1496,10 @@ pps_fetch(struct pps_fetch_args *fapi, struct pps_state *pps)
cseq = pps->ppsinfo.clear_sequence;
while (aseq == pps->ppsinfo.assert_sequence &&
cseq == pps->ppsinfo.clear_sequence) {
err = tsleep(pps, PCATCH, "ppsfch", timo);
if (pps->mtx != NULL)
err = msleep(pps, pps->mtx, PCATCH, "ppsfch", timo);
else
err = tsleep(pps, PCATCH, "ppsfch", timo);
if (err == EWOULDBLOCK && fapi->timeout.tv_sec == -1) {
continue;
} else if (err != 0) {

2
sys/kern/link_elf.c
View File

@ -411,7 +411,7 @@ link_elf_init(void* arg)
ef = (elf_file_t) linker_kernel_file;
ef->preloaded = 1;
#ifdef __powerpc64__
#ifdef __powerpc__
ef->address = (caddr_t) (__startkernel - KERNBASE);
#else
ef->address = 0;

2
sys/modules/drm2/Makefile
View File

@ -3,6 +3,8 @@
SYSDIR?=${.CURDIR}/../..
.include "${SYSDIR}/conf/kern.opts.mk"
SUBDIR_PARALLEL=
.if ${MACHINE_CPUARCH} == "amd64"
_i915kms= i915kms
_radeonkms= radeonkms

2
sys/modules/drm2/radeonkmsfw/Makefile
View File

@ -1,5 +1,7 @@
# $FreeBSD$
SUBDIR_PARALLEL=
SUBDIR= \
ARUBA_me \
ARUBA_pfp \

2
sys/modules/dtrace/dtraceall/dtraceall.c
View File

@ -69,7 +69,7 @@ MODULE_DEPEND(dtraceall, dtmalloc, 1, 1, 1);
#if defined(NFSCL)
MODULE_DEPEND(dtraceall, dtnfscl, 1, 1, 1);
#endif
#if defined(__amd64__) || defined(__i386__) || defined(__powerpc__)
#if defined(__amd64__) || defined(__i386__) || defined(__powerpc__) || defined(__arm__)
MODULE_DEPEND(dtraceall, fbt, 1, 1, 1);
#endif
#if defined(__amd64__) || defined(__i386__)

4
sys/netinet/if_ether.c
View File

@ -149,10 +149,10 @@ arp_ifscrub(struct ifnet *ifp, uint32_t addr)
addr4.sin_len = sizeof(addr4);
addr4.sin_family = AF_INET;
addr4.sin_addr.s_addr = addr;
IF_AFDATA_RLOCK(ifp);
IF_AFDATA_WLOCK(ifp);
lla_lookup(LLTABLE(ifp), (LLE_DELETE | LLE_IFADDR),
(struct sockaddr *)&addr4);
IF_AFDATA_RUNLOCK(ifp);
IF_AFDATA_WUNLOCK(ifp);
}
#endif

3
sys/netinet6/in6.c
View File

@ -1910,7 +1910,8 @@ in6if_do_dad(struct ifnet *ifp)
if ((ifp->if_flags & IFF_LOOPBACK) != 0)
return (0);
if (ND_IFINFO(ifp)->flags & ND6_IFF_IFDISABLED)
if ((ND_IFINFO(ifp)->flags & ND6_IFF_IFDISABLED) ||
(ND_IFINFO(ifp)->flags & ND6_IFF_NO_DAD))
return (0);
/*

2
sys/netinet6/in6_pcb.c
View File

@ -645,7 +645,7 @@ in6_pcbnotify(struct inpcbinfo *pcbinfo, struct sockaddr *dst,
* know the value, notify.
* XXX: should we avoid to notify the value to TCP sockets?
*/
if (cmd == PRC_MSGSIZE)
if (cmd == PRC_MSGSIZE && cmdarg != NULL)
ip6_notify_pmtu(inp, (struct sockaddr_in6 *)dst,
*(u_int32_t *)cmdarg);

2
sys/netinet6/nd6.h
View File

@ -87,6 +87,8 @@ struct nd_ifinfo {
#define ND6_IFF_AUTO_LINKLOCAL 0x20
#define ND6_IFF_NO_RADR 0x40
#define ND6_IFF_NO_PREFER_IFACE 0x80 /* XXX: not related to ND. */
#define ND6_IFF_IGNORELOOP 0x100
#define ND6_IFF_NO_DAD 0x200
#define ND6_CREATE LLE_CREATE
#define ND6_EXCLUSIVE LLE_EXCLUSIVE

57
sys/netinet6/nd6_nbr.c
View File

@ -1182,6 +1182,7 @@ struct dadq {
int dad_ns_icount;
int dad_na_icount;
int dad_ns_lcount; /* looped back NS */
int dad_loopbackprobe; /* probing state for loopback detection */
struct callout dad_timer_ch;
struct vnet *dad_vnet;
u_int dad_refcnt;
@ -1223,7 +1224,6 @@ static struct dadq *
nd6_dad_find(struct ifaddr *ifa, struct nd_opt_nonce *n)
{
struct dadq *dp;
char ip6buf[INET6_ADDRSTRLEN];
DADQ_RLOCK();
TAILQ_FOREACH(dp, &V_dadq, dad_list) {
@ -1238,10 +1238,6 @@ nd6_dad_find(struct ifaddr *ifa, struct nd_opt_nonce *n)
n->nd_opt_nonce_len == (ND_OPT_NONCE_LEN + 2) / 8 &&
memcmp(&n->nd_opt_nonce[0], &dp->dad_nonce[0],
ND_OPT_NONCE_LEN) == 0) {
log(LOG_ERR, "%s: a looped back NS message is "
"detected during DAD for %s.\n",
if_name(ifa->ifa_ifp),
ip6_sprintf(ip6buf, IFA_IN6(ifa)));
dp->dad_ns_lcount++;
continue;
}
@ -1357,7 +1353,7 @@ nd6_dad_start(struct ifaddr *ifa, int delay)
dp->dad_count = V_ip6_dad_count;
dp->dad_ns_icount = dp->dad_na_icount = 0;
dp->dad_ns_ocount = dp->dad_ns_tcount = 0;
dp->dad_ns_lcount = 0;
dp->dad_ns_lcount = dp->dad_loopbackprobe = 0;
refcount_init(&dp->dad_refcnt, 1);
nd6_dad_add(dp);
if (delay == 0) {
@ -1432,8 +1428,10 @@ nd6_dad_timer(struct dadq *dp)
goto err;
}
/* timeouted with IFF_{RUNNING,UP} check */
if (dp->dad_ns_tcount > V_dad_maxtry) {
/* Stop DAD if the interface is down even after dad_maxtry attempts. */
if ((dp->dad_ns_tcount > V_dad_maxtry) &&
(((ifp->if_flags & IFF_UP) == 0) ||
((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0))) {
nd6log((LOG_INFO, "%s: could not run DAD, driver problem?\n",
if_name(ifa->ifa_ifp)));
goto err;
@ -1456,7 +1454,42 @@ nd6_dad_timer(struct dadq *dp)
if (dp->dad_ns_icount > 0 || dp->dad_na_icount > 0)
/* We've seen NS or NA, means DAD has failed. */
nd6_dad_duplicated(ifa, dp);
else {
else if (V_dad_enhanced != 0 &&
dp->dad_ns_lcount > 0 &&
dp->dad_ns_lcount > dp->dad_loopbackprobe) {
/*
* A looped back probe is detected,
* Sec. 4.1 in draft-ietf-6man-enhanced-dad-13
* requires transmission of additional probes until
* the loopback condition becomes clear.
*/
log(LOG_ERR, "%s: a looped back NS message is "
"detected during DAD for %s. "
"Another DAD probes are being sent.\n",
if_name(ifa->ifa_ifp),
ip6_sprintf(ip6buf, IFA_IN6(ifa)));
dp->dad_loopbackprobe = dp->dad_ns_lcount;
/*
* An interface with IGNORELOOP is one which a
* loopback is permanently expected while regular
* traffic works. In that case, stop DAD after
* MAX_MULTICAST_SOLICIT number of NS messages
* regardless of the number of received loopback NS
* by increasing dad_loopbackprobe in advance.
*/
if (ND_IFINFO(ifa->ifa_ifp)->flags & ND6_IFF_IGNORELOOP)
dp->dad_loopbackprobe += V_nd6_mmaxtries;
/*
* Send an NS immediately and increase dad_count by
* V_nd6_mmaxtries - 1.
*/
nd6_dad_ns_output(dp, ifa);
dp->dad_count =
dp->dad_ns_ocount + V_nd6_mmaxtries - 1;
nd6_dad_starttimer(dp,
(long)ND_IFINFO(ifa->ifa_ifp)->retrans * hz / 1000);
goto done;
} else {
/*
* We are done with DAD. No NA came, no NS came.
* No duplicate address found. Check IFDISABLED flag
@ -1470,6 +1503,12 @@ nd6_dad_timer(struct dadq *dp)
"%s: DAD complete for %s - no duplicates found\n",
if_name(ifa->ifa_ifp),
ip6_sprintf(ip6buf, &ia->ia_addr.sin6_addr)));
if (dp->dad_ns_lcount > 0)
log(LOG_ERR, "%s: DAD completed while "
"a looped back NS message is detected "
"during DAD for %s.\n",
if_name(ifa->ifa_ifp),
ip6_sprintf(ip6buf, IFA_IN6(ifa)));
}
}
err:

2
sys/netipsec/key.c
View File

@ -3870,7 +3870,7 @@ key_ismyaddr6(struct sockaddr_in6 *sin6)
IN6_IFADDR_RLOCK();
TAILQ_FOREACH(ia, &V_in6_ifaddrhead, ia_link) {
if (key_sockaddrcmp((struct sockaddr *)&sin6,
if (key_sockaddrcmp((struct sockaddr *)sin6,
(struct sockaddr *)&ia->ia_addr, 0) == 0) {
IN6_IFADDR_RUNLOCK();
return 1;

55
sys/powerpc/aim/locore32.S
View File

@ -108,36 +108,47 @@ kernel_text:
.text
.globl __start
__start:
li 8,0
li 9,0x100
mtctr 9
1:
dcbf 0,8
icbi 0,8
addi 8,8,0x20
bdnz 1b
sync
isync
/* Figure out where we are */
bl 1f
.long _DYNAMIC-.
.long _GLOBAL_OFFSET_TABLE_-.
.long tmpstk-.
1: mflr %r30
/* Zero bss, in case we were started by something unhelpful */
li 0,0
lis 8,_edata@ha
addi 8,8,_edata@l
lis 9,_end@ha
addi 9,9,_end@l
2: stw 0,0(8)
addi 8,8,4
cmplw 8,9
blt 2b
/* Set up temporary stack pointer */
lwz %r1,8(%r30)
add %r1,%r1,%r30
addi %r1,%r1,(8+TMPSTKSZ-32)
/* Relocate self */
stw %r3,16(%r1)
stw %r4,20(%r1)
stw %r5,24(%r1)
stw %r6,28(%r1)
lwz %r3,0(%r30) /* _DYNAMIC in %r3 */
add %r3,%r3,%r30
lwz %r4,4(%r30) /* GOT pointer */
add %r4,%r4,%r30
lwz %r4,4(%r4) /* got[0] is _DYNAMIC link addr */
subf %r4,%r4,%r3 /* subtract to calculate relocbase */
bl elf_reloc_self
lis 1,(tmpstk+TMPSTKSZ-16)@ha
addi 1,1,(tmpstk+TMPSTKSZ-16)@l
lwz %r3,16(%r1)
lwz %r4,20(%r1)
lwz %r5,24(%r1)
lwz %r6,28(%r1)
/* MD setup */
bl powerpc_init
/* Set stack pointer to new value and branch to mi_startup */
mr %r1, %r3
li %r3, 0
stw %r3, 0(%r1)
bl mi_startup
/* If mi_startup somehow returns, exit. This would be bad. */
b OF_exit
/*

28
sys/powerpc/aim/machdep.c
View File

@ -235,10 +235,13 @@ extern void *testppc64, *testppc64size;
extern void *restorebridge, *restorebridgesize;
extern void *rfid_patch, *rfi_patch1, *rfi_patch2;
extern void *trapcode64;
extern Elf_Addr _GLOBAL_OFFSET_TABLE_[];
#endif
extern void *rstcode, *rstcodeend;
extern void *trapcode, *trapcodeend, *trapcode2;
extern void *trapcode, *trapcodeend;
extern void *generictrap, *generictrap64;
extern void *slbtrap, *slbtrapend;
extern void *alitrap, *aliend;
extern void *dsitrap, *dsiend;
@ -254,7 +257,6 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
{
struct pcpu *pc;
vm_offset_t startkernel, endkernel;
void *generictrap;
size_t trap_offset, trapsize;
vm_offset_t trap;
void *kmdp;
@ -467,20 +469,9 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
/* rfi_patch2 is at the end of dbleave */
bcopy(&rfid_patch,&rfi_patch2,4);
#endif
/*
* Set the common trap entry point to the one that
* knows to restore 32-bit operation on execution.
*/
generictrap = &trapcode64;
} else {
generictrap = &trapcode;
}
#else /* powerpc64 */
cpu_features |= PPC_FEATURE_64;
generictrap = &trapcode;
#endif
trapsize = (size_t)&trapcodeend - (size_t)&trapcode;
@ -490,7 +481,7 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
* different ones in a minute.
*/
for (trap = EXC_RST; trap < EXC_LAST; trap += 0x20)
bcopy(generictrap, (void *)trap, trapsize);
bcopy(&trapcode, (void *)trap, trapsize);
#ifndef __powerpc64__
if (cpu_features & PPC_FEATURE_64) {
@ -530,12 +521,19 @@ powerpc_init(vm_offset_t fdt, vm_offset_t toc, vm_offset_t ofentry, void *mdp)
#ifdef __powerpc64__
/* Set TOC base so that the interrupt code can get at it */
*((void **)TRAP_GENTRAP) = &trapcode2;
*((void **)TRAP_GENTRAP) = &generictrap;
*((register_t *)TRAP_TOCBASE) = toc;
bcopy(&slbtrap, (void *)EXC_DSE,(size_t)&slbtrapend - (size_t)&slbtrap);
bcopy(&slbtrap, (void *)EXC_ISE,(size_t)&slbtrapend - (size_t)&slbtrap);
#else
/* Set branch address for trap code */
if (cpu_features & PPC_FEATURE_64)
*((void **)TRAP_GENTRAP) = &generictrap64;
else
*((void **)TRAP_GENTRAP) = &generictrap;
*((void **)TRAP_TOCBASE) = _GLOBAL_OFFSET_TABLE_;
/* G2-specific TLB miss helper handlers */
bcopy(&imisstrap, (void *)EXC_IMISS, (size_t)&imisssize);
bcopy(&dlmisstrap, (void *)EXC_DLMISS, (size_t)&dlmisssize);

14
sys/powerpc/aim/trap.c
View File

@ -201,8 +201,7 @@ trap(struct trapframe *frame)
case EXC_ISE:
case EXC_DSE:
if (handle_user_slb_spill(&p->p_vmspace->vm_pmap,
(type == EXC_ISE) ? frame->srr0 :
frame->cpu.aim.dar) != 0) {
(type == EXC_ISE) ? frame->srr0 : frame->dar) != 0){
sig = SIGSEGV;
ucode = SEGV_MAPERR;
}
@ -326,7 +325,7 @@ trap(struct trapframe *frame)
#endif
#ifdef __powerpc64__
case EXC_DSE:
if ((frame->cpu.aim.dar & SEGMENT_MASK) == USER_ADDR) {
if ((frame->dar & SEGMENT_MASK) == USER_ADDR) {
__asm __volatile ("slbmte %0, %1" ::
"r"(td->td_pcb->pcb_cpu.aim.usr_vsid),
"r"(USER_SLB_SLBE));
@ -387,8 +386,7 @@ printtrap(u_int vector, struct trapframe *frame, int isfatal, int user)
switch (vector) {
case EXC_DSE:
case EXC_DSI:
printf(" virtual address = 0x%" PRIxPTR "\n",
frame->cpu.aim.dar);
printf(" virtual address = 0x%" PRIxPTR "\n", frame->dar);
printf(" dsisr = 0x%" PRIxPTR "\n",
frame->cpu.aim.dsisr);
break;
@ -642,7 +640,7 @@ trap_pfault(struct trapframe *frame, int user)
if (frame->srr1 & SRR1_ISI_PFAULT)
ftype |= VM_PROT_READ;
} else {
eva = frame->cpu.aim.dar;
eva = frame->dar;
if (frame->cpu.aim.dsisr & DSISR_STORE)
ftype = VM_PROT_WRITE;
else
@ -736,12 +734,12 @@ fix_unaligned(struct thread *td, struct trapframe *frame)
save_fpu(td);
if (indicator == EXC_ALI_LFD) {
if (copyin((void *)frame->cpu.aim.dar, fpr,
if (copyin((void *)frame->dar, fpr,
sizeof(double)) != 0)
return -1;
enable_fpu(td);
} else {
if (copyout(fpr, (void *)frame->cpu.aim.dar,
if (copyout(fpr, (void *)frame->dar,
sizeof(double)) != 0)
return -1;
}

91
sys/powerpc/aim/trap_subr32.S
View File

@ -74,8 +74,9 @@
* Kernel SRs are loaded directly from kernel_pmap_
*/
#define RESTORE_KERN_SRS(pmap,sr) \
lis pmap,CNAME(kernel_pmap_store)@ha; \
lwzu sr,CNAME(kernel_pmap_store)+PM_SR@l(pmap); \
lwz pmap,TRAP_TOCBASE(0); \
lwz pmap,CNAME(kernel_pmap_store)@got(pmap); \
lwzu sr,PM_SR(pmap); \
RESTORE_SRS(pmap,sr)
/*
@ -301,7 +302,12 @@ CNAME(restorebridgesize) = .-CNAME(restorebridge)
*/
.globl CNAME(rstcode), CNAME(rstcodeend)
CNAME(rstcode):
ba cpu_reset
bl 1f
.long cpu_reset
1: mflr %r31
lwz %r31,0(%r31)
mtlr %r31
blrl
CNAME(rstcodeend):
cpu_reset:
@ -313,12 +319,12 @@ cpu_reset:
mflr %r1
addi %r1,%r1,(124-16)@l
bla CNAME(cpudep_ap_early_bootstrap)
bl CNAME(cpudep_ap_early_bootstrap)
lis %r3,1@l
bla CNAME(pmap_cpu_bootstrap)
bla CNAME(cpudep_ap_bootstrap)
bl CNAME(pmap_cpu_bootstrap)
bl CNAME(cpudep_ap_bootstrap)
mr %r1,%r3
bla CNAME(cpudep_ap_setup)
bl CNAME(cpudep_ap_setup)
GET_CPUINFO(%r5)
lwz %r3,(PC_RESTORE)(%r5)
cmplwi %cr0,%r3,0
@ -327,7 +333,7 @@ cpu_reset:
b CNAME(longjmp)
2:
#ifdef SMP
bla CNAME(machdep_ap_bootstrap)
bl CNAME(machdep_ap_bootstrap)
#endif
/* Should not be reached */
@ -344,21 +350,12 @@ CNAME(trapcode):
mtsprg1 %r1 /* save SP */
mflr %r1 /* Save the old LR in r1 */
mtsprg2 %r1 /* And then in SPRG2 */
li %r1, 0x20 /* How to get the vector from LR */
bla generictrap /* LR & SPRG3 is exception # */
lwz %r1, TRAP_GENTRAP(0) /* Get branch address */
mtlr %r1
li %r1, 0xe0 /* How to get the vector from LR */
blrl /* LR & (0xff00 | r1) is exception # */
CNAME(trapcodeend):
/*
* 64-bit version of trapcode. Identical, except it calls generictrap64.
*/
.globl CNAME(trapcode64)
CNAME(trapcode64):
mtsprg1 %r1 /* save SP */
mflr %r1 /* Save the old LR in r1 */
mtsprg2 %r1 /* And then in SPRG2 */
li %r1, 0x20 /* How to get the vector from LR */
bla generictrap64 /* LR & SPRG3 is exception # */
/*
* For ALI: has to save DSISR and DAR
*/
@ -385,7 +382,14 @@ CNAME(alitrap):
/* Test whether we already had PR set */
mfsrr1 %r31
mtcr %r31
bla s_trap
/* Jump to s_trap */
bl 1f
.long s_trap
1: mflr %r31
lwz %r31,0(%r31)
mtlr %r31
blrl
CNAME(aliend):
/*
@ -449,7 +453,7 @@ isi1:
xoris %r0, %r0, 0x2 /* flip the msr<tgpr> bit */
mtcrf 0x80, %r3 /* restore CR0 */
mtmsr %r0 /* flip back to the native gprs */
ba EXC_ISI /* go to instr. access interrupt */
ba EXC_ISI /* go to instr. access interrupt */
CNAME(imisssize) = .-CNAME(imisstrap)
@ -613,13 +617,15 @@ CNAME(dsitrap):
rlwinm %r31,%r31,7,25,28 /* get segment * 8 */
/* get batu */
addis %r31,%r31,CNAME(battable)@ha
lwz %r30,CNAME(battable)@l(31)
lwz %r30,TRAP_TOCBASE(0)
lwz %r30,CNAME(battable)@got(%r30)
add %r31,%r30,%r31
lwz %r30,0(%r31)
mtcr %r30
bf 30,1f /* branch if supervisor valid is
false */
/* get batl */
lwz %r31,CNAME(battable)+4@l(31)
lwz %r31,4(%r31)
/* We randomly use the highest two bat registers here */
mftb %r28
andi. %r28,%r28,1
@ -644,7 +650,14 @@ CNAME(dsitrap):
rfi /* return to trapped code */
1:
mflr %r28 /* save LR (SP already saved) */
bla disitrap
/* Jump to disitrap */
bl 4f
.long disitrap
4: mflr %r1
lwz %r1,0(%r1)
mtlr %r1
blrl
CNAME(dsiend):
/*
@ -711,7 +724,7 @@ realtrap:
GET_CPUINFO(%r1)
lwz %r1,PC_CURPCB(%r1)
RESTORE_KERN_SRS(%r30,%r31) /* enable kernel mapping */
ba s_trap
b s_trap
/*
* generictrap does some standard setup for trap handling to minimize
@ -723,6 +736,7 @@ realtrap:
* SPRG2 - Original LR
*/
.globl CNAME(generictrap64)
generictrap64:
mtsprg3 %r31
mfmsr %r31
@ -731,6 +745,7 @@ generictrap64:
mfsprg3 %r31
isync
.globl CNAME(generictrap)
generictrap:
/* Save R1 for computing the exception vector */
mtsprg3 %r1
@ -848,8 +863,9 @@ dbtrap:
andi. %r1,%r1,0xff00
mtsprg3 %r1
lis %r1,(tmpstk+TMPSTKSZ-16)@ha /* get new SP */
addi %r1,%r1,(tmpstk+TMPSTKSZ-16)@l
lwz %r1,TRAP_TOCBASE(0) /* get new SP */
lwz %r1,tmpstk@got(%r1)
addi %r1,%r1,TMPSTKSZ-16
FRAME_SETUP(PC_DBSAVE)
/* Call C trap code: */
@ -896,9 +912,11 @@ CNAME(dblow):
mfsprg2 %r29 /* ... and r29 */
mflr %r1 /* save LR */
mtsprg2 %r1 /* And then in SPRG2 */
li %r1, 0 /* How to get the vector from LR */
bla generictrap /* and we look like a generic trap */
lwz %r1, TRAP_GENTRAP(0) /* Get branch address */
mtlr %r1
li %r1, 0 /* How to get the vector from LR */
blrl /* LR & (0xff00 | r1) is exception # */
1:
/* Privileged, so drop to KDB */
GET_CPUINFO(%r1)
@ -908,6 +926,13 @@ CNAME(dblow):
stw %r30,(PC_DBSAVE+CPUSAVE_R30)(%r1) /* free r30 */
stw %r31,(PC_DBSAVE+CPUSAVE_R31)(%r1) /* free r31 */
mflr %r28 /* save LR */
bla dbtrap
/* Jump to dbtrap */
bl 2f
.long dbtrap
2: mflr %r1
lwz %r1,0(%r1)
mtlr %r1
blrl
CNAME(dbend):
#endif /* KDB */

17
sys/powerpc/aim/trap_subr64.S
View File

@ -62,7 +62,7 @@ restore_usersrs:
clrrdi %r31,%r31,28
slbie %r31
1: ld %r31, 0(%r28) /* Load SLB entry pointer */
cmpli 0, %r31, 0 /* If NULL, stop */
cmpdi %r31, 0 /* If NULL, stop */
beqlr
ld %r30, 0(%r31) /* Load SLBV */
@ -86,18 +86,18 @@ restore_kernsrs:
slbmfee %r31,%r29
clrrdi %r31,%r31,28
slbie %r31
1: cmpli 0, %r29, USER_SLB_SLOT /* Skip the user slot */
1: cmpdi %r29, USER_SLB_SLOT /* Skip the user slot */
beq- 2f
ld %r31, 8(%r28) /* Load SLBE */
cmpli 0, %r31, 0 /* If SLBE is not valid, stop */
cmpdi %r31, 0 /* If SLBE is not valid, stop */
beqlr
ld %r30, 0(%r28) /* Load SLBV */
slbmte %r30, %r31 /* Install SLB entry */
2: addi %r28, %r28, 16 /* Advance pointer */
addi %r29, %r29, 1
cmpli 0, %r29, 64 /* Repeat if we are not at the end */
cmpdi %r29, 64 /* Repeat if we are not at the end */
blt 1b
blr
@ -356,8 +356,7 @@ CNAME(trapcode):
mtsprg1 %r1 /* save SP */
mflr %r1 /* Save the old LR in r1 */
mtsprg2 %r1 /* And then in SPRG2 */
li %r1,TRAP_GENTRAP
ld %r1,0(%r1)
ld %r1,TRAP_GENTRAP(0)
mtlr %r1
li %r1, 0xe0 /* How to get the vector from LR */
blrl /* Branch to generictrap */
@ -673,8 +672,7 @@ realtrap:
* SPRG2 - Original LR
*/
.globl CNAME(trapcode2)
trapcode2:
.globl CNAME(generictrap)
generictrap:
/* Save R1 for computing the exception vector */
mtsprg3 %r1
@ -792,8 +790,7 @@ dbtrap:
andi. %r1,%r1,0xff00
mtsprg3 %r1
li %r1,TRAP_TOCBASE /* get new SP */
ld %r1,0(%r1)
ld %r1,TRAP_TOCBASE(0) /* get new SP */
ld %r1,TOC_REF(tmpstk)(%r1)
addi %r1,%r1,(TMPSTKSZ-48)

2
sys/powerpc/booke/interrupt.c
View File

@ -79,7 +79,7 @@ dump_frame(struct trapframe *frame)
printf(" exc = 0x%x\n", frame->exc);
printf(" srr0 = 0x%08x\n", frame->srr0);
printf(" srr1 = 0x%08x\n", frame->srr1);
printf(" dear = 0x%08x\n", frame->cpu.booke.dear);
printf(" dear = 0x%08x\n", frame->dar);
printf(" esr = 0x%08x\n", frame->cpu.booke.esr);
printf(" lr = 0x%08x\n", frame->lr);
printf(" cr = 0x%08x\n", frame->cr);

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