ahc_pci.c:
Disable DPARCKEN in the DSCOMMAND0 register on the aic7890/91/96/97.
Parity checking is broken for some chip/MB combinations and this
is the work around recommended by Adaptec.
dpt_pci.c:
Remove a superflous '{' that prevented DPT_ALLOW_MEMIO from working.
pcireg.h:
Add a definition for Parity Error Reponse bit in the PCI Space
command register.
This commit is contained in:
Justin T. Gibbs
parent
9aa4621326
commit
6405ed07d7
@ -34,7 +34,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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* $Id: ahc_pci.c,v 1.1 1998/09/15 07:25:33 gibbs Exp $
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*/
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#include <pci.h>
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@ -510,10 +510,14 @@ ahc_pci_attach(pcici_t config_id, int unit)
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{
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u_int dscommand0;
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/*
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* DPARCKEN doesn't work correctly on
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* some MBs so don't use it.
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*/
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id_string = "aic7896/97 ";
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dscommand0 = ahc_inb(ahc, DSCOMMAND0);
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dscommand0 &= ~USCBSIZE32;
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dscommand0 |= CACHETHEN|DPARCKEN|MPARCKEN;
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dscommand0 &= ~(USCBSIZE32|DPARCKEN);
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dscommand0 |= CACHETHEN|MPARCKEN;
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ahc_outb(ahc, DSCOMMAND0, dscommand0);
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break;
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}
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@ -521,10 +525,14 @@ ahc_pci_attach(pcici_t config_id, int unit)
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{
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u_int dscommand0;
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/*
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* DPARCKEN doesn't work correctly on
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* some MBs so don't use it.
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*/
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id_string = "aic7890/91 ";
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dscommand0 = ahc_inb(ahc, DSCOMMAND0);
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dscommand0 &= ~USCBSIZE32;
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dscommand0 |= CACHETHEN|DPARCKEN|MPARCKEN;
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dscommand0 &= ~(USCBSIZE32|DPARCKEN);
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dscommand0 |= CACHETHEN|MPARCKEN;
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ahc_outb(ahc, DSCOMMAND0, dscommand0);
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break;
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}
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@ -32,7 +32,7 @@
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* dptpci.c: PCI Bus Attachment for DPT SCSI HBAs
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*/
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#ident "$Id: dpt_pci.c,v 1.7 1998/08/05 00:54:37 eivind Exp $"
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#ident "$Id: dpt_pci.c,v 1.8 1998/09/15 08:33:38 gibbs Exp $"
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#include "opt_devfs.h"
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#include "opt_dpt.h"
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@ -126,7 +126,7 @@ dpt_pci_attach(pcici_t config_id, int unit)
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command = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG);
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#ifdef DPT_ALLOW_MEMIO
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if ((command & PCI_COMMAND_MEM_ENABLE) == 0
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|| (pci_map_mem(config_id, PCI_BASEADR1, &vaddr, &paddr)) == 0) {
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|| (pci_map_mem(config_id, PCI_BASEADR1, &vaddr, &paddr)) == 0)
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#endif
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if ((command & PCI_COMMAND_IO_ENABLE) == 0
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|| (pci_map_port(config_id, PCI_BASEADR0, &io_base)) == 0)
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: pcireg.h,v 1.18 1997/06/01 16:00:43 peter Exp $
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* $Id: pcireg.h,v 1.19 1997/09/20 07:41:58 dyson Exp $
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*
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*/
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@ -56,6 +56,7 @@
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#define PCIM_CMD_PORTEN 0x0001
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#define PCIM_CMD_MEMEN 0x0002
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#define PCIM_CMD_BUSMASTEREN 0x0004
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#define PCIM_CMD_PERRESPEN 0x0040
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#define PCIR_STATUS 0x06
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#define PCIR_REVID 0x08
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#define PCIR_PROGIF 0x09
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@ -34,7 +34,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id$
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* $Id: ahc_pci.c,v 1.1 1998/09/15 07:25:33 gibbs Exp $
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*/
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#include <pci.h>
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@ -510,10 +510,14 @@ ahc_pci_attach(pcici_t config_id, int unit)
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{
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u_int dscommand0;
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/*
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* DPARCKEN doesn't work correctly on
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* some MBs so don't use it.
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*/
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id_string = "aic7896/97 ";
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dscommand0 = ahc_inb(ahc, DSCOMMAND0);
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dscommand0 &= ~USCBSIZE32;
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dscommand0 |= CACHETHEN|DPARCKEN|MPARCKEN;
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dscommand0 &= ~(USCBSIZE32|DPARCKEN);
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dscommand0 |= CACHETHEN|MPARCKEN;
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ahc_outb(ahc, DSCOMMAND0, dscommand0);
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break;
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}
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@ -521,10 +525,14 @@ ahc_pci_attach(pcici_t config_id, int unit)
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{
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u_int dscommand0;
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/*
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* DPARCKEN doesn't work correctly on
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* some MBs so don't use it.
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*/
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id_string = "aic7890/91 ";
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dscommand0 = ahc_inb(ahc, DSCOMMAND0);
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dscommand0 &= ~USCBSIZE32;
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dscommand0 |= CACHETHEN|DPARCKEN|MPARCKEN;
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dscommand0 &= ~(USCBSIZE32|DPARCKEN);
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dscommand0 |= CACHETHEN|MPARCKEN;
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ahc_outb(ahc, DSCOMMAND0, dscommand0);
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break;
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}
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@ -32,7 +32,7 @@
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* dptpci.c: PCI Bus Attachment for DPT SCSI HBAs
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*/
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#ident "$Id: dpt_pci.c,v 1.7 1998/08/05 00:54:37 eivind Exp $"
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#ident "$Id: dpt_pci.c,v 1.8 1998/09/15 08:33:38 gibbs Exp $"
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#include "opt_devfs.h"
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#include "opt_dpt.h"
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@ -126,7 +126,7 @@ dpt_pci_attach(pcici_t config_id, int unit)
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command = pci_conf_read(config_id, PCI_COMMAND_STATUS_REG);
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#ifdef DPT_ALLOW_MEMIO
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if ((command & PCI_COMMAND_MEM_ENABLE) == 0
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|| (pci_map_mem(config_id, PCI_BASEADR1, &vaddr, &paddr)) == 0) {
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|| (pci_map_mem(config_id, PCI_BASEADR1, &vaddr, &paddr)) == 0)
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#endif
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if ((command & PCI_COMMAND_IO_ENABLE) == 0
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|| (pci_map_port(config_id, PCI_BASEADR0, &io_base)) == 0)
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: pcireg.h,v 1.18 1997/06/01 16:00:43 peter Exp $
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* $Id: pcireg.h,v 1.19 1997/09/20 07:41:58 dyson Exp $
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*
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*/
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@ -56,6 +56,7 @@
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#define PCIM_CMD_PORTEN 0x0001
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#define PCIM_CMD_MEMEN 0x0002
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#define PCIM_CMD_BUSMASTEREN 0x0004
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#define PCIM_CMD_PERRESPEN 0x0040
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#define PCIR_STATUS 0x06
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#define PCIR_REVID 0x08
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#define PCIR_PROGIF 0x09
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