Save PHY address by reading VGE_MIICFG register. For PCIe
controllers(VT613x), we assume the PHY address is 1. Use the saved PHY address in MII register access routines and remove accessing VGE_MIICFG register. While I'm here save PCI express capability register which will be used in near future.
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@ -353,7 +353,7 @@ vge_miibus_readreg(device_t dev, int phy, int reg)
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sc = device_get_softc(dev);
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if (phy != (CSR_READ_1(sc, VGE_MIICFG) & 0x1F))
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if (phy != sc->vge_phyaddr)
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return (0);
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vge_miipoll_stop(sc);
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@ -389,7 +389,7 @@ vge_miibus_writereg(device_t dev, int phy, int reg, int data)
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sc = device_get_softc(dev);
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if (phy != (CSR_READ_1(sc, VGE_MIICFG) & 0x1F))
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if (phy != sc->vge_phyaddr)
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return (0);
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vge_miipoll_stop(sc);
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@ -954,7 +954,7 @@ vge_attach(device_t dev)
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u_char eaddr[ETHER_ADDR_LEN];
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struct vge_softc *sc;
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struct ifnet *ifp;
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int error = 0, rid;
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int error = 0, cap, rid;
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sc = device_get_softc(dev);
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sc->vge_dev = dev;
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@ -978,6 +978,11 @@ vge_attach(device_t dev)
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goto fail;
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}
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if (pci_find_extcap(dev, PCIY_EXPRESS, &cap) == 0) {
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sc->vge_flags |= VGE_FLAG_PCIE;
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sc->vge_expcap = cap;
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}
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/* Allocate interrupt */
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rid = 0;
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sc->vge_irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &rid,
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@ -996,7 +1001,17 @@ vge_attach(device_t dev)
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* Get station address from the EEPROM.
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*/
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vge_read_eeprom(sc, (caddr_t)eaddr, VGE_EE_EADDR, 3, 0);
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/*
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* Save configured PHY address.
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* It seems the PHY address of PCIe controllers just
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* reflects media jump strapping status so we assume the
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* internal PHY address of PCIe controller is at 1.
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*/
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if ((sc->vge_flags & VGE_FLAG_PCIE) != 0)
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sc->vge_phyaddr = 1;
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else
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sc->vge_phyaddr = CSR_READ_1(sc, VGE_MIICFG) &
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VGE_MIICFG_PHYADDR;
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error = vge_dma_alloc(sc);
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if (error)
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goto fail;
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@ -141,8 +141,11 @@ struct vge_softc {
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device_t vge_miibus;
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uint8_t vge_type;
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int vge_if_flags;
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int vge_phyaddr;
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int vge_flags;
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#define VGE_FLAG_PCIE 0x0001
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#define VGE_FLAG_LINK 0x8000
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int vge_expcap;
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int vge_camidx;
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struct mtx vge_mtx;
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struct callout vge_watchdog;
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