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MIPS n64 support - support kstack in XKSEG.

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- enable KX on entry from user-space, we need KX set to save to XKSEG
  addresses.
- add MIPS_XKSEG_START to genassym.c
- Add n64 case for swth.S
This commit is contained in:
Jayachandran C. 2010-07-30 09:38:47 +00:00
parent 3f2b3942c9
commit 654969d149
3 changed files with 19 additions and 4 deletions
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16
sys/mips/mips/exception.S
View File

@ -426,6 +426,12 @@ NNON_LEAF(MipsUserGenException, CALLFRAME_SIZ, ra)
/*
* Save all of the registers except for the kernel temporaries in u.u_pcb.
*/
mfc0 k0, MIPS_COP_0_STATUS
HAZARD_DELAY
#ifdef __mips_n64
ori k1, k0, MIPS_SR_KX
mtc0 k1, MIPS_COP_0_STATUS
#endif
GET_CPU_PCPU(k1)
PTR_L k1, PC_CURPCB(k1)
SAVE_U_PCB_REG(AT, AST, k1)
@ -443,7 +449,7 @@ NNON_LEAF(MipsUserGenException, CALLFRAME_SIZ, ra)
SAVE_U_PCB_REG(t2, T2, k1)
SAVE_U_PCB_REG(t3, T3, k1)
SAVE_U_PCB_REG(ta0, TA0, k1)
mfc0 a0, MIPS_COP_0_STATUS # First arg is the status reg.
move a0, k0 # First arg is the status reg.
SAVE_U_PCB_REG(ta1, TA1, k1)
SAVE_U_PCB_REG(ta2, TA2, k1)
SAVE_U_PCB_REG(ta3, TA3, k1)
@ -642,6 +648,12 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, ra)
* Save the relevant user registers into the u.u_pcb struct.
* We don't need to save s0 - s8 because the compiler does it for us.
*/
mfc0 k0, MIPS_COP_0_STATUS
HAZARD_DELAY
#ifdef __mips_n64
ori k1, k0, MIPS_SR_KX
mtc0 k1, MIPS_COP_0_STATUS
#endif
GET_CPU_PCPU(k1)
PTR_L k1, PC_CURPCB(k1)
SAVE_U_PCB_REG(AT, AST, k1)
@ -680,7 +692,7 @@ NNON_LEAF(MipsUserIntr, CALLFRAME_SIZ, ra)
mflo v0 # get lo/hi late to avoid stall
mfhi v1
mfc0 a0, MIPS_COP_0_STATUS
move a0, k0
mfc0 a1, MIPS_COP_0_CAUSE
MFC0 a3, MIPS_COP_0_EXC_PC
SAVE_U_PCB_REG(v0, MULLO, k1)

1
sys/mips/mips/genassym.c
View File

@ -103,3 +103,4 @@ ASSYM(MAXCOMLEN, MAXCOMLEN);
ASSYM(MIPS_KSEG0_START, MIPS_KSEG0_START);
ASSYM(MIPS_KSEG1_START, MIPS_KSEG1_START);
ASSYM(MIPS_KSEG2_START, MIPS_KSEG2_START);
ASSYM(MIPS_XKSEG_START, MIPS_XKSEG_START);

6
sys/mips/mips/swtch.S
View File

@ -278,10 +278,12 @@ blocked_loop:
PTR_L a2, TD_PCB(a1)
PTR_S a2, PC_CURPCB(a3)
PTR_L v0, TD_KSTACK(a1)
#if !defined(__mips_n64)
#if defined(__mips_n64)
PTR_LI s0, MIPS_XKSEG_START
#else
PTR_LI s0, MIPS_KSEG2_START # If Uarea addr is below kseg2,
bltu v0, s0, sw2 # no need to insert in TLB.
#endif
bltu v0, s0, sw2 # no need to insert in TLB.
lw a1, TD_UPTE + 0(s7) # a1 = u. pte #0
lw a2, TD_UPTE + 4(s7) # a2 = u. pte #1
/*