Apply a small optimization to pmap_remove_l3_range(). Specifically, hoist a
PHYS_TO_VM_PAGE() operation that always returns the same vm_page_t out of the loop. (Since arm64 is configured as VM_PHYSSEG_SPARSE, the implementation of PHYS_TO_VM_PAGE() is more costly than that of VM_PHYSSEG_DENSE platforms, like amd64.) MFC after: 1 week
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@ -2616,11 +2616,13 @@ pmap_remove_l3_range(pmap_t pmap, pd_entry_t l2e, vm_offset_t sva,
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struct rwlock *new_lock;
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pt_entry_t *l3, old_l3;
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vm_offset_t va;
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vm_page_t m;
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vm_page_t l3pg, m;
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PMAP_LOCK_ASSERT(pmap, MA_OWNED);
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KASSERT(rounddown2(sva, L2_SIZE) + L2_SIZE == roundup2(eva, L2_SIZE),
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("pmap_remove_l3_range: range crosses an L3 page table boundary"));
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l3pg = sva < VM_MAXUSER_ADDRESS ? PHYS_TO_VM_PAGE(l2e & ~ATTR_MASK) :
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NULL;
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va = eva;
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for (l3 = pmap_l2_to_l3(&l2e, sva); sva != eva; l3++, sva += L3_SIZE) {
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if (!pmap_l3_valid(pmap_load(l3))) {
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@ -2671,7 +2673,7 @@ pmap_remove_l3_range(pmap_t pmap, pd_entry_t l2e, vm_offset_t sva,
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}
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if (va == eva)
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va = sva;
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if (pmap_unuse_pt(pmap, sva, l2e, free)) {
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if (l3pg != NULL && pmap_unwire_l3(pmap, sva, l3pg, free)) {
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sva += L3_SIZE;
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break;
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}
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