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Fix powerpc and powerpcspe builds

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This change fixes 32-bit PowerPC builds, that r367390 broke
(shift count >= width of type).
This commit is contained in:
Leandro Lupori 2020-11-05 20:18:00 +00:00
parent e9b13c6612
commit 6a32dae2b7
1 changed files with 7 additions and 7 deletions
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14
sys/powerpc/include/spr.h
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@ -492,13 +492,13 @@
#define SPR_MMCR2 0x311
#define SPR_MMCR2_CNBIT(n, bit) ((bit) << (((5 - (n)) * 9) + 10))
#define SPR_MMCR2_FCNS(n) SPR_MMCR2_CNBIT(n, 0x100UL)
#define SPR_MMCR2_FCNP0(n) SPR_MMCR2_CNBIT(n, 0x080UL)
#define SPR_MMCR2_FCNP1(n) SPR_MMCR2_CNBIT(n, 0x040UL)
#define SPR_MMCR2_FCNM1(n) SPR_MMCR2_CNBIT(n, 0x020UL)
#define SPR_MMCR2_FCNM0(n) SPR_MMCR2_CNBIT(n, 0x010UL)
#define SPR_MMCR2_FCNWAIT(n) SPR_MMCR2_CNBIT(n, 0x008UL)
#define SPR_MMCR2_FCNH(n) SPR_MMCR2_CNBIT(n, 0x004UL)
#define SPR_MMCR2_FCNS(n) SPR_MMCR2_CNBIT(n, 0x100ULL)
#define SPR_MMCR2_FCNP0(n) SPR_MMCR2_CNBIT(n, 0x080ULL)
#define SPR_MMCR2_FCNP1(n) SPR_MMCR2_CNBIT(n, 0x040ULL)
#define SPR_MMCR2_FCNM1(n) SPR_MMCR2_CNBIT(n, 0x020ULL)
#define SPR_MMCR2_FCNM0(n) SPR_MMCR2_CNBIT(n, 0x010ULL)
#define SPR_MMCR2_FCNWAIT(n) SPR_MMCR2_CNBIT(n, 0x008ULL)
#define SPR_MMCR2_FCNH(n) SPR_MMCR2_CNBIT(n, 0x004ULL)
/* Freeze Counter N in Hypervisor/Supervisor/Problem states */
#define SPR_MMCR2_FCNHSP(n) \
(SPR_MMCR2_FCNS(n) | SPR_MMCR2_FCNP0(n) | \