There is no need to request a tx credit flush if such a request is already
pending. MFC after: 3 days
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415a54c8c5
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6b49a4ece8
@ -260,7 +260,7 @@ enum {
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/* eq flags */
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EQ_ALLOCATED = (1 << 1), /* firmware resources allocated */
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EQ_STARTED = (1 << 2), /* started */
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EQ_STALLED = (1 << 3), /* currently stalled */
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EQ_CRFLUSHED = (1 << 3), /* expecting an update from SGE */
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};
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/*
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@ -2673,6 +2673,7 @@ cxgbe_txq_start(void *arg, int count)
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struct sge_txq *txq = arg;
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TXQ_LOCK(txq);
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txq->eq.flags &= ~EQ_CRFLUSHED;
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txq_start(txq->ifp, txq);
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TXQ_UNLOCK(txq);
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}
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@ -876,7 +876,7 @@ t4_eth_tx(struct ifnet *ifp, struct sge_txq *txq, struct mbuf *m)
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* WR that reduced it to 0 so we don't need another flush (we don't have
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* any descriptor for a flush WR anyway, duh).
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*/
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if (m && eq->avail > 0)
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if (m && eq->avail > 0 && !(eq->flags & EQ_CRFLUSHED))
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write_eqflush_wr(eq);
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txq->m = m;
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@ -1882,8 +1882,11 @@ write_txpkt_wr(struct port_info *pi, struct sge_txq *txq, struct mbuf *m,
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wr->op_immdlen = htobe32(V_FW_WR_OP(FW_ETH_TX_PKT_WR) |
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V_FW_WR_IMMDLEN(ctrl));
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ctrl = V_FW_WR_LEN16(howmany(nflits, 2));
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if (eq->avail == ndesc)
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if (eq->avail == ndesc && !(eq->flags & EQ_CRFLUSHED)) {
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ctrl |= F_FW_WR_EQUEQ | F_FW_WR_EQUIQ;
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eq->flags |= EQ_CRFLUSHED;
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}
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wr->equiq_to_len16 = htobe32(ctrl);
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wr->r3 = 0;
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@ -2071,8 +2074,10 @@ write_txpkts_wr(struct sge_txq *txq, struct txpkts *txpkts)
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wr->op_immdlen = htobe32(V_FW_WR_OP(FW_ETH_TX_PKTS_WR) |
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V_FW_WR_IMMDLEN(0)); /* immdlen does not matter in this WR */
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ctrl = V_FW_WR_LEN16(howmany(txpkts->nflits, 2));
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if (eq->avail == ndesc)
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if (eq->avail == ndesc && !(eq->flags & EQ_CRFLUSHED)) {
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ctrl |= F_FW_WR_EQUEQ | F_FW_WR_EQUIQ;
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eq->flags |= EQ_CRFLUSHED;
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}
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wr->equiq_to_len16 = htobe32(ctrl);
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wr->plen = htobe16(txpkts->plen);
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wr->npkt = txpkts->npkt;
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@ -2083,7 +2088,7 @@ write_txpkts_wr(struct sge_txq *txq, struct txpkts *txpkts)
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txsd = &eq->sdesc[eq->pidx];
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txsd->desc_used = ndesc;
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KASSERT(eq->avail >= ndesc, ("%s: out ouf descriptors", __func__));
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KASSERT(eq->avail >= ndesc, ("%s: out of descriptors", __func__));
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eq->pending += ndesc;
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eq->avail -= ndesc;
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@ -2384,6 +2389,7 @@ write_eqflush_wr(struct sge_eq *eq)
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txsd->desc_used = 1;
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txsd->map_used = 0;
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eq->flags |= EQ_CRFLUSHED;
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eq->pending++;
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eq->avail--;
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if (++eq->pidx == eq->cap)
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@ -2438,6 +2444,10 @@ handle_sge_egr_update(struct adapter *sc, const struct cpl_sge_egr_update *cpl)
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struct port_info *pi;
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txq = (void *)s->eqmap[qid - s->eq_start];
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KASSERT(txq->eq.flags & EQ_CRFLUSHED,
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("%s: tx queue %p not expecting an update.", __func__, txq));
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pi = txq->ifp->if_softc;
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taskqueue_enqueue(pi->tq, &txq->resume_tx);
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txq->egr_update++;
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