e1000: fix minor issues and improve code style

Fix typo in piece of code of NVM access for SPT.
And cleans up the remaining instances in the shared code
where it was not adhering to the Linux code standard.
Wrong description was found in the mentioned file, so fix them.
Remove shadowing variable declarations.

Relating to operands in bitwise operations having different sizes.
Unreachable code since *clock_in_i2c_* always return success.
Don't return unused s32 and don't check for constants.

Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Sasha Neftin <sasha.neftin@intel.com>
Signed-off-by: Vitaly Lifshits <vitaly.lifshits@intel.com>
Signed-off-by: Robert Konklewski <robertx.konklewski@intel.com>
Signed-off-by: Doug Dziggel <douglas.a.dziggel@intel.com>
Signed-off-by: Todd Fujinaka <todd.fujinaka@intel.com>
Signed-off-by: Jacob Keller <jacob.e.keller@intel.com>
Signed-off-by: Guinan Sun <guinanx.sun@intel.com>
Reviewed-by: Wei Zhao <wei.zhao1@intel.com>

Approved by:	imp
Obtained from:	DPDK (b8592c89c8fbc871d22313dcac0b86c89a7d5a62)
MFC after:	1 week
This commit is contained in:
Guinan Sun 2020-07-06 08:12:03 +00:00 committed by Kevin Bowling
parent 5b426b3e8c
commit 6c59e1866c
7 changed files with 35 additions and 39 deletions

View File

@ -1168,7 +1168,6 @@ static s32 e1000_setup_copper_link_80003es2lan(struct e1000_hw *hw)
/**
* e1000_cfg_on_link_up_80003es2lan - es2 link configuration after link-up
* @hw: pointer to the HW structure
* @duplex: current duplex setting
*
* Configure the KMRN interface by applying last minute quirks for
* 10/100 operation.

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@ -104,10 +104,10 @@ static void e1000_clear_vfta_i350(struct e1000_hw *hw);
static void e1000_i2c_start(struct e1000_hw *hw);
static void e1000_i2c_stop(struct e1000_hw *hw);
static s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
static void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data);
static s32 e1000_clock_out_i2c_byte(struct e1000_hw *hw, u8 data);
static s32 e1000_get_i2c_ack(struct e1000_hw *hw);
static s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
static void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data);
static s32 e1000_clock_out_i2c_bit(struct e1000_hw *hw, bool data);
static void e1000_raise_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
static void e1000_lower_i2c_clk(struct e1000_hw *hw, u32 *i2cctl);
@ -3238,9 +3238,7 @@ s32 e1000_read_i2c_byte_generic(struct e1000_hw *hw, u8 byte_offset,
if (status != E1000_SUCCESS)
goto fail;
status = e1000_clock_in_i2c_byte(hw, data);
if (status != E1000_SUCCESS)
goto fail;
e1000_clock_in_i2c_byte(hw, data);
status = e1000_clock_out_i2c_bit(hw, nack);
if (status != E1000_SUCCESS)
@ -3404,7 +3402,7 @@ static void e1000_i2c_stop(struct e1000_hw *hw)
*
* Clocks in one byte data via I2C data/clock
**/
static s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
static void e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
{
s32 i;
bool bit = 0;
@ -3416,8 +3414,6 @@ static s32 e1000_clock_in_i2c_byte(struct e1000_hw *hw, u8 *data)
e1000_clock_in_i2c_bit(hw, &bit);
*data |= bit << i;
}
return E1000_SUCCESS;
}
/**
@ -3506,7 +3502,7 @@ static s32 e1000_get_i2c_ack(struct e1000_hw *hw)
*
* Clocks in one bit via I2C data/clock
**/
static s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
static void e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
{
u32 i2cctl = E1000_READ_REG(hw, E1000_I2CPARAMS);
@ -3524,8 +3520,6 @@ static s32 e1000_clock_in_i2c_bit(struct e1000_hw *hw, bool *data)
/* Minimum low period of clock is 4.7 us */
usec_delay(E1000_I2C_T_LOW);
return E1000_SUCCESS;
}
/**

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@ -195,7 +195,7 @@ static s32 e1000_write_nvm_srwr(struct e1000_hw *hw, u16 offset, u16 words,
}
for (i = 0; i < words; i++) {
eewr = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) |
eewr = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) |
(data[i] << E1000_NVM_RW_REG_DATA) |
E1000_NVM_RW_REG_START;
@ -281,9 +281,9 @@ static s32 e1000_read_invm_i210(struct e1000_hw *hw, u16 offset,
switch (offset) {
case NVM_MAC_ADDR:
ret_val = e1000_read_invm_word_i210(hw, (u8)offset, &data[0]);
ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+1,
ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 1,
&data[1]);
ret_val |= e1000_read_invm_word_i210(hw, (u8)offset+2,
ret_val |= e1000_read_invm_word_i210(hw, (u8)offset + 2,
&data[2]);
if (ret_val != E1000_SUCCESS)
DEBUGOUT("MAC Addr not found in iNVM\n");
@ -561,8 +561,6 @@ void e1000_init_function_pointers_i210(struct e1000_hw *hw)
{
e1000_init_function_pointers_82575(hw);
hw->nvm.ops.init_params = e1000_init_nvm_params_i210;
return;
}
/**

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@ -841,7 +841,7 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
/**
* __e1000_access_emi_reg_locked - Read/write EMI register
* @hw: pointer to the HW structure
* @addr: EMI address to program
* @address: EMI address to program
* @data: pointer to value to read/write from/to the EMI address
* @read: boolean flag to indicate read or write
*
@ -1619,8 +1619,6 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
if (hw->mac.type >= e1000_pch_lpt) {
u16 phy_reg;
hw->phy.ops.read_reg_locked(hw, I217_PLL_CLOCK_GATE_REG,
&phy_reg);
phy_reg &= ~I217_PLL_CLOCK_GATE_MASK;
@ -2474,7 +2472,7 @@ static s32 e1000_k1_gig_workaround_hv(struct e1000_hw *hw, bool link)
/**
* e1000_configure_k1_ich8lan - Configure K1 power state
* @hw: pointer to the HW structure
* @enable: K1 state to configure
* @k1_enable: K1 state to configure
*
* Configure the K1 power state based on the provided parameter.
* Assumes semaphore already acquired.
@ -2622,6 +2620,7 @@ static s32 e1000_set_mdio_slow_mode_hv(struct e1000_hw *hw)
/**
* e1000_hv_phy_workarounds_ich8lan - A series of Phy workarounds to be
* done after every PHY reset.
* @hw: pointer to the HW structure
**/
static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
{
@ -2943,6 +2942,7 @@ s32 e1000_lv_jumbo_workaround_ich8lan(struct e1000_hw *hw, bool enable)
/**
* e1000_lv_phy_workarounds_ich8lan - A series of Phy workarounds to be
* done after every PHY reset.
* @hw: pointer to the HW structure
**/
static s32 e1000_lv_phy_workarounds_ich8lan(struct e1000_hw *hw)
{
@ -3550,8 +3550,9 @@ static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
for (i = 0; i < words; i += 2) {
if (words - i == 1) {
if (dev_spec->shadow_ram[offset+i].modified) {
data[i] = dev_spec->shadow_ram[offset+i].value;
if (dev_spec->shadow_ram[offset + i].modified) {
data[i] =
dev_spec->shadow_ram[offset + i].value;
} else {
offset_to_read = act_offset + i -
((act_offset + i) % 2);
@ -3568,8 +3569,8 @@ static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
}
} else {
offset_to_read = act_offset + i;
if (!(dev_spec->shadow_ram[offset+i].modified) ||
!(dev_spec->shadow_ram[offset+i+1].modified)) {
if (!(dev_spec->shadow_ram[offset + i].modified) ||
!(dev_spec->shadow_ram[offset + i + 1].modified)) {
ret_val =
e1000_read_flash_dword_ich8lan(hw,
offset_to_read,
@ -3577,15 +3578,16 @@ static s32 e1000_read_nvm_spt(struct e1000_hw *hw, u16 offset, u16 words,
if (ret_val)
break;
}
if (dev_spec->shadow_ram[offset+i].modified)
data[i] = dev_spec->shadow_ram[offset+i].value;
if (dev_spec->shadow_ram[offset + i].modified)
data[i] =
dev_spec->shadow_ram[offset + i].value;
else
data[i] = (u16) (dword & 0xFFFF);
if (dev_spec->shadow_ram[offset+i].modified)
data[i+1] =
dev_spec->shadow_ram[offset+i+1].value;
data[i] = (u16)(dword & 0xFFFF);
if (dev_spec->shadow_ram[offset + i + 1].modified)
data[i + 1] =
dev_spec->shadow_ram[offset + i + 1].value;
else
data[i+1] = (u16) (dword >> 16 & 0xFFFF);
data[i + 1] = (u16)(dword >> 16 & 0xFFFF);
}
}
@ -3639,8 +3641,8 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
ret_val = E1000_SUCCESS;
for (i = 0; i < words; i++) {
if (dev_spec->shadow_ram[offset+i].modified) {
data[i] = dev_spec->shadow_ram[offset+i].value;
if (dev_spec->shadow_ram[offset + i].modified) {
data[i] = dev_spec->shadow_ram[offset + i].value;
} else {
ret_val = e1000_read_flash_word_ich8lan(hw,
act_offset + i,
@ -4045,8 +4047,8 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
nvm->ops.acquire(hw);
for (i = 0; i < words; i++) {
dev_spec->shadow_ram[offset+i].modified = TRUE;
dev_spec->shadow_ram[offset+i].value = data[i];
dev_spec->shadow_ram[offset + i].modified = TRUE;
dev_spec->shadow_ram[offset + i].value = data[i];
}
nvm->ops.release(hw);

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@ -2362,7 +2362,7 @@ e1000_release_swfw_sync(struct e1000_hw *hw, u16 mask)
; /* Empty */
swfw_sync = E1000_READ_REG(hw, E1000_SW_FW_SYNC);
swfw_sync &= ~mask;
swfw_sync &= (u32)~mask;
E1000_WRITE_REG(hw, E1000_SW_FW_SYNC, swfw_sync);
e1000_put_hw_semaphore(hw);

View File

@ -578,7 +578,7 @@ s32 e1000_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
}
for (i = 0; i < words; i++) {
eerd = ((offset+i) << E1000_NVM_RW_ADDR_SHIFT) +
eerd = ((offset + i) << E1000_NVM_RW_ADDR_SHIFT) +
E1000_NVM_RW_REG_START;
E1000_WRITE_REG(hw, E1000_EERD, eerd);

View File

@ -621,7 +621,7 @@ s32 e1000_write_sfp_data_byte(struct e1000_hw *hw, u16 offset, u8 data)
* lane and update whole word
*/
data_local = i2ccmd & 0xFF00;
data_local |= data;
data_local |= (u32)data;
i2ccmd = ((offset <<
E1000_I2CCMD_REG_ADDR_SHIFT) |
E1000_I2CCMD_OPCODE_WRITE | data_local);
@ -3094,6 +3094,7 @@ s32 e1000_determine_phy_address(struct e1000_hw *hw)
/**
* e1000_get_phy_addr_for_bm_page - Retrieve PHY page address
* @page: page to access
* @reg: register to access
*
* Returns the phy address for the page requested.
**/
@ -3531,6 +3532,7 @@ void e1000_power_down_phy_copper(struct e1000_hw *hw)
* @offset: register offset to be read
* @data: pointer to the read data
* @locked: semaphore has already been acquired or not
* @page_set: BM_WUC_PAGE already set and access enabled
*
* Acquires semaphore, if necessary, then reads the PHY register at offset
* and stores the retrieved information in data. Release any acquired
@ -3641,6 +3643,7 @@ s32 e1000_read_phy_reg_page_hv(struct e1000_hw *hw, u32 offset, u16 *data)
* @offset: register offset to write to
* @data: data to write at register offset
* @locked: semaphore has already been acquired or not
* @page_set: BM_WUC_PAGE already set and access enabled
*
* Acquires semaphore, if necessary, then writes the data to PHY register
* at the offset. Release any acquired semaphores before exiting.