Remove PG_U from the rest of the kernel pmap ptes.
Supposedly, they PG_U bits there were set to easier making some kernel page accessible to userspace in-place. Since it was not used for the whole existence of the amd64 pmap.c and current design of the shared pages prefers double-mapping over the in-place access, remove PG_U both from the direct map and KVA slots. Reviewed by: alc, markj Sponsored by: The FreeBSD Foundation MFC after: 1 week
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@ -1011,8 +1011,7 @@ create_pagetables(vm_paddr_t *firstaddr)
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/* And connect up the PD to the PDP (leaving room for L4 pages) */
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pdp_p = (pdp_entry_t *)(KPDPphys + ptoa(KPML4I - KPML4BASE));
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for (i = 0; i < nkpdpe; i++)
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pdp_p[i + KPDPI] = (KPDphys + ptoa(i)) | X86_PG_RW | X86_PG_V |
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PG_U;
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pdp_p[i + KPDPI] = (KPDphys + ptoa(i)) | X86_PG_RW | X86_PG_V;
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/*
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* Now, set up the direct map region using 2MB and/or 1GB pages. If
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@ -1038,7 +1037,7 @@ create_pagetables(vm_paddr_t *firstaddr)
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}
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for (j = 0; i < ndmpdp; i++, j++) {
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pdp_p[i] = DMPDphys + ptoa(j);
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pdp_p[i] |= X86_PG_RW | X86_PG_V | PG_U;
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pdp_p[i] |= X86_PG_RW | X86_PG_V;
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}
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/*
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@ -1054,7 +1053,7 @@ create_pagetables(vm_paddr_t *firstaddr)
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bootaddr_rwx(i << PDRSHIFT);
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for (i = 0; i < nkdmpde; i++)
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pdp_p[i] = (DMPDkernphys + ptoa(i)) | X86_PG_RW |
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X86_PG_V | PG_U;
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X86_PG_V;
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}
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/* And recursively map PML4 to itself in order to get PTmap */
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@ -1065,13 +1064,13 @@ create_pagetables(vm_paddr_t *firstaddr)
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/* Connect the Direct Map slot(s) up to the PML4. */
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for (i = 0; i < ndmpdpphys; i++) {
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p4_p[DMPML4I + i] = DMPDPphys + ptoa(i);
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p4_p[DMPML4I + i] |= X86_PG_RW | X86_PG_V | PG_U;
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p4_p[DMPML4I + i] |= X86_PG_RW | X86_PG_V;
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}
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/* Connect the KVA slots up to the PML4 */
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for (i = 0; i < NKPML4E; i++) {
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p4_p[KPML4BASE + i] = KPDPphys + ptoa(i);
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p4_p[KPML4BASE + i] |= X86_PG_RW | X86_PG_V | PG_U;
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p4_p[KPML4BASE + i] |= X86_PG_RW | X86_PG_V;
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}
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}
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@ -2628,11 +2627,11 @@ pmap_pinit_pml4(vm_page_t pml4pg)
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/* Wire in kernel global address entries. */
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for (i = 0; i < NKPML4E; i++) {
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pm_pml4[KPML4BASE + i] = (KPDPphys + ptoa(i)) | X86_PG_RW |
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X86_PG_V | PG_U;
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X86_PG_V;
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}
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for (i = 0; i < ndmpdpphys; i++) {
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pm_pml4[DMPML4I + i] = (DMPDPphys + ptoa(i)) | X86_PG_RW |
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X86_PG_V | PG_U;
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X86_PG_V;
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}
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/* install self-referential address mapping entry(s) */
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