Restore sfence semantics in mxge after the introduction
of a global mfence based mb() in r185162
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8c85a7fb78
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@ -731,9 +731,9 @@ mxge_load_firmware_helper(mxge_softc_t *sc, uint32_t *limit)
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mxge_pio_copy(sc->sram + MXGE_FW_OFFSET + i,
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inflate_buffer + i,
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min(256U, (unsigned)(fw_len - i)));
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mb();
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wmb();
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dummy = *sc->sram;
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mb();
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wmb();
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}
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*limit = fw_len;
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@ -766,7 +766,7 @@ mxge_dummy_rdma(mxge_softc_t *sc, int enable)
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/* clear confirmation addr */
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confirm = (volatile uint32_t *)sc->cmd;
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*confirm = 0;
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mb();
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wmb();
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/* send an rdma command to the PCIe engine, and wait for the
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response in the confirmation address. The firmware should
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@ -788,9 +788,9 @@ mxge_dummy_rdma(mxge_softc_t *sc, int enable)
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submit = (volatile char *)(sc->sram + MXGEFW_BOOT_DUMMY_RDMA);
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mxge_pio_copy(submit, buf, 64);
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mb();
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wmb();
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DELAY(1000);
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mb();
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wmb();
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i = 0;
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while (*confirm != 0xffffffff && i < 20) {
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DELAY(1000);
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@ -828,7 +828,7 @@ mxge_send_cmd(mxge_softc_t *sc, uint32_t cmd, mxge_cmd_t *data)
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buf->response_addr.high = htobe32(dma_high);
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mtx_lock(&sc->cmd_mtx);
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response->result = 0xffffffff;
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mb();
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wmb();
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mxge_pio_copy((volatile void *)cmd_addr, buf, sizeof (*buf));
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/* wait up to 20ms */
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@ -836,7 +836,7 @@ mxge_send_cmd(mxge_softc_t *sc, uint32_t cmd, mxge_cmd_t *data)
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for (sleep_total = 0; sleep_total < 20; sleep_total++) {
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bus_dmamap_sync(sc->cmd_dma.dmat,
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sc->cmd_dma.map, BUS_DMASYNC_POSTREAD);
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mb();
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wmb();
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switch (be32toh(response->result)) {
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case 0:
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data->data0 = be32toh(response->data);
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@ -964,7 +964,7 @@ mxge_load_firmware(mxge_softc_t *sc, int adopt)
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/* clear confirmation addr */
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confirm = (volatile uint32_t *)sc->cmd;
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*confirm = 0;
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mb();
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wmb();
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/* send a reload command to the bootstrap MCP, and wait for the
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response in the confirmation address. The firmware should
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write a -1 there to indicate it is alive and well
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@ -989,9 +989,9 @@ mxge_load_firmware(mxge_softc_t *sc, int adopt)
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submit = (volatile char *)(sc->sram + MXGEFW_BOOT_HANDOFF);
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mxge_pio_copy(submit, buf, 64);
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mb();
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wmb();
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DELAY(1000);
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mb();
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wmb();
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i = 0;
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while (*confirm != 0xffffffff && i < 20) {
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DELAY(1000*10);
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@ -1652,7 +1652,7 @@ mxge_submit_req_backwards(mxge_tx_ring_t *tx,
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idx = (starting_slot + cnt) & tx->mask;
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mxge_pio_copy(&tx->lanai[idx],
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&src[cnt], sizeof(*src));
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mb();
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wmb();
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}
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}
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@ -1678,14 +1678,14 @@ mxge_submit_req(mxge_tx_ring_t *tx, mcp_kreq_ether_send_t *src,
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last_flags = src->flags;
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src->flags = 0;
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mb();
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wmb();
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dst = dstp = &tx->lanai[idx];
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srcp = src;
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if ((idx + cnt) < tx->mask) {
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for (i = 0; i < (cnt - 1); i += 2) {
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mxge_pio_copy(dstp, srcp, 2 * sizeof(*src));
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mb(); /* force write every 32 bytes */
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wmb(); /* force write every 32 bytes */
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srcp += 2;
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dstp += 2;
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}
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@ -1698,7 +1698,7 @@ mxge_submit_req(mxge_tx_ring_t *tx, mcp_kreq_ether_send_t *src,
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if (i < cnt) {
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/* submit the first request */
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mxge_pio_copy(dstp, srcp, sizeof(*src));
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mb(); /* barrier before setting valid flag */
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wmb(); /* barrier before setting valid flag */
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}
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/* re-write the last 32-bits with the valid flags */
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@ -1709,7 +1709,7 @@ mxge_submit_req(mxge_tx_ring_t *tx, mcp_kreq_ether_send_t *src,
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dst_ints+=3;
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*dst_ints = *src_ints;
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tx->req += cnt;
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mb();
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wmb();
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}
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#if IFCAP_TSO4
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@ -2128,12 +2128,12 @@ mxge_submit_8rx(volatile mcp_kreq_ether_recv_t *dst,
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low = src->addr_low;
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src->addr_low = 0xffffffff;
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mxge_pio_copy(dst, src, 4 * sizeof (*src));
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mb();
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wmb();
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mxge_pio_copy(dst + 4, src + 4, 4 * sizeof (*src));
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mb();
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wmb();
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src->addr_low = low;
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dst->addr_low = low;
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mb();
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wmb();
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}
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static int
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@ -2688,7 +2688,7 @@ mxge_intr(void *arg)
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send_done_count = be32toh(stats->send_done_count);
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}
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if (sc->legacy_irq && mxge_deassert_wait)
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mb();
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wmb();
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} while (*((volatile uint8_t *) &stats->valid));
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if (__predict_false(stats->stats_updated)) {
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@ -3337,7 +3337,7 @@ mxge_close(mxge_softc_t *sc)
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callout_stop(&sc->co_hdl);
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sc->ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
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old_down_cnt = sc->down_cnt;
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mb();
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wmb();
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err = mxge_send_cmd(sc, MXGEFW_CMD_ETHERNET_DOWN, &cmd);
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if (err) {
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device_printf(sc->dev, "Couldn't bring down link\n");
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@ -3346,7 +3346,7 @@ mxge_close(mxge_softc_t *sc)
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/* wait for down irq */
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DELAY(10 * sc->intr_coal_delay);
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}
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mb();
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wmb();
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if (old_down_cnt == sc->down_cnt) {
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device_printf(sc->dev, "never got down irq\n");
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}
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@ -283,13 +283,13 @@ struct mxge_media_type
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#if defined (__GNUC__)
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#if #cpu(i386) || defined __i386 || defined i386 || defined __i386__ || #cpu(x86_64) || defined __x86_64__
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#define mb() __asm__ __volatile__ ("sfence;": : :"memory")
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#define wmb() __asm__ __volatile__ ("sfence;": : :"memory")
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#elif #cpu(sparc64) || defined sparc64 || defined __sparcv9
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#define mb() __asm__ __volatile__ ("membar #MemIssue": : :"memory")
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#define wmb() __asm__ __volatile__ ("membar #MemIssue": : :"memory")
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#elif #cpu(sparc) || defined sparc || defined __sparc__
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#define mb() __asm__ __volatile__ ("stbar;": : :"memory")
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#define wmb() __asm__ __volatile__ ("stbar;": : :"memory")
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#else
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#define mb() /* XXX just to make this compile */
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#define wmb() /* XXX just to make this compile */
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#endif
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#else
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#error "unknown compiler"
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