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Add two new CPU specific definitions - the watchdog clock frequency and

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the UART clock frequency.

The AR933x and AR934x have separate PLL settings for these.
This commit is contained in:
Adrian Chadd 2013-07-21 03:51:24 +00:00
parent a36b76a787
commit 766c980a8b
1 changed files with 5 additions and 1 deletions
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6
sys/mips/atheros/ar71xx_cpudef.h
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@ -121,10 +121,14 @@ extern uint32_t u_ar71xx_refclk;
extern uint32_t u_ar71xx_cpu_freq;
extern uint32_t u_ar71xx_ahb_freq;
extern uint32_t u_ar71xx_ddr_freq;
extern uint32_t u_ar71xx_uart_freq;
extern uint32_t u_ar71xx_wdt_freq;
static inline uint64_t ar71xx_refclk(void) { return u_ar71xx_refclk; }
static inline uint64_t ar71xx_cpu_freq(void) { return u_ar71xx_cpu_freq; }
static inline uint64_t ar71xx_ahb_freq(void) { return u_ar71xx_ahb_freq; }
static inline uint64_t ar71xx_ddr_freq(void) { return u_ar71xx_ddr_freq; }
static inline uint64_t ar71xx_uart_freq(void) { return u_ar71xx_uart_freq; }
static inline uint64_t ar71xx_wdt_freq(void) { return u_ar71xx_wdt_freq; }
#endif