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Only attempt to list extended capabilities for devices that have a

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PCI-express capabilities.  Non-PCI-express PCI devices may simply ignore
the upper bits in a config register address effectively aliasing the
device ID register to 0x100 rather than returning 0xFFFFFFFF.  Previously
the code relied on these reads returning 0xFFFFFFFF.

MFC after:	3 days
This commit is contained in:
John Baldwin 2010-09-16 16:03:12 +00:00
parent bf12976c76
commit 770e4c5bc0
1 changed files with 5 additions and 1 deletions
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6
usr.sbin/pciconf/cap.c
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@ -460,6 +460,7 @@ cap_pciaf(int fd, struct pci_conf *p, uint8_t ptr)
void
list_caps(int fd, struct pci_conf *p)
{
int express;
uint16_t sta;
uint8_t ptr, cap;
@ -481,6 +482,7 @@ list_caps(int fd, struct pci_conf *p)
}
/* Walk the capability list. */
express = 0;
ptr = read_config(fd, &p->pc_sel, ptr, 1);
while (ptr != 0 && ptr != 0xff) {
cap = read_config(fd, &p->pc_sel, ptr + PCICAP_ID, 1);
@ -514,6 +516,7 @@ list_caps(int fd, struct pci_conf *p)
cap_subvendor(fd, p, ptr);
break;
case PCIY_EXPRESS:
express = 1;
cap_express(fd, p, ptr);
break;
case PCIY_MSIX:
@ -533,7 +536,8 @@ list_caps(int fd, struct pci_conf *p)
ptr = read_config(fd, &p->pc_sel, ptr + PCICAP_NEXTPTR, 1);
}
list_ecaps(fd, p);
if (express)
list_ecaps(fd, p);
}
/* From <sys/systm.h>. */