diff --git a/sys/amd64/amd64/apic_vector.S b/sys/amd64/amd64/apic_vector.S index 09e1b87d88df..7acd37cc5b17 100644 --- a/sys/amd64/amd64/apic_vector.S +++ b/sys/amd64/amd64/apic_vector.S @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.39 1999/06/01 18:20:11 jlemon Exp $ + * $Id: apic_vector.s,v 1.40 1999/06/16 03:53:52 tegge Exp $ */ @@ -398,6 +398,7 @@ __CONCAT(Xresume,irq_num): ; \ MASK_IRQ(irq_num) ; \ EOI_IRQ(irq_num) ; \ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ lock ; \ @@ -409,6 +410,7 @@ __CONCAT(Xresume,irq_num): ; \ ALIGN_TEXT ; \ 2: ; /* masked by cpl|cml */ \ APIC_ITRACE(apic_itrace_masked, irq_num, APIC_ITRACE_MASKED) ; \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ DELOCK ; /* XXX this is going away... */ \ @@ -418,6 +420,7 @@ __CONCAT(Xresume,irq_num): ; \ 3: ; /* other cpu has isr lock */ \ APIC_ITRACE(apic_itrace_noisrlock, irq_num, APIC_ITRACE_NOISRLOCK) ;\ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ testl $IRQ_BIT(irq_num), _cpl ; \ jne 4f ; /* this INT masked */ \ @@ -485,6 +488,7 @@ __CONCAT(Xresume,irq_num): ; \ pushl %eax ; \ orl _intr_mask + (irq_num) * 4, %eax ; \ movl %eax, _cpl ; \ + lock ; \ andl $~IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ ; \ @@ -508,6 +512,7 @@ __CONCAT(Xresume,irq_num): ; \ MASK_IRQ(irq_num) ; \ EOI_IRQ(irq_num) ; \ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ lock ; \ @@ -518,6 +523,7 @@ __CONCAT(Xresume,irq_num): ; \ ALIGN_TEXT ; \ 2: ; /* masked by cpl, leave iactive set */ \ APIC_ITRACE(apic_itrace_masked, irq_num, APIC_ITRACE_MASKED) ; \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ ISR_RELLOCK ; /* XXX this is going away... */ \ @@ -527,6 +533,7 @@ __CONCAT(Xresume,irq_num): ; \ 3: ; /* other cpu has isr lock */ \ APIC_ITRACE(apic_itrace_noisrlock, irq_num, APIC_ITRACE_NOISRLOCK) ;\ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ testl $IRQ_BIT(irq_num), _cpl ; \ jne 4f ; /* this INT masked */ \ @@ -698,6 +705,7 @@ _Xcpuast: movl _cpl, %eax #endif pushl %eax + lock orl $SWI_AST_PENDING, _ipending AVCPL_UNLOCK lock diff --git a/sys/amd64/amd64/cpu_switch.S b/sys/amd64/amd64/cpu_switch.S index 757861889b8c..428b0ae2d573 100644 --- a/sys/amd64/amd64/cpu_switch.S +++ b/sys/amd64/amd64/cpu_switch.S @@ -33,7 +33,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: swtch.s,v 1.81 1999/05/12 21:38:45 luoqi Exp $ + * $Id: swtch.s,v 1.82 1999/06/01 18:19:45 jlemon Exp $ */ #include "npx.h" @@ -311,7 +311,7 @@ _idle: * XXX: we had damn well better be sure we had it before doing this! */ CPL_LOCK /* XXX */ - andl $~SWI_AST_MASK, _ipending /* XXX */ + MPLOCKED andl $~SWI_AST_MASK, _ipending /* XXX */ movl $0, _cpl /* XXX Allow ASTs on other CPU */ CPL_UNLOCK /* XXX */ movl $FREE_LOCK, %eax diff --git a/sys/amd64/amd64/swtch.s b/sys/amd64/amd64/swtch.s index 757861889b8c..428b0ae2d573 100644 --- a/sys/amd64/amd64/swtch.s +++ b/sys/amd64/amd64/swtch.s @@ -33,7 +33,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: swtch.s,v 1.81 1999/05/12 21:38:45 luoqi Exp $ + * $Id: swtch.s,v 1.82 1999/06/01 18:19:45 jlemon Exp $ */ #include "npx.h" @@ -311,7 +311,7 @@ _idle: * XXX: we had damn well better be sure we had it before doing this! */ CPL_LOCK /* XXX */ - andl $~SWI_AST_MASK, _ipending /* XXX */ + MPLOCKED andl $~SWI_AST_MASK, _ipending /* XXX */ movl $0, _cpl /* XXX Allow ASTs on other CPU */ CPL_UNLOCK /* XXX */ movl $FREE_LOCK, %eax diff --git a/sys/i386/i386/apic_vector.s b/sys/i386/i386/apic_vector.s index 09e1b87d88df..7acd37cc5b17 100644 --- a/sys/i386/i386/apic_vector.s +++ b/sys/i386/i386/apic_vector.s @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.39 1999/06/01 18:20:11 jlemon Exp $ + * $Id: apic_vector.s,v 1.40 1999/06/16 03:53:52 tegge Exp $ */ @@ -398,6 +398,7 @@ __CONCAT(Xresume,irq_num): ; \ MASK_IRQ(irq_num) ; \ EOI_IRQ(irq_num) ; \ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ lock ; \ @@ -409,6 +410,7 @@ __CONCAT(Xresume,irq_num): ; \ ALIGN_TEXT ; \ 2: ; /* masked by cpl|cml */ \ APIC_ITRACE(apic_itrace_masked, irq_num, APIC_ITRACE_MASKED) ; \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ DELOCK ; /* XXX this is going away... */ \ @@ -418,6 +420,7 @@ __CONCAT(Xresume,irq_num): ; \ 3: ; /* other cpu has isr lock */ \ APIC_ITRACE(apic_itrace_noisrlock, irq_num, APIC_ITRACE_NOISRLOCK) ;\ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ testl $IRQ_BIT(irq_num), _cpl ; \ jne 4f ; /* this INT masked */ \ @@ -485,6 +488,7 @@ __CONCAT(Xresume,irq_num): ; \ pushl %eax ; \ orl _intr_mask + (irq_num) * 4, %eax ; \ movl %eax, _cpl ; \ + lock ; \ andl $~IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ ; \ @@ -508,6 +512,7 @@ __CONCAT(Xresume,irq_num): ; \ MASK_IRQ(irq_num) ; \ EOI_IRQ(irq_num) ; \ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ lock ; \ @@ -518,6 +523,7 @@ __CONCAT(Xresume,irq_num): ; \ ALIGN_TEXT ; \ 2: ; /* masked by cpl, leave iactive set */ \ APIC_ITRACE(apic_itrace_masked, irq_num, APIC_ITRACE_MASKED) ; \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ ISR_RELLOCK ; /* XXX this is going away... */ \ @@ -527,6 +533,7 @@ __CONCAT(Xresume,irq_num): ; \ 3: ; /* other cpu has isr lock */ \ APIC_ITRACE(apic_itrace_noisrlock, irq_num, APIC_ITRACE_NOISRLOCK) ;\ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ testl $IRQ_BIT(irq_num), _cpl ; \ jne 4f ; /* this INT masked */ \ @@ -698,6 +705,7 @@ _Xcpuast: movl _cpl, %eax #endif pushl %eax + lock orl $SWI_AST_PENDING, _ipending AVCPL_UNLOCK lock diff --git a/sys/i386/i386/swtch.s b/sys/i386/i386/swtch.s index 757861889b8c..428b0ae2d573 100644 --- a/sys/i386/i386/swtch.s +++ b/sys/i386/i386/swtch.s @@ -33,7 +33,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: swtch.s,v 1.81 1999/05/12 21:38:45 luoqi Exp $ + * $Id: swtch.s,v 1.82 1999/06/01 18:19:45 jlemon Exp $ */ #include "npx.h" @@ -311,7 +311,7 @@ _idle: * XXX: we had damn well better be sure we had it before doing this! */ CPL_LOCK /* XXX */ - andl $~SWI_AST_MASK, _ipending /* XXX */ + MPLOCKED andl $~SWI_AST_MASK, _ipending /* XXX */ movl $0, _cpl /* XXX Allow ASTs on other CPU */ CPL_UNLOCK /* XXX */ movl $FREE_LOCK, %eax diff --git a/sys/i386/isa/apic_ipl.s b/sys/i386/isa/apic_ipl.s index 51ba09511fef..9ed8de08a97f 100644 --- a/sys/i386/isa/apic_ipl.s +++ b/sys/i386/isa/apic_ipl.s @@ -22,7 +22,7 @@ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF * SUCH DAMAGE. * - * $Id: apic_ipl.s,v 1.22 1998/09/06 22:41:41 tegge Exp $ + * $Id: apic_ipl.s,v 1.23 1999/04/10 19:22:17 tegge Exp $ */ @@ -116,6 +116,7 @@ splz_next: ALIGN_TEXT splz_unpend: bsfl %ecx,%ecx + lock btrl %ecx,_ipending jnc splz_next cmpl $NHWI,%ecx diff --git a/sys/i386/isa/apic_vector.s b/sys/i386/isa/apic_vector.s index 09e1b87d88df..7acd37cc5b17 100644 --- a/sys/i386/isa/apic_vector.s +++ b/sys/i386/isa/apic_vector.s @@ -1,6 +1,6 @@ /* * from: vector.s, 386BSD 0.1 unknown origin - * $Id: apic_vector.s,v 1.39 1999/06/01 18:20:11 jlemon Exp $ + * $Id: apic_vector.s,v 1.40 1999/06/16 03:53:52 tegge Exp $ */ @@ -398,6 +398,7 @@ __CONCAT(Xresume,irq_num): ; \ MASK_IRQ(irq_num) ; \ EOI_IRQ(irq_num) ; \ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ lock ; \ @@ -409,6 +410,7 @@ __CONCAT(Xresume,irq_num): ; \ ALIGN_TEXT ; \ 2: ; /* masked by cpl|cml */ \ APIC_ITRACE(apic_itrace_masked, irq_num, APIC_ITRACE_MASKED) ; \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ DELOCK ; /* XXX this is going away... */ \ @@ -418,6 +420,7 @@ __CONCAT(Xresume,irq_num): ; \ 3: ; /* other cpu has isr lock */ \ APIC_ITRACE(apic_itrace_noisrlock, irq_num, APIC_ITRACE_NOISRLOCK) ;\ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ testl $IRQ_BIT(irq_num), _cpl ; \ jne 4f ; /* this INT masked */ \ @@ -485,6 +488,7 @@ __CONCAT(Xresume,irq_num): ; \ pushl %eax ; \ orl _intr_mask + (irq_num) * 4, %eax ; \ movl %eax, _cpl ; \ + lock ; \ andl $~IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ ; \ @@ -508,6 +512,7 @@ __CONCAT(Xresume,irq_num): ; \ MASK_IRQ(irq_num) ; \ EOI_IRQ(irq_num) ; \ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ lock ; \ @@ -518,6 +523,7 @@ __CONCAT(Xresume,irq_num): ; \ ALIGN_TEXT ; \ 2: ; /* masked by cpl, leave iactive set */ \ APIC_ITRACE(apic_itrace_masked, irq_num, APIC_ITRACE_MASKED) ; \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ AVCPL_UNLOCK ; \ ISR_RELLOCK ; /* XXX this is going away... */ \ @@ -527,6 +533,7 @@ __CONCAT(Xresume,irq_num): ; \ 3: ; /* other cpu has isr lock */ \ APIC_ITRACE(apic_itrace_noisrlock, irq_num, APIC_ITRACE_NOISRLOCK) ;\ AVCPL_LOCK ; /* MP-safe */ \ + lock ; \ orl $IRQ_BIT(irq_num), _ipending ; \ testl $IRQ_BIT(irq_num), _cpl ; \ jne 4f ; /* this INT masked */ \ @@ -698,6 +705,7 @@ _Xcpuast: movl _cpl, %eax #endif pushl %eax + lock orl $SWI_AST_PENDING, _ipending AVCPL_UNLOCK lock diff --git a/sys/i386/isa/ipl.s b/sys/i386/isa/ipl.s index 66f31cf672d1..51e8329cf63e 100644 --- a/sys/i386/isa/ipl.s +++ b/sys/i386/isa/ipl.s @@ -36,7 +36,7 @@ * * @(#)ipl.s * - * $Id: ipl.s,v 1.27 1999/05/06 09:44:54 bde Exp $ + * $Id: ipl.s,v 1.28 1999/06/01 18:20:15 jlemon Exp $ */ @@ -236,6 +236,7 @@ doreti_unpend: TEST_CIL /* we enter with cpl locked */ bsfl %ecx, %ecx /* slow, but not worth optimizing */ + lock btrl %ecx, _ipending jnc doreti_next2 /* some intr cleared memory copy */ cmpl $NHWI, %ecx @@ -377,7 +378,7 @@ swi_ast_phantom: */ cli ICPL_LOCK - orl $SWI_AST_PENDING, _ipending + MPLOCKED orl $SWI_AST_PENDING, _ipending /* cpl is unlocked in doreti_exit */ subl %eax,%eax #ifdef CPL_AND_CML