Keep interrupts disabled while handling external interrupts.
There's no advantage in allowing nested external interrupts. In fact, it leads to a potential stack overrun. While here, put the interrupt vector in the trapframe, so as to compensate for the 36 cycle latency of reading cr.ivr. Further simplify assembly code by dealing with ASTs from C. Approved by: re (blanket)
This commit is contained in:
Marcel Moolenaar
parent
b5e8f167b9
commit
78afae27e5
@ -636,22 +636,22 @@ END(exception_restore)
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{ .mib ; \
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mov r17=_ifa_ ; \
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mov r16=ip ; \
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br.sptk exception_save ; \
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br.sptk exception_save ;; \
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} ; \
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{ .mmi ; \
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(p11) ssm psr.i ;; \
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alloc r15=ar.pfs,0,0,2,0 ; \
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alloc r15=ar.pfs,0,0,2,0 ;; \
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(p11) ssm psr.i ; \
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mov out0=_n_ ;; \
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} ; \
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{ .mfb ; \
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{ .mib ; \
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(p11) srlz.d ; \
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add out1=16,sp ; \
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nop 0 ; \
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br.call.sptk rp=_func_ ; \
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br.call.sptk rp=_func_ ;; \
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} ; \
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{ .mfb ; \
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nop 0 ; \
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nop 0 ; \
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br.sptk exception_restore ; \
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br.sptk exception_restore ;; \
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}
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#define IVT_ENTRY(name, offset) \
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@ -1233,13 +1233,19 @@ IVT_ENTRY(Break_Instruction, 0x2c00)
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{ .mmi
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alloc r15=ar.pfs,0,0,2,0
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;;
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flushrs
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(p11) ssm psr.i
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mov out0=11
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;;
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}
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{ .mib
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(p11) ssm psr.i
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{ .mmi
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flushrs
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;;
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(p11) srlz.d
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add out1=16,sp
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}
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{ .mfb
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nop 0
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nop 0
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br.call.sptk rp=trap
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;;
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}
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@ -1253,50 +1259,21 @@ IVT_END(Break_Instruction)
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IVT_ENTRY(External_Interrupt, 0x3000)
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{ .mib
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mov r17=cr.lid // cr.iim and cr.ifa are undefined.
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mov r17=cr.ivr // Put the vector in the trap frame.
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mov r16=ip
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br.sptk exception_save
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;;
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}
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alloc r14=ar.pfs,0,0,2,0
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cmp4.eq p14,p0=0,r0
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;;
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1:
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{ .mii
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mov out0=cr.ivr // Get interrupt vector
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add out1=16,sp
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;;
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cmp.eq p15,p0=15,out0 // check for spurious vector number
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}
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{ .mbb
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ssm psr.i // re-enable interrupts
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(p15) br.dpnt.few 2f // if spurious, we are done
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br.call.sptk.many rp=interrupt // call high-level handler
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;;
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}
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{ .mmi
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rsm psr.i // disable interrupts
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;;
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srlz.d
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{ .mfb
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alloc r15=ar.pfs,0,0,1,0
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nop 0
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}
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{ .mmi
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mov cr.eoi=r0 // ack the interrupt
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;;
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srlz.d
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nop 0
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;;
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}
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{ .mfb
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cmp4.eq p14,p0=0,r8 // Return to kernel mode?
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nop 0
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br.sptk 1b // loop for more
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;;
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}
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2:
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{ .mbb
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add out0=16,sp
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(p14) br.sptk exception_restore
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br.call.sptk rp=do_ast
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nop 0
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br.call.sptk rp=interrupt
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;;
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}
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{ .mfb
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@ -127,34 +127,44 @@ static int adjust_ticks = 0;
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SYSCTL_INT(_debug_clock, OID_AUTO, adjust_ticks, CTLFLAG_RD,
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&adjust_ticks, 0, "Total number of ITC interrupts with adjustment");
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int
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interrupt(u_int vector, struct trapframe *tf)
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void
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interrupt(struct trapframe *tf)
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{
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struct thread *td;
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volatile struct ia64_interrupt_block *ib = IA64_INTERRUPT_BLOCK;
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uint64_t adj, clk, itc;
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int64_t delta;
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u_int vector;
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int count;
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uint8_t inta;
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ia64_set_fpsr(IA64_FPSR_DEFAULT);
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td = curthread;
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atomic_add_int(&td->td_intr_nesting_level, 1);
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vector = tf->tf_special.ifa;
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next:
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/*
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* Handle ExtINT interrupts by generating an INTA cycle to
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* read the vector.
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*/
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if (vector == 0) {
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vector = ib->ib_inta;
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printf("ExtINT interrupt: vector=%u\n", vector);
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if (vector == 15)
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inta = ib->ib_inta;
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printf("ExtINT interrupt: vector=%u\n", (int)inta);
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if (inta == 15) {
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__asm __volatile("mov cr.eoi = r0;; srlz.d");
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goto stray;
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}
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}
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vector = (int)inta;
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} else if (vector == 15)
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goto stray;
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if (vector == CLOCK_VECTOR) {/* clock interrupt */
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/* CTR0(KTR_INTR, "clock interrupt"); */
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itc = ia64_get_itc();
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PCPU_INC(cnt.v_intr);
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#ifdef EVCNT_COUNTERS
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clock_intr_evcnt.ev_count++;
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@ -166,8 +176,6 @@ interrupt(u_int vector, struct trapframe *tf)
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critical_enter();
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adj = PCPU_GET(clockadj);
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itc = ia64_get_itc();
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ia64_set_itm(itc + ia64_clock_reload - adj);
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clk = PCPU_GET(clock);
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delta = itc - clk;
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count = 0;
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@ -186,6 +194,7 @@ interrupt(u_int vector, struct trapframe *tf)
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adjust_ticks++;
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count++;
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}
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ia64_set_itm(itc + ia64_clock_reload - adj);
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if (count > 0) {
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adjust_lost += count - 1;
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if (delta > (ia64_clock_reload >> 3)) {
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@ -200,8 +209,8 @@ interrupt(u_int vector, struct trapframe *tf)
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}
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PCPU_SET(clock, clk);
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PCPU_SET(clockadj, adj);
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critical_exit();
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ia64_srlz_d();
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#ifdef SMP
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} else if (vector == ipi_vector[IPI_AST]) {
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@ -221,17 +230,14 @@ interrupt(u_int vector, struct trapframe *tf)
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CTR1(KTR_SMP, "IPI_RENDEZVOUS, cpuid=%d", PCPU_GET(cpuid));
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smp_rendezvous_action();
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} else if (vector == ipi_vector[IPI_STOP]) {
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register_t intr;
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cpumask_t mybit = PCPU_GET(cpumask);
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intr = intr_disable();
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savectx(PCPU_PTR(pcb));
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atomic_set_int(&stopped_cpus, mybit);
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while ((started_cpus & mybit) == 0)
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/* spin */;
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cpu_spinwait();
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atomic_clear_int(&started_cpus, mybit);
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atomic_clear_int(&stopped_cpus, mybit);
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intr_restore(intr);
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} else if (vector == ipi_vector[IPI_TEST]) {
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CTR1(KTR_SMP, "IPI_TEST, cpuid=%d", PCPU_GET(cpuid));
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mp_ipi_test++;
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@ -241,9 +247,20 @@ interrupt(u_int vector, struct trapframe *tf)
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ia64_dispatch_intr(tf, vector);
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}
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__asm __volatile("mov cr.eoi = r0;; srlz.d");
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vector = ia64_get_ivr();
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if (vector != 15)
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goto next;
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stray:
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atomic_subtract_int(&td->td_intr_nesting_level, 1);
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return (TRAPF_USERMODE(tf));
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if (TRAPF_USERMODE(tf)) {
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enable_intr();
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userret(td, tf);
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mtx_assert(&Giant, MA_NOTOWNED);
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do_ast(tf);
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}
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}
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/*
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@ -271,22 +288,21 @@ ia64_intr_eoi(void *arg)
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sapic_eoi(i->sapic, vector);
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}
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#ifdef INTR_FILTER
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static void
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ia64_intr_disable(void *arg)
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ia64_intr_mask(void *arg)
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{
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u_int vector = (uintptr_t)arg;
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struct ia64_intr *i;
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i = ia64_intrs[vector];
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if (i != NULL) {
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sapic_eoi(i->sapic, vector);
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sapic_mask(i->sapic, i->irq);
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sapic_eoi(i->sapic, vector);
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}
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}
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static void
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ia64_intr_enable(void *arg)
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ia64_intr_unmask(void *arg)
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{
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u_int vector = (uintptr_t)arg;
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struct ia64_intr *i;
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@ -295,7 +311,6 @@ ia64_intr_enable(void *arg)
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if (i != NULL)
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sapic_unmask(i->sapic, i->irq);
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}
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#endif
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int
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ia64_setup_intr(const char *name, int irq, driver_filter_t filter,
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@ -324,14 +339,12 @@ ia64_setup_intr(const char *name, int irq, driver_filter_t filter,
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if (i == NULL)
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return (ENOMEM);
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error = intr_event_create(&i->event, (void *)(uintptr_t)vector,
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0, ia64_intr_unmask,
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#ifdef INTR_FILTER
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error = intr_event_create(&i->event, (void *)(uintptr_t)vector,
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0, ia64_intr_enable, ia64_intr_eoi, ia64_intr_disable,
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"irq%u:", irq);
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#else
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error = intr_event_create(&i->event, (void *)(uintptr_t)vector,
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0, ia64_intr_eoi, "irq%u:", irq);
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ia64_intr_eoi, ia64_intr_mask,
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#endif
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"irq%u:", irq);
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if (error) {
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free(i, M_DEVBUF);
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return (error);
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@ -393,7 +406,7 @@ ia64_dispatch_intr(void *frame, u_int vector)
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#ifdef INTR_FILTER
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if (intr_event_handle(ie, frame) != 0) {
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ia64_intr_disable((void *)(uintptr_t)vector);
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ia64_intr_mask((void *)(uintptr_t)vector);
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log(LOG_ERR, "stray irq%u\n", i->irq);
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}
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#else
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@ -431,6 +444,7 @@ ia64_dispatch_intr(void *frame, u_int vector)
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critical_exit();
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if (thread) {
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ia64_intr_mask((void *)(uintptr_t)vector);
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error = intr_event_schedule_thread(ie);
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KASSERT(error == 0, ("%s: impossible stray", __func__));
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} else
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@ -84,7 +84,7 @@ int ia64_highfp_drop(struct thread *);
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int ia64_highfp_save(struct thread *);
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void ia64_init(void);
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void ia64_probe_sapics(void);
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int interrupt(u_int, struct trapframe *);
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void interrupt(struct trapframe *);
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void map_gateway_page(void);
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void map_pal_code(void);
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void map_vhpt(uintptr_t);
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