Add new functions to know which irqs are pending, and to mask and unmask
interrupts, as these are CPU specific. If the interrupt handler is not marked as INTR_FAST, don't unmask the interrupt until it as been serviced.
This commit is contained in:
Olivier Houchard
parent
1e82631893
commit
7c320e5bfb
@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
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#include <sys/systm.h>
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#include <sys/syslog.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/bus.h>
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#include <sys/interrupt.h>
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#include <sys/conf.h>
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@ -49,56 +50,36 @@ __FBSDID("$FreeBSD$");
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#include <machine/intr.h>
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#include <machine/cpu.h>
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int current_spl_level = _SPL_SERIAL;
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u_int spl_masks[_SPL_LEVELS + 1];
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u_int spl_smasks[_SPL_LEVELS];
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extern u_int irqmasks[];
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#define NIRQ 0x20 /* XXX */
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struct ithd *ithreads[NIRQ];
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void
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set_splmasks()
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{
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int loop;
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struct arm_intr {
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driver_intr_t *handler;
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void *arg;
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void *cookiep;
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int irq;
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};
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for (loop = 0; loop < _SPL_LEVELS; ++loop) {
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spl_masks[loop] = 0xffffffff;
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spl_smasks[loop] = 1;
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}
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static void
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arm_intr_handler(void *arg)
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{
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struct arm_intr *intr = (struct arm_intr *)arg;
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spl_masks[_SPL_NET] = irqmasks[IPL_NET];
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spl_masks[_SPL_SOFTSERIAL] = irqmasks[IPL_TTY];
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spl_masks[_SPL_TTY] = irqmasks[IPL_TTY];
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spl_masks[_SPL_VM] = irqmasks[IPL_VM];
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spl_masks[_SPL_AUDIO] = irqmasks[IPL_AUDIO];
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spl_masks[_SPL_CLOCK] = irqmasks[IPL_CLOCK];
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#ifdef IPL_STATCLOCK
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spl_masks[_SPL_STATCLOCK] = irqmasks[IPL_STATCLOCK];
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#else
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spl_masks[_SPL_STATCLOCK] = irqmasks[IPL_CLOCK];
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#endif
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spl_masks[_SPL_HIGH] = irqmasks[IPL_HIGH];
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spl_masks[_SPL_SERIAL] = irqmasks[IPL_SERIAL];
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spl_masks[_SPL_LEVELS] = 0;
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spl_smasks[_SPL_0] = 0xffffffff;
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for (loop = 0; loop < _SPL_SOFTSERIAL; ++loop)
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spl_smasks[loop] |= SOFTIRQ_BIT(SOFTIRQ_SERIAL);
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for (loop = 0; loop < _SPL_SOFTNET; ++loop)
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spl_smasks[loop] |= SOFTIRQ_BIT(SOFTIRQ_NET);
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for (loop = 0; loop < _SPL_SOFTCLOCK; ++loop)
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spl_smasks[loop] |= SOFTIRQ_BIT(SOFTIRQ_CLOCK);
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intr->handler(intr->arg);
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arm_unmask_irqs(1 << intr->irq);
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}
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void arm_handler_execute(void *, int);
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void arm_setup_irqhandler(const char *name, void (*hand)(void*), void *arg,
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int irq, int flags, void **cookiep)
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{
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struct ithd *cur_ith;
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struct arm_intr *intr = NULL;
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int error;
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if (irq < 0 || irq >= NIRQ)
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return;
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if (!(flags & INTR_FAST))
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intr = malloc(sizeof(*intr), M_DEVBUF, M_WAITOK);
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cur_ith = ithreads[irq];
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if (cur_ith == NULL) {
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error = ithread_create(&cur_ith, irq, 0, NULL, NULL, "intr%d:",
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@ -107,8 +88,16 @@ void arm_setup_irqhandler(const char *name, void (*hand)(void*), void *arg,
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return;
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ithreads[irq] = cur_ith;
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}
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ithread_add_handler(cur_ith, name, hand, arg, ithread_priority(flags),
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flags, cookiep);
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if (!(flags & INTR_FAST)) {
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intr->handler = hand;
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intr->arg = arg;
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intr->irq = irq;
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intr->cookiep = *cookiep;
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ithread_add_handler(cur_ith, name, arm_intr_handler, intr,
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ithread_priority(flags), flags, cookiep);
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} else
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ithread_add_handler(cur_ith, name, hand, arg,
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ithread_priority(flags), flags, cookiep);
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}
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void dosoftints(void);
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@ -118,33 +107,37 @@ dosoftints(void)
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}
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void
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arm_handler_execute(void *);
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void
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arm_handler_execute(void *irq)
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arm_handler_execute(void *frame, int irqnb)
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{
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struct ithd *ithd;
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int i;
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int irqnb = (int)irq;
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int i, oldirqstate;
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struct intrhand *ih;
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struct thread *td = curthread;
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for (i = 0; i < NIRQ; i++) {
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if (1 << i & irqnb) {
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ithd = ithreads[i];
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if (!ithd) /* FUCK */
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return;
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ih = TAILQ_FIRST(&ithd->it_handlers);
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if (ih && ih->ih_flags & IH_FAST) {
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TAILQ_FOREACH(ih, &ithd->it_handlers,
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ih_next) {
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ih->ih_handler(ih->ih_argument);
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/*
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* XXX: what about the irq frame if
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* the arg is NULL ?
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*/
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}
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} else if (ih) {
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ithread_schedule(ithd);
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td->td_intr_nesting_level++;
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if (irqnb == 0)
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irqnb = arm_get_irqnb(frame);
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arm_mask_irqs(irqnb);
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while (irqnb != 0) {
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i = ffs(irqnb) - 1;
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irqnb &= ~(1U << i);
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ithd = ithreads[i];
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if (!ithd)
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continue;
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ih = TAILQ_FIRST(&ithd->it_handlers);
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if (ih && ih->ih_flags & IH_FAST) {
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TAILQ_FOREACH(ih, &ithd->it_handlers,
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ih_next) {
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ih->ih_handler(ih->ih_argument ?
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ih->ih_argument : frame);
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}
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arm_unmask_irqs(1 << i);
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} else if (ih) {
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oldirqstate = enable_interrupts(I32_bit);
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ithread_schedule(ithd);
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restore_interrupts(oldirqstate);
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}
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}
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irqnb |= arm_get_irqnb(frame);
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}
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td->td_intr_nesting_level--;
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}
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@ -73,17 +73,7 @@
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#include <machine/asmacros.h>
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#include <machine/armreg.h>
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__FBSDID("$FreeBSD$");
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#if 0
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#ifdef ARM_INTR_IMPL
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#include ARM_INTR_IMPL
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#else
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#error ARM_INTR_IMPL not defined
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#endif
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#ifndef ARM_IRQ_HANDLER
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#error ARM_IRQ_HANDLER not defined
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#endif
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#endif
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/*
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* irq_entry:
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* Main entry point for the IRQ vector. This is a generic version
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@ -91,54 +81,26 @@ __FBSDID("$FreeBSD$");
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*/
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.text
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.align 0
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.Lcurrent_intr_depth:
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.word _C_LABEL(current_intr_depth)
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AST_ALIGNMENT_FAULT_LOCALS
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AST_LOCALS
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ASENTRY_NP(irq_entry)
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sub lr, lr, #0x00000004 /* Adjust the lr */
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PUSHFRAMEINSVC /* Push an interrupt frame */
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ENABLE_ALIGNMENT_FAULTS
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ldr r1, .Laflt_curpcb
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/*
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* Increment the interrupt nesting depth and call the interrupt
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* dispatch routine. We've pushed a frame, so we can safely use
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* callee-saved regs here. We use the following registers, which
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* we expect to presist:
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*
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* r5 address of `current_intr_depth' variable
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* r6 old value of `current_intr_depth'
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*/
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ldr r5, .Lcurrent_intr_depth
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mov r0, sp /* arg for dispatcher */
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ldr r6, [r5]
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add r1, r6, #1
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str r1, [r5]
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#if 0
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bl ARM_IRQ_HANDLER
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#endif
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mov r1, #0
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bl _C_LABEL(arm_handler_execute)
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/*
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* Restore the old interrupt depth value (which should be the
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* same as decrementing it at this point).
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*/
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str r6, [r5]
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DO_AST_AND_RESTORE_ALIGNMENT_FAULTS
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DO_AST
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PULLFRAMEFROMSVCANDEXIT
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movs pc, lr /* Exit */
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.bss
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.align 0
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.global _C_LABEL(current_intr_depth)
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_C_LABEL(current_intr_depth):
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.word 0
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/*
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* XXX Provide intrnames/intrcnt for legacy code, but
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@ -153,3 +115,8 @@ _C_LABEL(eintrnames):
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.global _C_LABEL(intrcnt), _C_LABEL(sintrcnt), _C_LABEL(eintrcnt)
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_C_LABEL(intrcnt):
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_C_LABEL(eintrcnt):
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.global _C_LABEL(current_intr_depth)
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_C_LABEL(current_intr_depth):
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.word 0
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@ -39,44 +39,13 @@
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#ifndef _MACHINE_INTR_H_
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#define _MACHINE_INTR_H_
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/* Define the various Interrupt Priority Levels */
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/* Hardware Interrupt Priority Levels are not mutually exclusive. */
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#ifdef CPU_SA1110
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#define IPL_SOFTCLOCK 0
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#define IPL_SOFTNET 1
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#define IPL_BIO 2 /* block I/O */
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#define IPL_NET 3 /* network */
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#define IPL_SOFTSERIAL 4
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#define IPL_TTY 5 /* terminal */
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#define IPL_VM 6 /* memory allocation */
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#define IPL_AUDIO 7 /* audio */
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#define IPL_CLOCK 8 /* clock */
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#define IPL_HIGH 9 /* */
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#define IPL_SERIAL 10 /* serial */
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#define IPL_NONE 11
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#define NIPL 12
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#endif
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#define IST_UNUSABLE -1 /* interrupt cannot be used */
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#define IST_NONE 0 /* none (dummy) */
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#define IST_PULSE 1 /* pulsed */
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#define IST_EDGE 2 /* edge-triggered */
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#define IST_LEVEL 3 /* level-triggered */
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/* Software interrupt priority levels */
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#define SOFTIRQ_CLOCK 0
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#define SOFTIRQ_NET 1
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#define SOFTIRQ_SERIAL 2
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#define SOFTIRQ_BIT(x) (1 << x)
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#define NIRQ 32
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#include <machine/psl.h>
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int arm_get_irqnb(void *);
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void arm_mask_irqs(int);
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void arm_unmask_irqs(int);
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void set_splmasks(void);
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void arm_setup_irqhandler(const char *, void (*)(void*), void *, int, int,
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void **);
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