diff --git a/sys/dev/dc/if_dc.c b/sys/dev/dc/if_dc.c
index 01ebb9e613cf..e16e2f935240 100644
--- a/sys/dev/dc/if_dc.c
+++ b/sys/dev/dc/if_dc.c
@@ -1482,6 +1482,9 @@ dc_setcfg(sc, media)
 		}
 	}
 
+	if (DC_IS_ADMTEK(sc))
+		DC_SETBIT(sc, DC_AL_CR, DC_AL_CR_ATUR);
+
 	if ((media & IFM_GMASK) == IFM_FDX) {
 		DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
 		if (sc->dc_pmode == DC_PMODE_SYM && DC_IS_PNIC(sc))
diff --git a/sys/dev/dc/if_dcreg.h b/sys/dev/dc/if_dcreg.h
index 5c0879a09de3..3be7658ed859 100644
--- a/sys/dev/dc/if_dcreg.h
+++ b/sys/dev/dc/if_dcreg.h
@@ -526,6 +526,7 @@ struct dc_mii_frame {
  * ADMtek specific registers and constants for the AL981 and AN985.
  * The AN985 doesn't use the magic PHY registers.
  */
+#define DC_AL_CR		0x88	/* command register */
 #define DC_AL_PAR0		0xA4	/* station address */
 #define DC_AL_PAR1		0xA8	/* station address */
 #define DC_AL_MAR0		0xAC	/* multicast hash filter */
@@ -538,6 +539,7 @@ struct dc_mii_frame {
 #define DC_AL_LPAR		0xC8	/* bnilt in PHY link part. ability */
 #define DC_AL_ANER		0xCC	/* built in PHY autoneg expansion */
 
+#define DC_AL_CR_ATUR		0x00000001 /* automatic TX underrun recovery */
 #define DC_ADMTEK_PHYADDR	0x1
 #define DC_AL_EE_NODEADDR	4
 /* End of ADMtek specific registers */
diff --git a/sys/pci/if_dc.c b/sys/pci/if_dc.c
index 01ebb9e613cf..e16e2f935240 100644
--- a/sys/pci/if_dc.c
+++ b/sys/pci/if_dc.c
@@ -1482,6 +1482,9 @@ dc_setcfg(sc, media)
 		}
 	}
 
+	if (DC_IS_ADMTEK(sc))
+		DC_SETBIT(sc, DC_AL_CR, DC_AL_CR_ATUR);
+
 	if ((media & IFM_GMASK) == IFM_FDX) {
 		DC_SETBIT(sc, DC_NETCFG, DC_NETCFG_FULLDUPLEX);
 		if (sc->dc_pmode == DC_PMODE_SYM && DC_IS_PNIC(sc))
diff --git a/sys/pci/if_dcreg.h b/sys/pci/if_dcreg.h
index 5c0879a09de3..3be7658ed859 100644
--- a/sys/pci/if_dcreg.h
+++ b/sys/pci/if_dcreg.h
@@ -526,6 +526,7 @@ struct dc_mii_frame {
  * ADMtek specific registers and constants for the AL981 and AN985.
  * The AN985 doesn't use the magic PHY registers.
  */
+#define DC_AL_CR		0x88	/* command register */
 #define DC_AL_PAR0		0xA4	/* station address */
 #define DC_AL_PAR1		0xA8	/* station address */
 #define DC_AL_MAR0		0xAC	/* multicast hash filter */
@@ -538,6 +539,7 @@ struct dc_mii_frame {
 #define DC_AL_LPAR		0xC8	/* bnilt in PHY link part. ability */
 #define DC_AL_ANER		0xCC	/* built in PHY autoneg expansion */
 
+#define DC_AL_CR_ATUR		0x00000001 /* automatic TX underrun recovery */
 #define DC_ADMTEK_PHYADDR	0x1
 #define DC_AL_EE_NODEADDR	4
 /* End of ADMtek specific registers */