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Fix some more overly long lines, whitespace and other bugs according to

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style(9) as well as spelling in comments.
This commit is contained in:
Marius Strobl 2017-02-04 19:35:38 +00:00
parent 5fca242374
commit 7e6ccea3b1
6 changed files with 319 additions and 315 deletions
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26
sys/dev/mmc/mmc.c
View File

@ -118,7 +118,8 @@ struct mmc_ivars {
static SYSCTL_NODE(_hw, OID_AUTO, mmc, CTLFLAG_RD, NULL, "mmc driver");
static int mmc_debug;
SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0, "Debug level");
SYSCTL_INT(_hw_mmc, OID_AUTO, debug, CTLFLAG_RWTUN, &mmc_debug, 0,
"Debug level");
/* bus entry points */
static int mmc_acquire_bus(device_t busdev, device_t dev);
@ -140,11 +141,11 @@ static int mmc_write_ivar(device_t bus, device_t child, int which,
#define MMC_LOCK(_sc) mtx_lock(&(_sc)->sc_mtx)
#define MMC_UNLOCK(_sc) mtx_unlock(&(_sc)->sc_mtx)
#define MMC_LOCK_INIT(_sc) \
mtx_init(&_sc->sc_mtx, device_get_nameunit(_sc->dev), \
mtx_init(&(_sc)->sc_mtx, device_get_nameunit((_sc)->dev), \
"mmc", MTX_DEF)
#define MMC_LOCK_DESTROY(_sc) mtx_destroy(&_sc->sc_mtx);
#define MMC_ASSERT_LOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_OWNED);
#define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&_sc->sc_mtx, MA_NOTOWNED);
#define MMC_LOCK_DESTROY(_sc) mtx_destroy(&(_sc)->sc_mtx);
#define MMC_ASSERT_LOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_OWNED);
#define MMC_ASSERT_UNLOCKED(_sc) mtx_assert(&(_sc)->sc_mtx, MA_NOTOWNED);
static int mmc_all_send_cid(struct mmc_softc *sc, uint32_t *rawcid);
static void mmc_app_decode_scr(uint32_t *raw_scr, struct mmc_scr *scr);
@ -744,9 +745,9 @@ mmc_set_card_bus_width(struct mmc_softc *sc, uint16_t rca, int width)
static int
mmc_set_timing(struct mmc_softc *sc, int timing)
{
u_char switch_res[64];
int err;
uint8_t value;
u_char switch_res[64];
switch (timing) {
case bus_timing_normal:
@ -1161,9 +1162,9 @@ mmc_app_send_scr(struct mmc_softc *sc, uint16_t rca, uint32_t *rawscr)
static int
mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd)
{
int err;
struct mmc_command cmd;
struct mmc_data data;
int err;
memset(&cmd, 0, sizeof(cmd));
memset(&data, 0, sizeof(data));
@ -1185,9 +1186,9 @@ mmc_send_ext_csd(struct mmc_softc *sc, uint8_t *rawextcsd)
static int
mmc_app_sd_status(struct mmc_softc *sc, uint16_t rca, uint32_t *rawsdstatus)
{
int err, i;
struct mmc_command cmd;
struct mmc_data data;
int err, i;
memset(&cmd, 0, sizeof(cmd));
memset(&data, 0, sizeof(data));
@ -1393,7 +1394,7 @@ mmc_discover_cards(struct mmc_softc *sc)
* commands, although the state tables / diagrams in the
* standard suggest they go back to the transfer state.
* Other cards don't become deselected, and if we
* atttempt to blindly re-select them, we get timeout
* attempt to blindly re-select them, we get timeout
* errors from some controllers. So we deselect then
* reselect to handle all situations. The only thing we
* use from the sd_status is the erase sector size, but
@ -1534,7 +1535,7 @@ mmc_discover_cards(struct mmc_softc *sc)
static void
mmc_rescan_cards(struct mmc_softc *sc)
{
struct mmc_ivars *ivar = NULL;
struct mmc_ivars *ivar;
device_t *devlist;
int err, i, devcount;
@ -1664,14 +1665,13 @@ mmc_go_discovery(struct mmc_softc *sc)
static int
mmc_calculate_clock(struct mmc_softc *sc)
{
int max_dtr, max_hs_dtr, max_timing;
int nkid, i, f_max;
device_t *kids;
struct mmc_ivars *ivar;
int i, f_max, max_dtr, max_hs_dtr, max_timing, nkid;
f_max = mmcbr_get_f_max(sc->dev);
max_dtr = max_hs_dtr = f_max;
if ((mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED))
if (mmcbr_get_caps(sc->dev) & MMC_CAP_HSPEED)
max_timing = bus_timing_hs;
else
max_timing = bus_timing_normal;

4
sys/dev/mmc/mmcreg.h
View File

@ -419,8 +419,8 @@ struct mmc_scr
{
unsigned char sda_vsn;
unsigned char bus_widths;
#define SD_SCR_BUS_WIDTH_1 (1<<0)
#define SD_SCR_BUS_WIDTH_4 (1<<2)
#define SD_SCR_BUS_WIDTH_1 (1 << 0)
#define SD_SCR_BUS_WIDTH_4 (1 << 2)
};
struct mmc_sd_status

22
sys/dev/sdhci/sdhci.c
View File

@ -55,7 +55,8 @@ __FBSDID("$FreeBSD$");
SYSCTL_NODE(_hw, OID_AUTO, sdhci, CTLFLAG_RD, 0, "sdhci driver");
static int sdhci_debug;
SYSCTL_INT(_hw_sdhci, OID_AUTO, debug, CTLFLAG_RWTUN, &sdhci_debug, 0, "Debug level");
SYSCTL_INT(_hw_sdhci, OID_AUTO, debug, CTLFLAG_RWTUN, &sdhci_debug, 0,
"Debug level");
#define RD1(slot, off) SDHCI_READ_1((slot)->bus, (slot), (off))
#define RD2(slot, off) SDHCI_READ_2((slot)->bus, (slot), (off))
@ -107,10 +108,10 @@ static void sdhci_card_task(void *, int);
#define BCM577XX_CTRL_CLKSEL_DEFAULT 0x0
#define BCM577XX_CTRL_CLKSEL_64MHZ 0x3
static void
sdhci_getaddr(void *arg, bus_dma_segment_t *segs, int nsegs, int error)
{
if (error != 0) {
printf("getaddr: error %d\n", error);
return;
@ -136,6 +137,7 @@ slot_printf(struct sdhci_slot *slot, const char * fmt, ...)
static void
sdhci_dumpregs(struct sdhci_slot *slot)
{
slot_printf(slot,
"============== REGISTER DUMP ==============\n");
@ -498,9 +500,10 @@ sdhci_transfer_pio(struct sdhci_slot *slot)
}
static void
sdhci_card_task(void *arg, int pending)
sdhci_card_task(void *arg, int pending __unused)
{
struct sdhci_slot *slot = arg;
device_t d;
SDHCI_LOCK(slot);
if (SDHCI_GET_CARD_PRESENT(slot->bus, slot)) {
@ -519,7 +522,7 @@ sdhci_card_task(void *arg, int pending)
/* If no card present - detach mmc bus. */
if (bootverbose || sdhci_debug)
slot_printf(slot, "Card removed\n");
device_t d = slot->dev;
d = slot->dev;
slot->dev = NULL;
SDHCI_UNLOCK(slot);
device_delete_child(slot->bus, d);
@ -739,6 +742,7 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num)
void
sdhci_start_slot(struct sdhci_slot *slot)
{
sdhci_card_task(slot, 0);
}
@ -774,6 +778,7 @@ sdhci_cleanup_slot(struct sdhci_slot *slot)
int
sdhci_generic_suspend(struct sdhci_slot *slot)
{
sdhci_reset(slot, SDHCI_RESET_ALL);
return (0);
@ -782,6 +787,7 @@ sdhci_generic_suspend(struct sdhci_slot *slot)
int
sdhci_generic_resume(struct sdhci_slot *slot)
{
sdhci_init(slot);
return (0);
@ -790,6 +796,7 @@ sdhci_generic_resume(struct sdhci_slot *slot)
uint32_t
sdhci_generic_min_freq(device_t brdev, struct sdhci_slot *slot)
{
if (slot->version >= SDHCI_SPEC_300)
return (slot->max_clk / SDHCI_300_MAX_DIVIDER);
else
@ -869,7 +876,7 @@ sdhci_timeout(void *arg)
if (slot->curcmd != NULL) {
slot_printf(slot, " Controller timeout\n");
sdhci_dumpregs(slot);
sdhci_reset(slot, SDHCI_RESET_CMD|SDHCI_RESET_DATA);
sdhci_reset(slot, SDHCI_RESET_CMD | SDHCI_RESET_DATA);
slot->curcmd->error = MMC_ERR_TIMEOUT;
sdhci_req_done(slot);
} else {
@ -1122,6 +1129,7 @@ void
sdhci_finish_data(struct sdhci_slot *slot)
{
struct mmc_data *data = slot->curcmd->data;
size_t left;
/* Interrupt aggregation: Restore command interrupt.
* Auxiliary restore point for the case when data interrupt
@ -1133,7 +1141,7 @@ sdhci_finish_data(struct sdhci_slot *slot)
/* Unload rest of data from DMA buffer. */
if (!slot->data_done && (slot->flags & SDHCI_USE_DMA)) {
if (data->flags & MMC_DATA_READ) {
size_t left = data->len - slot->offset;
left = data->len - slot->offset;
bus_dmamap_sync(slot->dmatag, slot->dmamap,
BUS_DMASYNC_POSTREAD);
memcpy((u_char*)data->data + slot->offset, slot->dmamem,
@ -1433,7 +1441,7 @@ sdhci_generic_intr(struct sdhci_slot *slot)
/* Handle data interrupts. */
if (intmask & SDHCI_INT_DATA_MASK) {
WR4(slot, SDHCI_INT_STATUS, intmask & SDHCI_INT_DATA_MASK);
/* Dont call data_irq in case of errored command */
/* Don't call data_irq in case of errored command. */
if ((intmask & SDHCI_INT_CMD_ERROR_MASK) == 0)
sdhci_data_irq(slot, intmask & SDHCI_INT_DATA_MASK);
}

42
sys/dev/sdhci/sdhci.h
View File

@ -32,47 +32,47 @@
#define DMA_BOUNDARY 0 /* DMA reload every 4K */
/* Controller doesn't honor resets unless we touch the clock register */
#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1<<0)
#define SDHCI_QUIRK_CLOCK_BEFORE_RESET (1 << 0)
/* Controller really supports DMA */
#define SDHCI_QUIRK_FORCE_DMA (1<<1)
#define SDHCI_QUIRK_FORCE_DMA (1 << 1)
/* Controller has unusable DMA engine */
#define SDHCI_QUIRK_BROKEN_DMA (1<<2)
#define SDHCI_QUIRK_BROKEN_DMA (1 << 2)
/* Controller doesn't like to be reset when there is no card inserted. */
#define SDHCI_QUIRK_NO_CARD_NO_RESET (1<<3)
#define SDHCI_QUIRK_NO_CARD_NO_RESET (1 << 3)
/* Controller has flaky internal state so reset it on each ios change */
#define SDHCI_QUIRK_RESET_ON_IOS (1<<4)
#define SDHCI_QUIRK_RESET_ON_IOS (1 << 4)
/* Controller can only DMA chunk sizes that are a multiple of 32 bits */
#define SDHCI_QUIRK_32BIT_DMA_SIZE (1<<5)
#define SDHCI_QUIRK_32BIT_DMA_SIZE (1 << 5)
/* Controller needs to be reset after each request to stay stable */
#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1<<6)
#define SDHCI_QUIRK_RESET_AFTER_REQUEST (1 << 6)
/* Controller has an off-by-one issue with timeout value */
#define SDHCI_QUIRK_INCR_TIMEOUT_CONTROL (1<<7)
#define SDHCI_QUIRK_INCR_TIMEOUT_CONTROL (1 << 7)
/* Controller has broken read timings */
#define SDHCI_QUIRK_BROKEN_TIMINGS (1<<8)
#define SDHCI_QUIRK_BROKEN_TIMINGS (1 << 8)
/* Controller needs lowered frequency */
#define SDHCI_QUIRK_LOWER_FREQUENCY (1<<9)
#define SDHCI_QUIRK_LOWER_FREQUENCY (1 << 9)
/* Data timeout is invalid, should use SD clock */
#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1<<10)
#define SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK (1 << 10)
/* Timeout value is invalid, should be overriden */
#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1<<11)
#define SDHCI_QUIRK_BROKEN_TIMEOUT_VAL (1 << 11)
/* SDHCI_CAPABILITIES is invalid */
#define SDHCI_QUIRK_MISSING_CAPS (1<<12)
#define SDHCI_QUIRK_MISSING_CAPS (1 << 12)
/* Hardware shifts the 136-bit response, don't do it in software. */
#define SDHCI_QUIRK_DONT_SHIFT_RESPONSE (1<<13)
#define SDHCI_QUIRK_DONT_SHIFT_RESPONSE (1 << 13)
/* Wait to see reset bit asserted before waiting for de-asserted */
#define SDHCI_QUIRK_WAITFOR_RESET_ASSERTED (1<<14)
#define SDHCI_QUIRK_WAITFOR_RESET_ASSERTED (1 << 14)
/* Leave controller in standard mode when putting card in HS mode. */
#define SDHCI_QUIRK_DONT_SET_HISPD_BIT (1<<15)
#define SDHCI_QUIRK_DONT_SET_HISPD_BIT (1 << 15)
/* Alternate clock source is required when supplying a 400 KHz clock. */
#define SDHCI_QUIRK_BCM577XX_400KHZ_CLKSRC (1<<16)
#define SDHCI_QUIRK_BCM577XX_400KHZ_CLKSRC (1 << 16)
/* Card insert/remove interrupts don't work, polling required. */
#define SDHCI_QUIRK_POLL_CARD_PRESENT (1<<17)
#define SDHCI_QUIRK_POLL_CARD_PRESENT (1 << 17)
/* All controller slots are non-removable. */
#define SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE (1<<18)
#define SDHCI_QUIRK_ALL_SLOTS_NON_REMOVABLE (1 << 18)
/* Issue custom Intel controller reset sequence after power-up. */
#define SDHCI_QUIRK_INTEL_POWER_UP_RESET (1<<19)
#define SDHCI_QUIRK_INTEL_POWER_UP_RESET (1 << 19)
/* Data timeout is invalid, use 1 MHz clock instead. */
#define SDHCI_QUIRK_DATA_TIMEOUT_1MHZ (1<<20)
#define SDHCI_QUIRK_DATA_TIMEOUT_1MHZ (1 << 20)
/*
* Controller registers

34
sys/dev/sdhci/sdhci_fdt.c
View File

@ -79,6 +79,7 @@ static uint8_t
sdhci_fdt_read_1(device_t dev, struct sdhci_slot *slot, bus_size_t off)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
return (bus_read_1(sc->mem_res[slot->num], off));
}
@ -87,6 +88,7 @@ sdhci_fdt_write_1(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint8_t val)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
bus_write_1(sc->mem_res[slot->num], off, val);
}
@ -94,6 +96,7 @@ static uint16_t
sdhci_fdt_read_2(device_t dev, struct sdhci_slot *slot, bus_size_t off)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
return (bus_read_2(sc->mem_res[slot->num], off));
}
@ -102,6 +105,7 @@ sdhci_fdt_write_2(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint16_t val)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
bus_write_2(sc->mem_res[slot->num], off, val);
}
@ -109,6 +113,7 @@ static uint32_t
sdhci_fdt_read_4(device_t dev, struct sdhci_slot *slot, bus_size_t off)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
return (bus_read_4(sc->mem_res[slot->num], off));
}
@ -117,6 +122,7 @@ sdhci_fdt_write_4(device_t dev, struct sdhci_slot *slot, bus_size_t off,
uint32_t val)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
bus_write_4(sc->mem_res[slot->num], off, val);
}
@ -125,6 +131,7 @@ sdhci_fdt_read_multi_4(device_t dev, struct sdhci_slot *slot,
bus_size_t off, uint32_t *data, bus_size_t count)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
bus_read_multi_4(sc->mem_res[slot->num], off, data, count);
}
@ -133,6 +140,7 @@ sdhci_fdt_write_multi_4(device_t dev, struct sdhci_slot *slot,
bus_size_t off, uint32_t *data, bus_size_t count)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
bus_write_multi_4(sc->mem_res[slot->num], off, data, count);
}
@ -142,10 +150,8 @@ sdhci_fdt_intr(void *arg)
struct sdhci_fdt_softc *sc = (struct sdhci_fdt_softc *)arg;
int i;
for (i = 0; i < sc->num_slots; i++) {
struct sdhci_slot *slot = &sc->slots[i];
sdhci_generic_intr(slot);
}
for (i = 0; i < sc->num_slots; i++)
sdhci_generic_intr(&sc->slots[i]);
}
static int
@ -187,6 +193,7 @@ static int
sdhci_fdt_attach(device_t dev)
{
struct sdhci_fdt_softc *sc = device_get_softc(dev);
struct sdhci_slot *slot;
int err, slots, rid, i;
sc->dev = dev;
@ -204,15 +211,15 @@ sdhci_fdt_attach(device_t dev)
slots = sc->num_slots; /* number of slots determined in probe(). */
sc->num_slots = 0;
for (i = 0; i < slots; i++) {
struct sdhci_slot *slot = &sc->slots[sc->num_slots];
slot = &sc->slots[sc->num_slots];
/* Allocate memory. */
rid = 0;
sc->mem_res[i] = bus_alloc_resource_any(dev, SYS_RES_MEMORY,
&rid, RF_ACTIVE);
if (sc->mem_res[i] == NULL) {
device_printf(dev, "Can't allocate memory for "
"slot %d\n", i);
device_printf(dev,
"Can't allocate memory for slot %d\n", i);
continue;
}
@ -236,10 +243,8 @@ sdhci_fdt_attach(device_t dev)
}
/* Process cards detection. */
for (i = 0; i < sc->num_slots; i++) {
struct sdhci_slot *slot = &sc->slots[i];
sdhci_start_slot(slot);
}
for (i = 0; i < sc->num_slots; i++)
sdhci_start_slot(&sc->slots[i]);
return (0);
}
@ -256,12 +261,9 @@ sdhci_fdt_detach(device_t dev)
sc->irq_res);
for (i = 0; i < sc->num_slots; i++) {
struct sdhci_slot *slot = &sc->slots[i];
sdhci_cleanup_slot(slot);
sdhci_cleanup_slot(&sc->slots[i]);
bus_release_resource(dev, SYS_RES_MEMORY,
rman_get_rid(sc->mem_res[i]),
sc->mem_res[i]);
rman_get_rid(sc->mem_res[i]), sc->mem_res[i]);
}
return (0);

20
sys/dev/sdhci/sdhci_pci.c
View File

@ -300,6 +300,7 @@ static int
sdhci_pci_attach(device_t dev)
{
struct sdhci_pci_softc *sc = device_get_softc(dev);
struct sdhci_slot *slot;
uint32_t model;
uint16_t subvendor;
int bar, err, rid, slots, i;
@ -342,7 +343,7 @@ sdhci_pci_attach(device_t dev)
}
/* Scan all slots. */
for (i = 0; i < slots; i++) {
struct sdhci_slot *slot = &sc->slots[sc->num_slots];
slot = &sc->slots[sc->num_slots];
/* Allocate memory. */
rid = PCIR_BAR(bar + i);
@ -369,11 +370,8 @@ sdhci_pci_attach(device_t dev)
device_printf(dev, "Can't setup IRQ\n");
pci_enable_busmaster(dev);
/* Process cards detection. */
for (i = 0; i < sc->num_slots; i++) {
struct sdhci_slot *slot = &sc->slots[i];
sdhci_start_slot(slot);
}
for (i = 0; i < sc->num_slots; i++)
sdhci_start_slot(&sc->slots[i]);
return (0);
}
@ -390,9 +388,7 @@ sdhci_pci_detach(device_t dev)
pci_release_msi(dev);
for (i = 0; i < sc->num_slots; i++) {
struct sdhci_slot *slot = &sc->slots[i];
sdhci_cleanup_slot(slot);
sdhci_cleanup_slot(&sc->slots[i]);
bus_release_resource(dev, SYS_RES_MEMORY,
rman_get_rid(sc->mem_res[i]), sc->mem_res[i]);
}
@ -447,10 +443,8 @@ sdhci_pci_intr(void *arg)
struct sdhci_pci_softc *sc = (struct sdhci_pci_softc *)arg;
int i;
for (i = 0; i < sc->num_slots; i++) {
struct sdhci_slot *slot = &sc->slots[i];
sdhci_generic_intr(slot);
}
for (i = 0; i < sc->num_slots; i++)
sdhci_generic_intr(&sc->slots[i]);
}
static device_method_t sdhci_methods[] = {