Fix inverted test for lock status while waiting for PLL to become stable.
Reviewed by: andrew Approved by: adrian (mentor)
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@ -129,8 +129,8 @@ a31_clk_pll6_enable(void)
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/* Wait for PLL to be stable */
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for (i = 0; i < PLL6_TIMEOUT; i++)
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if (!(ccm_read_4(sc, A31_CCM_PLL6_CFG) &
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A31_CCM_PLL6_CFG_REG_LOCK))
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if ((ccm_read_4(sc, A31_CCM_PLL6_CFG) &
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A31_CCM_PLL6_CFG_REG_LOCK) == A31_CCM_PLL6_CFG_REG_LOCK)
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break;
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if (i == PLL6_TIMEOUT)
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return (ENXIO);
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