riscv: Include syscon_power device driver in GENERIC kernel config

QEMU's RISC-V virt machine provides syscon-power and syscon-reset
devices as the means by which to shutdown and reboot. We also need to
ensure that we have attached the syscon_generic device before attaching
any syscon_power devices, and so we introduce a new riscv_syscon device
akin to aw_syscon added in r327936. Currently the SiFive test finisher
is used as the specific implementation of such a syscon device.

Reviewed by:	br, brooks (mentor), jhb (mentor)
Approved by:	br, brooks (mentor), jhb (mentor)
Obtained from:	CheriBSD
Differential Revision:	https://reviews.freebsd.org/D25725
This commit is contained in:
Jessica Clarke 2020-07-26 18:21:02 +00:00
parent 28da7c9ed0
commit 825240034e
3 changed files with 92 additions and 0 deletions

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@ -57,6 +57,7 @@ riscv/riscv/ofw_machdep.c optional fdt
riscv/riscv/plic.c standard
riscv/riscv/pmap.c standard
riscv/riscv/riscv_console.c optional rcons
riscv/riscv/riscv_syscon.c optional ext_resources syscon riscv_syscon fdt
riscv/riscv/sbi.c standard
riscv/riscv/soc.c standard
riscv/riscv/stack_machdep.c optional ddb | stack

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@ -77,6 +77,13 @@ options INTRNG
# RISC-V SBI console
device rcons
# EXT_RESOURCES pseudo devices
options EXT_RESOURCES
device clk
device syscon
device syscon_power
device riscv_syscon
# Bus drivers
device pci

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@ -0,0 +1,84 @@
/*-
* SPDX-License-Identifier: BSD-2-Clause-FreeBSD
*
* Copyright (c) 2018 Kyle Evans <kevans@FreeBSD.org>
* Copyright (c) 2020 Jessica Clarke <jrtc27@FreeBSD.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
/*
* RISC-V syscon driver. Used as a generic interface by QEMU's virt machine for
* describing the SiFive test finisher as a power and reset controller.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
#include <sys/param.h>
#include <sys/bus.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/mutex.h>
#include <sys/rman.h>
#include <machine/bus.h>
#include <dev/ofw/openfirm.h>
#include <dev/ofw/ofw_bus.h>
#include <dev/ofw/ofw_bus_subr.h>
#include <dev/extres/syscon/syscon.h>
#include <dev/extres/syscon/syscon_generic.h>
static struct ofw_compat_data compat_data[] = {
{"sifive,test0", 1},
{"sifive,test1", 1},
{NULL, 0}
};
static int
riscv_syscon_probe(device_t dev)
{
if (!ofw_bus_status_okay(dev))
return (ENXIO);
if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
return (ENXIO);
device_set_desc(dev, "RISC-V syscon");
return (BUS_PROBE_DEFAULT);
}
static device_method_t riscv_syscon_methods[] = {
DEVMETHOD(device_probe, riscv_syscon_probe),
DEVMETHOD_END
};
DEFINE_CLASS_1(riscv_syscon, riscv_syscon_driver, riscv_syscon_methods,
sizeof(struct syscon_generic_softc), syscon_generic_driver);
static devclass_t riscv_syscon_devclass;
/* riscv_syscon needs to attach prior to syscon_power */
EARLY_DRIVER_MODULE(riscv_syscon, simplebus, riscv_syscon_driver,
riscv_syscon_devclass, 0, 0, BUS_PASS_SCHEDULER + BUS_PASS_ORDER_LAST);
MODULE_VERSION(riscv_syscon, 1);