Update and add timekeeping code.
This commit is contained in:
Poul-Henning Kamp
parent
bd66abc2e6
commit
842426555a
224
sys/pci/xrpu.c
224
sys/pci/xrpu.c
@ -6,7 +6,7 @@
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* this stuff is worth it, you can buy me a beer in return. Poul-Henning Kamp
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* ----------------------------------------------------------------------------
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*
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* $Id: xrpu.c,v 1.1 1998/05/30 18:28:11 phk Exp $
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* $Id: xrpu.c,v 1.2 1998/08/18 00:32:48 bde Exp $
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*
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* A very simple device driver for PCI cards based on Xilinx 6200 series
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* FPGA/RPU devices. Current Functionality is to allow you to open and
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@ -17,12 +17,15 @@
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*
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*/
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#ifndef DEVFS
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#include "xrpu.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/kernel.h>
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#include <sys/malloc.h>
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#include <sys/timepps.h>
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#include <sys/devfsext.h>
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#include <sys/xrpuio.h>
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#include <pci/pcireg.h>
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#include <pci/pcivar.h>
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@ -30,40 +33,184 @@ static char* xrpu_probe (pcici_t tag, pcidi_t type);
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static void xrpu_attach (pcici_t tag, int unit);
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static u_long xrpu_count;
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static vm_offset_t virbase, physbase;
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static int
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xrpuopen(dev_t dev, int flag, int mode, struct proc *p)
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{
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return (0);
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}
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static int
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xrpuclose(dev_t dev, int flag, int mode, struct proc *p)
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{
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return (0);
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}
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static int
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xrpummap(dev_t dev, int offset, int nprot)
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{
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if (offset >= 0x1000000)
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return (-1);
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return (i386_btop(physbase + offset));
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}
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static void xrpu_poll_pps(struct timecounter *tc);
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/*
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* Device driver initialization stuff
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*/
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static d_open_t xrpu_open;
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static d_close_t xrpu_close;
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static d_ioctl_t xrpu_ioctl;
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static d_mmap_t xrpu_mmap;
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#define CDEV_MAJOR 100
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static struct cdevsw xrpudevsw = {
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xrpuopen, xrpuclose, noread, nowrite,
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noioctl, nullstop, noreset, nodevtotty,
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seltrue, xrpummap, nostrategy, "xrpu",
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xrpu_open, xrpu_close, noread, nowrite,
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xrpu_ioctl, nullstop, noreset, nodevtotty,
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seltrue, xrpu_mmap, nostrategy, "xrpu",
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NULL, -1
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};
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static MALLOC_DEFINE(M_XRPU, "xrpu", "XRPU related");
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#define dev2unit(devt) (minor(devt) & 0xff)
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#define dev2pps(devt) ((minor(devt) >> 16)-1)
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static struct softc {
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pcici_t tag;
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enum { NORMAL, TIMECOUNTER } mode;
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vm_offset_t virbase, physbase;
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u_int *virbase62;
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struct timecounter tc;
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u_int *trigger, *latch, dummy;
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struct {
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pps_params_t params;
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pps_info_t info;
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int cap;
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u_int *assert, last_assert;
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u_int *clear, last_clear;
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} pps[XRPU_MAX_PPS];
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} *softc[NXRPU];
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static unsigned
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xrpu_get_timecount(struct timecounter *tc)
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{
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struct softc *sc = tc->tc_priv;
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sc->dummy += *sc->trigger;
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return (*sc->latch & tc->tc_counter_mask);
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}
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void
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xrpu_poll_pps(struct timecounter *tc)
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{
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struct softc *sc = tc->tc_priv;
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int i;
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unsigned count1, ppscount;
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for (i = 0; i < XRPU_MAX_PPS; i++) {
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if (sc->pps[i].assert) {
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ppscount = *(sc->pps[i].assert) & tc->tc_counter_mask;
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do {
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count1 = ppscount;
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ppscount = *(sc->pps[i].assert) & tc->tc_counter_mask;
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} while (ppscount != count1);
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if (ppscount != sc->pps[i].last_assert) {
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timecounter_timespec(ppscount, &sc->pps[i].info.assert_timestamp);
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if (sc->pps[i].params.mode & PPS_OFFSETASSERT) {
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timespecadd(&sc->pps[i].info.assert_timestamp,
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&sc->pps[i].params.assert_offset);
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if (sc->pps[i].info.assert_timestamp.tv_nsec < 0) {
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sc->pps[i].info.assert_timestamp.tv_nsec += 1000000000;
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sc->pps[i].info.assert_timestamp.tv_sec -= 1;
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}
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}
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sc->pps[i].info.assert_sequence++;
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sc->pps[i].last_assert = ppscount;
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}
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}
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if (sc->pps[i].clear) {
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ppscount = *(sc->pps[i].clear) & tc->tc_counter_mask;
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do {
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count1 = ppscount;
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ppscount = *(sc->pps[i].clear) & tc->tc_counter_mask;
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} while (ppscount != count1);
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if (ppscount != sc->pps[i].last_clear) {
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timecounter_timespec(ppscount, &sc->pps[i].info.clear_timestamp);
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if (sc->pps[i].params.mode & PPS_OFFSETASSERT) {
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timespecadd(&sc->pps[i].info.clear_timestamp,
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&sc->pps[i].params.clear_offset);
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if (sc->pps[i].info.clear_timestamp.tv_nsec < 0) {
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sc->pps[i].info.clear_timestamp.tv_nsec += 1000000000;
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sc->pps[i].info.clear_timestamp.tv_sec -= 1;
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}
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}
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sc->pps[i].info.clear_sequence++;
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sc->pps[i].last_clear = ppscount;
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}
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}
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}
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}
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static int
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xrpu_open(dev_t dev, int flag, int mode, struct proc *p)
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{
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return (0);
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}
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static int
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xrpu_close(dev_t dev, int flag, int mode, struct proc *p)
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{
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return (0);
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}
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static int
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xrpu_mmap(dev_t dev, int offset, int nprot)
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{
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struct softc *sc = softc[dev2unit(dev)];
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if (offset >= 0x1000000)
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return (-1);
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return (i386_btop(sc->physbase + offset));
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}
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static int
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xrpu_ioctl(dev_t dev, u_long cmd, caddr_t arg, int flag, struct proc *pr)
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{
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struct softc *sc = softc[dev2unit(dev)];
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int i, error;
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if (sc->mode == TIMECOUNTER) {
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i = dev2pps(dev);
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if (i < 0 || i >= XRPU_MAX_PPS)
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return ENODEV;
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if (!sc->pps[i].cap)
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return ENODEV;
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error = std_pps_ioctl(cmd, arg, &sc->pps[i].params,
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&sc->pps[i].info, sc->pps[i].cap);
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return (error);
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}
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if (cmd == XRPU_IOC_TIMECOUNTING) {
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struct xrpu_timecounting *xt = (struct xrpu_timecounting *)arg;
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/* Name SHALL be zero terminated */
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xt->xt_name[sizeof xt->xt_name - 1] = '\0';
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i = strlen(xt->xt_name);
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sc->tc.tc_name = (char *)malloc(i + 1, M_XRPU, M_WAITOK);
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strcpy(sc->tc.tc_name, xt->xt_name);
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sc->tc.tc_frequency = xt->xt_frequency;
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sc->tc.tc_get_timecount = xrpu_get_timecount;
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sc->tc.tc_poll_pps = xrpu_poll_pps;
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sc->tc.tc_priv = sc;
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sc->tc.tc_counter_mask = xt->xt_mask;
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sc->trigger = sc->virbase62 + xt->xt_addr_trigger;
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sc->latch = sc->virbase62 + xt->xt_addr_latch;
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for (i = 0; i < XRPU_MAX_PPS; i++) {
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if (xt->xt_pps[i].xt_addr_assert == 0
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&& xt->xt_pps[i].xt_addr_clear == 0)
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continue;
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devfs_add_devswf(&xrpudevsw, (i+1)<<16, DV_CHR, UID_ROOT, GID_WHEEL, 0600,
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"xpps%d", i);
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/* DEVFS */
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if (xt->xt_pps[i].xt_addr_assert) {
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sc->pps[i].assert = sc->virbase62 + xt->xt_pps[i].xt_addr_assert;
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sc->pps[i].cap |= PPS_CAPTUREASSERT | PPS_OFFSETASSERT;
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}
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if (xt->xt_pps[i].xt_addr_clear) {
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sc->pps[i].clear = sc->virbase62 + xt->xt_pps[i].xt_addr_clear;
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sc->pps[i].cap |= PPS_CAPTURECLEAR | PPS_OFFSETCLEAR;
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}
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}
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sc->mode = TIMECOUNTER;
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init_timecounter(&sc->tc);
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return (0);
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}
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error = ENOTTY;
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return (error);
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}
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/*
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* PCI initialization stuff
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*/
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@ -96,16 +243,27 @@ xrpu_probe (pcici_t tag, pcidi_t typea)
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static void
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xrpu_attach (pcici_t tag, int unit)
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{
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dev_t cdev = makedev(CDEV_MAJOR, 0);
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struct softc *sc;
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dev_t cdev = makedev(CDEV_MAJOR, unit);
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pci_map_mem(tag, PCI_MAP_REG_START, &virbase, &physbase);
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sc = (struct softc *)malloc(sizeof *sc, M_XRPU, M_WAITOK);
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softc[unit] = sc;
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bzero(sc, sizeof *sc);
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printf("Mapped physbase %#lx to virbase %#lx\n",
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(u_long)physbase, (u_long)virbase);
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sc->tag = tag;
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sc->mode = NORMAL;
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cdevsw_add(&cdev, &xrpudevsw, NULL);
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pci_map_mem(tag, PCI_MAP_REG_START, &sc->virbase, &sc->physbase);
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sc->virbase62 = (u_int *)(sc->virbase + 0x800000);
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if (bootverbose)
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printf("Mapped physbase %#lx to virbase %#lx\n",
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(u_long)sc->physbase, (u_long)sc->virbase);
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if (!unit)
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cdevsw_add(&cdev, &xrpudevsw, NULL);
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devfs_add_devswf(&xrpudevsw, 0, DV_CHR, UID_ROOT, GID_WHEEL, 0600,
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"xrpu0");
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"xrpu%d", unit);
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}
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#endif /* DEVFS */
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