Prevent overflow issues in timeout processing
Previously, any timeout value for which (timeout * hz) will overflow the signed integer, will give weird results, since callout(9) routines will convert negative values of ticks to '1'. For unsigned integer overflow we will get sufficiently smaller timeout values than expected. Switch from callout_reset, which requires conversion to int based ticks to callout_reset_sbt to avoid this. Also correct isci to correctly resolve ccb timeout. This was based on the original work done by Eygene Ryabinkin <rea@freebsd.org> back in 5 Aug 2011 which used a macro to help avoid the overlow. Differential Revision: https://reviews.freebsd.org/D1157 Reviewed by: mav, davide MFC after: 1 month Sponsored by: Multiplay
This commit is contained in:
parent
7db6c5cde6
commit
85c9dd9d89
@ -2893,9 +2893,9 @@ xpt_action_default(union ccb *start_ccb)
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start_ccb->ccb_h.flags |= CAM_DEV_QFREEZE;
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}
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callout_reset(&dev->callout,
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(crs->release_timeout * hz) / 1000,
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xpt_release_devq_timeout, dev);
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callout_reset_sbt(&dev->callout,
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SBT_1MS * crs->release_timeout, 0,
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xpt_release_devq_timeout, dev, 0);
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dev->flags |= CAM_DEV_REL_TIMEOUT_PENDING;
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@ -4944,8 +4944,8 @@ xpt_config(void *arg)
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periphdriver_init(1);
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xpt_hold_boot();
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callout_init(&xsoftc.boot_callout, 1);
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callout_reset(&xsoftc.boot_callout, hz * xsoftc.boot_delay / 1000,
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xpt_boot_delay, NULL);
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callout_reset_sbt(&xsoftc.boot_callout, SBT_1MS * xsoftc.boot_delay, 0,
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xpt_boot_delay, NULL, 0);
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/* Fire up rescan thread. */
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if (kproc_kthread_add(xpt_scanner_thread, NULL, &cam_proc, NULL, 0, 0,
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"cam", "scanner")) {
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@ -168,9 +168,9 @@ adv_clear_state_really(struct adv_softc *adv, union ccb* ccb)
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ccb_h = LIST_FIRST(&adv->pending_ccbs);
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while (ccb_h != NULL) {
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cinfo = ccb_h->ccb_cinfo_ptr;
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callout_reset(&cinfo->timer,
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ccb_h->timeout * hz / 1000, adv_timeout,
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ccb_h);
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callout_reset_sbt(&cinfo->timer,
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SBT_1MS * ccb_h->timeout, 0,
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adv_timeout, ccb_h, 0);
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ccb_h = LIST_NEXT(ccb_h, sim_links.le);
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}
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adv->state &= ~ADV_IN_TIMEOUT;
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@ -569,8 +569,8 @@ adv_execute_ccb(void *arg, bus_dma_segment_t *dm_segs,
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ccb_h->status |= CAM_SIM_QUEUED;
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LIST_INSERT_HEAD(&adv->pending_ccbs, ccb_h, sim_links.le);
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/* Schedule our timeout */
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callout_reset(&cinfo->timer, ccb_h->timeout * hz /1000, adv_timeout,
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csio);
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callout_reset_sbt(&cinfo->timer, SBT_1MS * ccb_h->timeout, 0,
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adv_timeout, csio, 0);
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}
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static struct adv_ccb_info *
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@ -322,8 +322,8 @@ adwexecuteacb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
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acb->state |= ACB_ACTIVE;
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ccb->ccb_h.status |= CAM_SIM_QUEUED;
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LIST_INSERT_HEAD(&adw->pending_ccbs, &ccb->ccb_h, sim_links.le);
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callout_reset(&acb->timer, (ccb->ccb_h.timeout * hz) / 1000,
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adwtimeout, acb);
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callout_reset_sbt(&acb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
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adwtimeout, acb, 0);
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adw_send_acb(adw, acb, acbvtob(adw, acb));
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}
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@ -1047,8 +1047,8 @@ ahaexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
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ccb->ccb_h.status |= CAM_SIM_QUEUED;
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LIST_INSERT_HEAD(&aha->pending_ccbs, &ccb->ccb_h, sim_links.le);
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callout_reset(&accb->timer, (ccb->ccb_h.timeout * hz) / 1000,
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ahatimeout, accb);
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callout_reset_sbt(&accb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
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ahatimeout, accb, 0);
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/* Tell the adapter about this command */
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if (aha->cur_outbox->action_code != AMBO_FREE) {
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@ -1181,9 +1181,9 @@ ahadone(struct aha_softc *aha, struct aha_ccb *accb, aha_mbi_comp_code_t comp_co
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ccb_h = LIST_NEXT(ccb_h, sim_links.le);
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ahadone(aha, pending_accb, AMBI_ERROR);
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} else {
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callout_reset(&pending_accb->timer,
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(ccb_h->timeout * hz) / 1000,
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ahatimeout, pending_accb);
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callout_reset_sbt(&pending_accb->timer,
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SBT_1MS * ccb_h->timeout, 0, ahatimeout,
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pending_accb, 0);
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ccb_h = LIST_NEXT(ccb_h, sim_links.le);
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}
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}
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@ -616,9 +616,9 @@ ahbhandleimmed(struct ahb_softc *ahb, u_int32_t mbox, u_int intstat)
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xpt_done(ccb);
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} else if (ahb->immed_ecb != NULL) {
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/* Re-instate timeout */
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callout_reset(&pending_ecb->timer,
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(ccb->ccb_h.timeout * hz) / 1000,
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ahbtimeout, pending_ecb);
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callout_reset_sbt(&pending_ecb->timer,
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SBT_1MS * ccb->ccb_h.timeout, 0, ahbtimeout,
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pending_ecb, 0);
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}
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}
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@ -985,8 +985,8 @@ ahbexecuteecb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
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/* Tell the adapter about this command */
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ahbqueuembox(ahb, ecb_paddr, ATTN_STARTECB|ccb->ccb_h.target_id);
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callout_reset(&ecb->timer, (ccb->ccb_h.timeout * hz) / 1000, ahbtimeout,
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ecb);
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callout_reset_sbt(&ecb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
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ahbtimeout, ecb, 0);
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}
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static void
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@ -1582,8 +1582,8 @@ ahci_execute_transaction(struct ahci_slot *slot)
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return;
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}
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/* Start command execution timeout */
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callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 2000,
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(timeout_t*)ahci_timeout, slot);
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callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout / 2,
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0, (timeout_t*)ahci_timeout, slot, 0);
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return;
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}
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@ -1618,9 +1618,9 @@ ahci_rearm_timeout(struct ahci_channel *ch)
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continue;
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if ((ch->toslots & (1 << i)) == 0)
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continue;
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callout_reset(&slot->timeout,
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(int)slot->ccb->ccb_h.timeout * hz / 2000,
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(timeout_t*)ahci_timeout, slot);
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callout_reset_sbt(&slot->timeout,
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SBT_1MS * slot->ccb->ccb_h.timeout / 2, 0,
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(timeout_t*)ahci_timeout, slot, 0);
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}
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}
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@ -1652,9 +1652,9 @@ ahci_timeout(struct ahci_slot *slot)
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slot->state = AHCI_SLOT_EXECUTING;
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}
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callout_reset(&slot->timeout,
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(int)slot->ccb->ccb_h.timeout * hz / 2000,
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(timeout_t*)ahci_timeout, slot);
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callout_reset_sbt(&slot->timeout,
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SBT_1MS * slot->ccb->ccb_h.timeout / 2, 0,
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(timeout_t*)ahci_timeout, slot, 0);
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return;
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}
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@ -319,8 +319,8 @@ aic_execute_scb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
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ccb->ccb_h.status |= CAM_SIM_QUEUED;
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TAILQ_INSERT_TAIL(&aic->pending_ccbs, &ccb->ccb_h, sim_links.tqe);
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callout_reset(&scb->timer, (ccb->ccb_h.timeout * hz) / 1000,
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aic_timeout, scb);
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callout_reset_sbt(&scb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
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aic_timeout, scb, 0);
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aic_start(aic);
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}
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@ -1075,9 +1075,9 @@ aic_done(struct aic_softc *aic, struct aic_scb *scb)
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&pending_scb->ccb->ccb_h, sim_links.tqe);
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aic_done(aic, pending_scb);
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} else {
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callout_reset(&pending_scb->timer,
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(ccb_h->timeout * hz) / 1000, aic_timeout,
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pending_scb);
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callout_reset_sbt(&pending_scb->timer,
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SBT_1MS * ccb_h->timeout, 0, aic_timeout,
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pending_scb, 0);
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ccb_h = TAILQ_NEXT(ccb_h, sim_links.tqe);
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}
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}
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@ -1094,9 +1094,9 @@ aic_done(struct aic_softc *aic, struct aic_scb *scb)
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&nexus_scb->ccb->ccb_h, sim_links.tqe);
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aic_done(aic, nexus_scb);
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} else {
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callout_reset(&nexus_scb->timer,
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(ccb_h->timeout * hz) / 1000, aic_timeout,
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nexus_scb);
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callout_reset_sbt(&nexus_scb->timer,
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SBT_1MS * ccb_h->timeout, 0, aic_timeout,
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nexus_scb, 0);
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ccb_h = TAILQ_NEXT(ccb_h, sim_links.tqe);
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}
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}
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@ -2705,7 +2705,9 @@ static void arcmsr_execute_srb(void *arg, bus_dma_segment_t *dm_segs, int nseg,
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if (pccb->ccb_h.timeout != CAM_TIME_INFINITY)
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{
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arcmsr_callout_init(&srb->ccb_callout);
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callout_reset(&srb->ccb_callout, ((pccb->ccb_h.timeout + (ARCMSR_TIMEOUT_DELAY * 1000)) * hz) / 1000, arcmsr_srb_timeout, srb);
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callout_reset_sbt(&srb->ccb_callout, SBT_1MS *
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(pccb->ccb_h.timeout + (ARCMSR_TIMEOUT_DELAY * 1000)), 0,
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arcmsr_srb_timeout, srb, 0);
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srb->srb_flags |= SRB_FLAG_TIMER_START;
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}
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}
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@ -386,8 +386,12 @@ static STAILQ_HEAD(, Asr_softc) Asr_softc_list =
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STAILQ_HEAD_INITIALIZER(Asr_softc_list);
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static __inline void
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set_ccb_timeout_ch(union asr_ccb *ccb, struct callout_handle ch)
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set_ccb_timeout_ch(union asr_ccb *ccb)
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{
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struct callout_handle ch;
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ch = timeout(asr_timeout, (caddr_t)ccb,
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(int)((u_int64_t)(ccb->ccb_h.timeout) * (u_int32_t)hz / 1000));
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ccb->ccb_h.sim_priv.entries[0].ptr = ch.callout;
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}
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@ -812,8 +816,7 @@ ASR_ccbAdd(Asr_softc_t *sc, union asr_ccb *ccb)
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*/
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ccb->ccb_h.timeout = 6 * 60 * 1000;
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}
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set_ccb_timeout_ch(ccb, timeout(asr_timeout, (caddr_t)ccb,
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(ccb->ccb_h.timeout * hz) / 1000));
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set_ccb_timeout_ch(ccb);
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}
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splx(s);
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} /* ASR_ccbAdd */
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@ -1337,9 +1340,7 @@ asr_timeout(void *arg)
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cam_sim_unit(xpt_path_sim(ccb->ccb_h.path)), s);
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if (ASR_reset (sc) == ENXIO) {
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/* Try again later */
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set_ccb_timeout_ch(ccb, timeout(asr_timeout,
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(caddr_t)ccb,
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(ccb->ccb_h.timeout * hz) / 1000));
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set_ccb_timeout_ch(ccb);
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}
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return;
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}
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@ -1353,9 +1354,7 @@ asr_timeout(void *arg)
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if ((ccb->ccb_h.status & CAM_STATUS_MASK) == CAM_CMD_TIMEOUT) {
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debug_asr_printf (" AGAIN\nreinitializing adapter\n");
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if (ASR_reset (sc) == ENXIO) {
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set_ccb_timeout_ch(ccb, timeout(asr_timeout,
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(caddr_t)ccb,
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(ccb->ccb_h.timeout * hz) / 1000));
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set_ccb_timeout_ch(ccb);
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}
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splx(s);
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return;
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@ -1364,8 +1363,7 @@ asr_timeout(void *arg)
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/* If the BUS reset does not take, then an adapter reset is next! */
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ccb->ccb_h.status &= ~CAM_STATUS_MASK;
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ccb->ccb_h.status |= CAM_CMD_TIMEOUT;
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set_ccb_timeout_ch(ccb, timeout(asr_timeout, (caddr_t)ccb,
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(ccb->ccb_h.timeout * hz) / 1000));
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set_ccb_timeout_ch(ccb);
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ASR_resetBus (sc, cam_sim_bus(xpt_path_sim(ccb->ccb_h.path)));
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xpt_async (AC_BUS_RESET, ccb->ccb_h.path, NULL);
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splx(s);
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@ -1465,8 +1465,8 @@ btexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
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ccb->ccb_h.status |= CAM_SIM_QUEUED;
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LIST_INSERT_HEAD(&bt->pending_ccbs, &ccb->ccb_h, sim_links.le);
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callout_reset(&bccb->timer, (ccb->ccb_h.timeout * hz) / 1000,
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bttimeout, bccb);
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callout_reset_sbt(&bccb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
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bttimeout, bccb, 0);
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/* Tell the adapter about this command */
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bt->cur_outbox->ccb_addr = btccbvtop(bt, bccb);
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@ -1600,9 +1600,9 @@ btdone(struct bt_softc *bt, struct bt_ccb *bccb, bt_mbi_comp_code_t comp_code)
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ccb_h = LIST_NEXT(ccb_h, sim_links.le);
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btdone(bt, pending_bccb, BMBI_ERROR);
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} else {
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callout_reset(&pending_bccb->timer,
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(ccb_h->timeout * hz) / 1000,
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bttimeout, pending_bccb);
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callout_reset_sbt(&pending_bccb->timer,
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SBT_1MS * ccb_h->timeout, 0, bttimeout,
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pending_bccb, 0);
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ccb_h = LIST_NEXT(ccb_h, sim_links.le);
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}
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}
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@ -2414,7 +2414,8 @@ ciss_wait_request(struct ciss_request *cr, int timeout)
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return(error);
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while ((cr->cr_flags & CISS_REQ_SLEEP) && (error != EWOULDBLOCK)) {
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error = msleep(cr, &cr->cr_sc->ciss_mtx, PRIBIO, "cissREQ", (timeout * hz) / 1000);
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error = msleep_sbt(cr, &cr->cr_sc->ciss_mtx, PRIBIO, "cissREQ",
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SBT_1MS * timeout, 0, 0);
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}
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return(error);
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}
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@ -793,8 +793,8 @@ dptexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
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dccb->state |= DCCB_ACTIVE;
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ccb->ccb_h.status |= CAM_SIM_QUEUED;
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LIST_INSERT_HEAD(&dpt->pending_ccb_list, &ccb->ccb_h, sim_links.le);
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callout_reset(&dccb->timer, (ccb->ccb_h.timeout * hz) / 1000,
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dpttimeout, dccb);
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callout_reset_sbt(&dccb->timer, SBT_1MS * ccb->ccb_h.timeout, 0,
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dpttimeout, dccb, 0);
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if (dpt_send_eata_command(dpt, &dccb->eata_ccb,
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dccb->eata_ccb.cp_busaddr,
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EATA_CMD_DMA_SEND_CP, 0, 0, 0, 0) != 0) {
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@ -1028,8 +1028,8 @@ static __inline void
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sbp_scan_dev(struct sbp_dev *sdev)
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{
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sdev->status = SBP_DEV_PROBE;
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callout_reset(&sdev->target->scan_callout, scan_delay * hz / 1000,
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sbp_cam_scan_target, (void *)sdev->target);
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callout_reset_sbt(&sdev->target->scan_callout, SBT_1MS * scan_delay, 0,
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sbp_cam_scan_target, (void *)sdev->target, 0);
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}
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static void
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@ -1397,7 +1397,7 @@ END_DEBUG
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start:
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target->mgm_ocb_cur = ocb;
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callout_reset(&target->mgm_ocb_timeout, 5*hz,
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callout_reset(&target->mgm_ocb_timeout, 5 * hz,
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sbp_mgm_timeout, (caddr_t)ocb);
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xfer = sbp_write_cmd(sdev, FWTCODE_WREQB, 0);
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if (xfer == NULL) {
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@ -2699,9 +2699,11 @@ END_DEBUG
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prev2 = prev = STAILQ_LAST(&sdev->ocbs, sbp_ocb, ocb);
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STAILQ_INSERT_TAIL(&sdev->ocbs, ocb, ocb);
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if (ocb->ccb != NULL)
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callout_reset(&ocb->timer, (ocb->ccb->ccb_h.timeout * hz) / 1000,
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sbp_timeout, ocb);
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if (ocb->ccb != NULL) {
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callout_reset_sbt(&ocb->timer,
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SBT_1MS * ocb->ccb->ccb_h.timeout, 0, sbp_timeout,
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ocb, 0);
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}
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if (use_doorbell && prev == NULL)
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prev2 = sdev->last_ocb;
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@ -559,8 +559,8 @@ glxiic_start_timeout_locked(struct glxiic_softc *sc)
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GLXIIC_ASSERT_LOCKED(sc);
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callout_reset(&sc->callout, sc->timeout * 1000 / hz, glxiic_timeout,
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sc);
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callout_reset_sbt(&sc->callout, SBT_1MS * sc->timeout, 0,
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glxiic_timeout, sc, 0);
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}
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static void
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@ -240,8 +240,8 @@ void os_request_timer(void * osext, HPT_U32 interval)
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HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS);
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callout_reset(&vbus_ext->timer, interval * hz / 1000000,
|
||||
os_timer_for_ldm, vbus_ext);
|
||||
callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0,
|
||||
os_timer_for_ldm, vbus_ext, 0);
|
||||
}
|
||||
|
||||
HPT_TIME os_query_time(void)
|
||||
|
@ -235,8 +235,8 @@ void os_request_timer(void * osext, HPT_U32 interval)
|
||||
|
||||
HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS);
|
||||
|
||||
callout_reset(&vbus_ext->timer, interval * hz / 1000000,
|
||||
os_timer_for_ldm, vbus_ext);
|
||||
callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0,
|
||||
os_timer_for_ldm, vbus_ext, 0);
|
||||
}
|
||||
|
||||
HPT_TIME os_query_time(void)
|
||||
|
@ -221,8 +221,8 @@ void os_request_timer(void * osext, HPT_U32 interval)
|
||||
|
||||
HPT_ASSERT(vbus_ext->ext_type==EXT_TYPE_VBUS);
|
||||
|
||||
callout_reset(&vbus_ext->timer, interval * hz / 1000000,
|
||||
os_timer_for_ldm, vbus_ext);
|
||||
callout_reset_sbt(&vbus_ext->timer, SBT_1US * interval, 0,
|
||||
os_timer_for_ldm, vbus_ext, 0);
|
||||
}
|
||||
|
||||
HPT_TIME os_query_time(void)
|
||||
|
@ -983,9 +983,8 @@ storvsc_timeout(void *arg)
|
||||
mtx_unlock(&sc->hs_lock);
|
||||
|
||||
reqp->retries++;
|
||||
callout_reset(&reqp->callout,
|
||||
(ccb->ccb_h.timeout * hz) / 1000,
|
||||
storvsc_timeout, reqp);
|
||||
callout_reset_sbt(&reqp->callout, SBT_1MS * ccb->ccb_h.timeout,
|
||||
0, storvsc_timeout, reqp, 0);
|
||||
#if HVS_TIMEOUT_TEST
|
||||
storvsc_timeout_test(reqp, SEND_DIAGNOSTIC, 0);
|
||||
#endif
|
||||
@ -1158,9 +1157,9 @@ storvsc_action(struct cam_sim *sim, union ccb *ccb)
|
||||
|
||||
if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
|
||||
callout_init(&reqp->callout, CALLOUT_MPSAFE);
|
||||
callout_reset(&reqp->callout,
|
||||
(ccb->ccb_h.timeout * hz) / 1000,
|
||||
storvsc_timeout, reqp);
|
||||
callout_reset_sbt(&reqp->callout,
|
||||
SBT_1MS * ccb->ccb_h.timeout, 0,
|
||||
storvsc_timeout, reqp, 0);
|
||||
#if HVS_TIMEOUT_TEST
|
||||
cv_init(&reqp->event.cv, "storvsc timeout cv");
|
||||
mtx_init(&reqp->event.mtx, "storvsc timeout mutex",
|
||||
|
@ -267,7 +267,7 @@ iir_init(struct gdt_softc *gdt)
|
||||
&gccb->gc_dmamap) != 0)
|
||||
return(1);
|
||||
gccb->gc_map_flag = TRUE;
|
||||
gccb->gc_scratch = &gdt->sc_gcscratch[GDT_SCRATCH_SZ * i];
|
||||
gccb->gc_scratch = &gdt->sc_gcscratch[GDT_SCRATCH_SZ * i];
|
||||
gccb->gc_scratch_busbase = gdt->sc_gcscratch_busbase + GDT_SCRATCH_SZ * i;
|
||||
callout_init_mtx(&gccb->gc_timeout, &gdt->sc_lock, 0);
|
||||
SLIST_INSERT_HEAD(&gdt->sc_free_gccb, gccb, sle);
|
||||
@ -1234,8 +1234,8 @@ gdtexecuteccb(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
|
||||
|
||||
ccb->ccb_h.status |= CAM_SIM_QUEUED;
|
||||
/* timeout handling */
|
||||
callout_reset(&gccb->gc_timeout, (ccb->ccb_h.timeout * hz) / 1000,
|
||||
iir_timeout, gccb);
|
||||
callout_reset_sbt(&gccb->gc_timeout, SBT_1MS * ccb->ccb_h.timeout, 0,
|
||||
iir_timeout, (caddr_t)gccb, 0);
|
||||
|
||||
gdt->sc_copy_cmd(gdt, gccb);
|
||||
}
|
||||
|
@ -731,8 +731,9 @@ isci_io_request_construct(void *arg, bus_dma_segment_t *seg, int nseg,
|
||||
}
|
||||
|
||||
if (ccb->ccb_h.timeout != CAM_TIME_INFINITY)
|
||||
callout_reset(&io_request->parent.timer, ccb->ccb_h.timeout,
|
||||
isci_io_request_timeout, io_request);
|
||||
callout_reset_sbt(&io_request->parent.timer,
|
||||
SBT_1MS * ccb->ccb_h.timeout, 0, isci_io_request_timeout,
|
||||
io_request, 0);
|
||||
}
|
||||
|
||||
void
|
||||
@ -983,7 +984,8 @@ isci_io_request_execute_smp_io(union ccb *ccb,
|
||||
}
|
||||
|
||||
if (ccb->ccb_h.timeout != CAM_TIME_INFINITY)
|
||||
callout_reset(&io_request->parent.timer, ccb->ccb_h.timeout,
|
||||
isci_io_request_timeout, request);
|
||||
callout_reset_sbt(&io_request->parent.timer,
|
||||
SBT_1MS * ccb->ccb_h.timeout, 0, isci_io_request_timeout,
|
||||
request, 0);
|
||||
}
|
||||
#endif
|
||||
|
@ -79,8 +79,8 @@ scif_cb_timer_start(SCI_CONTROLLER_HANDLE_T controller, void *timer,
|
||||
|
||||
isci_timer->is_started = TRUE;
|
||||
isci_log_message(3, "TIMER", "start %p %d\n", timer, milliseconds);
|
||||
callout_reset(&isci_timer->callout, (milliseconds * hz)/1000,
|
||||
isci_timer_timeout, timer);
|
||||
callout_reset_sbt(&isci_timer->callout, SBT_1MS * milliseconds, 0,
|
||||
isci_timer_timeout, timer, 0);
|
||||
}
|
||||
|
||||
/**
|
||||
|
@ -1903,8 +1903,8 @@ mprsas_action_scsiio(struct mprsas_softc *sassc, union ccb *ccb)
|
||||
cm->cm_desc.SCSIIO.DevHandle = htole16(targ->handle);
|
||||
}
|
||||
|
||||
callout_reset(&cm->cm_callout, (ccb->ccb_h.timeout * hz) / 1000,
|
||||
mprsas_scsiio_timeout, cm);
|
||||
callout_reset_sbt(&cm->cm_callout, SBT_1MS * ccb->ccb_h.timeout, 0,
|
||||
mprsas_scsiio_timeout, cm, 0);
|
||||
|
||||
targ->issued++;
|
||||
targ->outstanding++;
|
||||
|
@ -1839,8 +1839,8 @@ mpssas_action_scsiio(struct mpssas_softc *sassc, union ccb *ccb)
|
||||
}
|
||||
}
|
||||
|
||||
callout_reset(&cm->cm_callout, (ccb->ccb_h.timeout * hz) / 1000,
|
||||
mpssas_scsiio_timeout, cm);
|
||||
callout_reset_sbt(&cm->cm_callout, SBT_1MS * ccb->ccb_h.timeout, 0,
|
||||
mpssas_scsiio_timeout, cm, 0);
|
||||
|
||||
targ->issued++;
|
||||
targ->outstanding++;
|
||||
|
@ -1320,17 +1320,19 @@ mpt_wait_req(struct mpt_softc *mpt, request_t *req,
|
||||
mpt_req_state_t state, mpt_req_state_t mask,
|
||||
int sleep_ok, int time_ms)
|
||||
{
|
||||
int error;
|
||||
int timeout;
|
||||
u_int saved_cnt;
|
||||
sbintime_t sbt;
|
||||
|
||||
/*
|
||||
* timeout is in ms. 0 indicates infinite wait.
|
||||
* Convert to ticks or 500us units depending on
|
||||
* time_ms is in ms, 0 indicates infinite wait.
|
||||
* Convert to sbintime_t or 500us units depending on
|
||||
* our sleep mode.
|
||||
*/
|
||||
if (sleep_ok != 0) {
|
||||
timeout = (time_ms * hz) / 1000;
|
||||
sbt = SBT_1MS * time_ms;
|
||||
/* Set timeout as well so final timeout check works. */
|
||||
timeout = time_ms;
|
||||
} else {
|
||||
timeout = time_ms * 2;
|
||||
}
|
||||
@ -1339,8 +1341,8 @@ mpt_wait_req(struct mpt_softc *mpt, request_t *req,
|
||||
saved_cnt = mpt->reset_cnt;
|
||||
while ((req->state & mask) != state && mpt->reset_cnt == saved_cnt) {
|
||||
if (sleep_ok != 0) {
|
||||
error = mpt_sleep(mpt, req, PUSER, "mptreq", timeout);
|
||||
if (error == EWOULDBLOCK) {
|
||||
if (mpt_sleep(mpt, req, PUSER, "mptreq", sbt) ==
|
||||
EWOULDBLOCK) {
|
||||
timeout = 0;
|
||||
break;
|
||||
}
|
||||
|
@ -771,10 +771,10 @@ mpt_assign_serno(struct mpt_softc *mpt, request_t *req)
|
||||
#define MPT_UNLOCK(mpt) mtx_unlock(&(mpt)->mpt_lock)
|
||||
#define MPT_OWNED(mpt) mtx_owned(&(mpt)->mpt_lock)
|
||||
#define MPT_LOCK_ASSERT(mpt) mtx_assert(&(mpt)->mpt_lock, MA_OWNED)
|
||||
#define mpt_sleep(mpt, ident, priority, wmesg, timo) \
|
||||
msleep(ident, &(mpt)->mpt_lock, priority, wmesg, timo)
|
||||
#define mpt_req_timeout(req, ticks, func, arg) \
|
||||
callout_reset(&(req)->callout, (ticks), (func), (arg))
|
||||
#define mpt_sleep(mpt, ident, priority, wmesg, sbt) \
|
||||
msleep_sbt(ident, &(mpt)->mpt_lock, priority, wmesg, sbt, 0, 0)
|
||||
#define mpt_req_timeout(req, sbt, func, arg) \
|
||||
callout_reset_sbt(&(req)->callout, (sbt), 0, (func), (arg), 0)
|
||||
#define mpt_req_untimeout(req, func, arg) \
|
||||
callout_stop(&(req)->callout)
|
||||
#define mpt_callout_init(mpt, c) \
|
||||
|
@ -1630,7 +1630,7 @@ mpt_execute_req_a64(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
|
||||
|
||||
ccb->ccb_h.status |= CAM_SIM_QUEUED;
|
||||
if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
|
||||
mpt_req_timeout(req, (ccb->ccb_h.timeout * hz) / 1000,
|
||||
mpt_req_timeout(req, SBT_1MS * ccb->ccb_h.timeout,
|
||||
mpt_timeout, ccb);
|
||||
}
|
||||
if (mpt->verbose > MPT_PRT_DEBUG) {
|
||||
@ -2016,7 +2016,7 @@ mpt_execute_req(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
|
||||
|
||||
ccb->ccb_h.status |= CAM_SIM_QUEUED;
|
||||
if (ccb->ccb_h.timeout != CAM_TIME_INFINITY) {
|
||||
mpt_req_timeout(req, (ccb->ccb_h.timeout * hz) / 1000,
|
||||
mpt_req_timeout(req, SBT_1MS * ccb->ccb_h.timeout,
|
||||
mpt_timeout, ccb);
|
||||
}
|
||||
if (mpt->verbose > MPT_PRT_DEBUG) {
|
||||
@ -4752,7 +4752,7 @@ mpt_scsi_tgt_status(struct mpt_softc *mpt, union ccb *ccb, request_t *cmd_req,
|
||||
req->serno, tgt->resid);
|
||||
if (ccb) {
|
||||
ccb->ccb_h.status = CAM_SIM_QUEUED | CAM_REQ_INPROG;
|
||||
mpt_req_timeout(req, 60 * hz, mpt_timeout, ccb);
|
||||
mpt_req_timeout(req, SBT_1S * 60, mpt_timeout, ccb);
|
||||
}
|
||||
mpt_send_cmd(mpt, req);
|
||||
}
|
||||
|
@ -378,8 +378,8 @@ mrsas_scsiio_timeout(void *data)
|
||||
* on OCR enable/disable property of Controller from ocr_thread
|
||||
* context.
|
||||
*/
|
||||
callout_reset(&cmd->cm_callout, (600000 * hz) / 1000,
|
||||
mrsas_scsiio_timeout, cmd);
|
||||
callout_reset_sbt(&cmd->cm_callout, SBT_1S * 600, 0,
|
||||
mrsas_scsiio_timeout, cmd, 0);
|
||||
sc->do_timedout_reset = 1;
|
||||
if (sc->ocr_thread_active)
|
||||
wakeup(&sc->ocr_chan);
|
||||
@ -530,8 +530,8 @@ mrsas_startio(struct mrsas_softc *sc, struct cam_sim *sim,
|
||||
/*
|
||||
* Start timer for IO timeout. Default timeout value is 90 second.
|
||||
*/
|
||||
callout_reset(&cmd->cm_callout, (sc->mrsas_io_timeout * hz) / 1000,
|
||||
mrsas_scsiio_timeout, cmd);
|
||||
callout_reset_sbt(&cmd->cm_callout, SBT_1MS * sc->mrsas_io_timeout, 0,
|
||||
mrsas_scsiio_timeout, cmd, 0);
|
||||
mrsas_atomic_inc(&sc->fw_outstanding);
|
||||
|
||||
if (mrsas_atomic_read(&sc->fw_outstanding) > sc->io_cmds_highwater)
|
||||
|
@ -1415,8 +1415,8 @@ mvs_legacy_execute_transaction(struct mvs_slot *slot)
|
||||
}
|
||||
}
|
||||
/* Start command execution timeout */
|
||||
callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000,
|
||||
(timeout_t*)mvs_timeout, slot);
|
||||
callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout, 0,
|
||||
(timeout_t*)mvs_timeout, slot, 0);
|
||||
}
|
||||
|
||||
/* Must be called with channel locked. */
|
||||
@ -1529,8 +1529,8 @@ mvs_execute_transaction(struct mvs_slot *slot)
|
||||
ATA_OUTL(ch->r_mem, EDMA_REQQIP,
|
||||
ch->dma.workrq_bus + MVS_CRQB_OFFSET + (MVS_CRQB_SIZE * ch->out_idx));
|
||||
/* Start command execution timeout */
|
||||
callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000,
|
||||
(timeout_t*)mvs_timeout, slot);
|
||||
callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout, 0,
|
||||
(timeout_t*)mvs_timeout, slot, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -1567,9 +1567,9 @@ mvs_rearm_timeout(device_t dev)
|
||||
continue;
|
||||
if ((ch->toslots & (1 << i)) == 0)
|
||||
continue;
|
||||
callout_reset(&slot->timeout,
|
||||
(int)slot->ccb->ccb_h.timeout * hz / 2000,
|
||||
(timeout_t*)mvs_timeout, slot);
|
||||
callout_reset_sbt(&slot->timeout,
|
||||
SBT_1MS * slot->ccb->ccb_h.timeout / 2, 0,
|
||||
(timeout_t*)mvs_timeout, slot, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -1120,8 +1120,8 @@ siis_execute_transaction(struct siis_slot *slot)
|
||||
ATA_OUTL(ch->r_mem, SIIS_P_CACTL(slot->slot), prb_bus);
|
||||
ATA_OUTL(ch->r_mem, SIIS_P_CACTH(slot->slot), prb_bus >> 32);
|
||||
/* Start command execution timeout */
|
||||
callout_reset(&slot->timeout, (int)ccb->ccb_h.timeout * hz / 1000,
|
||||
(timeout_t*)siis_timeout, slot);
|
||||
callout_reset_sbt(&slot->timeout, SBT_1MS * ccb->ccb_h.timeout, 0,
|
||||
(timeout_t*)siis_timeout, slot, 0);
|
||||
return;
|
||||
}
|
||||
|
||||
@ -1162,9 +1162,9 @@ siis_rearm_timeout(device_t dev)
|
||||
continue;
|
||||
if ((ch->toslots & (1 << i)) == 0)
|
||||
continue;
|
||||
callout_reset(&slot->timeout,
|
||||
(int)slot->ccb->ccb_h.timeout * hz / 1000,
|
||||
(timeout_t*)siis_timeout, slot);
|
||||
callout_reset_sbt(&slot->timeout,
|
||||
SBT_1MS * slot->ccb->ccb_h.timeout, 0,
|
||||
(timeout_t*)siis_timeout, slot, 0);
|
||||
}
|
||||
}
|
||||
|
||||
|
@ -2329,8 +2329,8 @@ static void sym_enqueue_cam_ccb(ccb_p cp)
|
||||
assert(!(ccb->ccb_h.status & CAM_SIM_QUEUED));
|
||||
ccb->ccb_h.status = CAM_REQ_INPROG;
|
||||
|
||||
callout_reset(&cp->ch, ccb->ccb_h.timeout * hz / 1000, sym_callout,
|
||||
(caddr_t) ccb);
|
||||
callout_reset_sbt(&cp->ch, SBT_1MS * ccb->ccb_h.timeout, 0, sym_callout,
|
||||
(caddr_t)ccb, 0);
|
||||
ccb->ccb_h.status |= CAM_SIM_QUEUED;
|
||||
ccb->ccb_h.sym_hcb_ptr = np;
|
||||
|
||||
|
@ -473,10 +473,6 @@ trm_ExecuteSRB(void *arg, bus_dma_segment_t *dm_segs, int nseg, int error)
|
||||
return;
|
||||
}
|
||||
ccb->ccb_h.status |= CAM_SIM_QUEUED;
|
||||
#if 0
|
||||
/* XXX Need a timeout handler */
|
||||
ccb->ccb_h.timeout_ch = timeout(trmtimeout, (caddr_t)srb, (ccb->ccb_h.timeout * hz) / 1000);
|
||||
#endif
|
||||
trm_SendSRB(pACB, pSRB);
|
||||
splx(flags);
|
||||
return;
|
||||
|
@ -747,7 +747,8 @@ tws_execute_scsi(struct tws_softc *sc, union ccb *ccb)
|
||||
* and submit the I/O.
|
||||
*/
|
||||
sc->stats.scsi_ios++;
|
||||
callout_reset(&req->timeout, (ccb_h->timeout * hz) / 1000, tws_timeout, req);
|
||||
callout_reset_sbt(&req->timeout, SBT_1MS * ccb->ccb_h.timeout, 0,
|
||||
tws_timeout, req, 0);
|
||||
error = tws_map_request(sc, req);
|
||||
return(error);
|
||||
}
|
||||
|
@ -1087,8 +1087,8 @@ vtscsi_execute_scsi_cmd(struct vtscsi_softc *sc, struct vtscsi_request *req)
|
||||
|
||||
if (ccbh->timeout != CAM_TIME_INFINITY) {
|
||||
req->vsr_flags |= VTSCSI_REQ_FLAG_TIMEOUT_SET;
|
||||
callout_reset(&req->vsr_callout, ccbh->timeout * hz / 1000,
|
||||
vtscsi_timedout_scsi_cmd, req);
|
||||
callout_reset_sbt(&req->vsr_callout, SBT_1MS * ccbh->timeout,
|
||||
0, vtscsi_timedout_scsi_cmd, req, 0);
|
||||
}
|
||||
|
||||
vtscsi_dprintf_req(req, VTSCSI_TRACE, "enqueued req=%p ccb=%p\n",
|
||||
|
Loading…
Reference in New Issue
Block a user