Restructure the PCI bar initialization code in anticipation of upcoming
bug fixes. Approved by: jimharris Sponsored by: Intel
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64d957247f
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@ -161,10 +161,18 @@ struct ntb_softc {
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#define ntb_write_4(offset, val) ntb_reg_write(4, (offset), (val))
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#define ntb_write_8(offset, val) ntb_reg_write(8, (offset), (val))
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typedef int (*bar_map_strategy)(struct ntb_softc *ntb,
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struct ntb_pci_bar_info *bar);
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static int ntb_probe(device_t device);
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static int ntb_attach(device_t device);
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static int ntb_detach(device_t device);
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static int ntb_map_pci_bar(struct ntb_softc *ntb);
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static int ntb_map_pci_bars(struct ntb_softc *ntb);
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static int map_pci_bar(struct ntb_softc *ntb, bar_map_strategy strategy,
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struct ntb_pci_bar_info *bar);
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static int map_mmr_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar);
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static int map_memory_window_bar(struct ntb_softc *ntb,
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struct ntb_pci_bar_info *bar);
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static void ntb_unmap_pci_bar(struct ntb_softc *ntb);
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static int ntb_setup_interrupts(struct ntb_softc *ntb);
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static void ntb_teardown_interrupts(struct ntb_softc *ntb);
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@ -250,7 +258,7 @@ ntb_attach(device_t device)
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callout_init(&ntb->heartbeat_timer, CALLOUT_MPSAFE);
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callout_init(&ntb->lr_timer, CALLOUT_MPSAFE);
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DETACH_ON_ERROR(ntb_map_pci_bar(ntb));
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DETACH_ON_ERROR(ntb_map_pci_bars(ntb));
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DETACH_ON_ERROR(ntb_initialize_hw(ntb));
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DETACH_ON_ERROR(ntb_setup_interrupts(ntb));
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@ -273,59 +281,84 @@ ntb_detach(device_t device)
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}
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static int
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ntb_map_pci_bar(struct ntb_softc *ntb)
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ntb_map_pci_bars(struct ntb_softc *ntb)
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{
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struct ntb_pci_bar_info *current_bar;
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int rc, i;
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int rc;
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ntb->bar_info[NTB_CONFIG_BAR].pci_resource_id = PCIR_BAR(0);
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ntb->bar_info[NTB_B2B_BAR_1].pci_resource_id = PCIR_BAR(2);
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ntb->bar_info[NTB_B2B_BAR_2].pci_resource_id = PCIR_BAR(4);
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rc = map_pci_bar(ntb, map_mmr_bar, &ntb->bar_info[NTB_CONFIG_BAR]);
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if (rc != 0)
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return rc;
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for (i = 0; i< NTB_MAX_BARS; i++) {
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current_bar = &ntb->bar_info[i];
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current_bar->pci_resource =
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bus_alloc_resource(ntb->device,
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SYS_RES_MEMORY,
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¤t_bar->pci_resource_id, 0, ~0, 1,
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ntb->bar_info[NTB_B2B_BAR_1].pci_resource_id = PCIR_BAR(2);
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rc = map_pci_bar(ntb, map_memory_window_bar,
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&ntb->bar_info[NTB_B2B_BAR_1]);
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if (rc != 0)
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return rc;
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ntb->bar_info[NTB_B2B_BAR_2].pci_resource_id = PCIR_BAR(4);
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rc = map_pci_bar(ntb, map_memory_window_bar,
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&ntb->bar_info[NTB_B2B_BAR_2]);
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if (rc != 0)
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return rc;
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return (0);
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}
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static int
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map_pci_bar(struct ntb_softc *ntb, bar_map_strategy strategy,
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struct ntb_pci_bar_info *bar)
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{
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int rc;
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rc = strategy(ntb, bar);
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if (rc != 0) {
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device_printf(ntb->device,
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"unable to allocate pci resource\n");
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} else {
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device_printf(ntb->device,
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"Bar size = %lx, v %p, p %p\n",
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bar->size, bar->vbase,
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(void *)(bar->pbase));
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}
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return (rc);
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}
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static int
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map_mmr_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar)
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{
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bar->pci_resource = bus_alloc_resource(ntb->device, SYS_RES_MEMORY,
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&bar->pci_resource_id, 0, ~0, 1, RF_ACTIVE);
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if (bar->pci_resource == NULL)
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return (ENXIO);
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else {
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save_bar_parameters(bar);
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return (0);
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}
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}
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static int
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map_memory_window_bar(struct ntb_softc *ntb, struct ntb_pci_bar_info *bar)
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{
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int rc;
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bar->pci_resource = bus_alloc_resource(ntb->device,
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SYS_RES_MEMORY, &bar->pci_resource_id, 0, ~0, 1,
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RF_ACTIVE);
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if (current_bar->pci_resource == NULL) {
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device_printf(ntb->device,
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"unable to allocate pci resource\n");
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return (ENXIO);
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}
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else {
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current_bar->pci_bus_tag =
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rman_get_bustag(current_bar->pci_resource);
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current_bar->pci_bus_handle =
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rman_get_bushandle(current_bar->pci_resource);
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current_bar->pbase =
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rman_get_start(current_bar->pci_resource);
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current_bar->size =
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rman_get_size(current_bar->pci_resource);
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current_bar->vbase =
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rman_get_virtual(current_bar->pci_resource);
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if (is_bar_for_data_transfer(i)) {
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/*
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* Mark bar region as write combining to improve
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* performance.
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*/
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rc = pmap_change_attr(
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(vm_offset_t)current_bar->vbase,
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current_bar->size,
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VM_MEMATTR_WRITE_COMBINING);
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if (rc != 0) {
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device_printf(ntb->device,
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"Couldn't mark bar as"
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" WRITE_COMBINING\n");
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return (rc);
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}
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}
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device_printf(ntb->device,
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"Bar size = %lx, v %p, p %p\n",
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current_bar->size, current_bar->vbase,
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(void *)(current_bar->pbase));
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if (bar->pci_resource == NULL)
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return (ENXIO);
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else {
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save_bar_parameters(bar);
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/* Mark bar region as write combining to improve performance. */
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rc = pmap_change_attr((vm_offset_t)bar->vbase, bar->size,
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VM_MEMATTR_WRITE_COMBINING);
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if (rc != 0) {
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device_printf(ntb->device, "unable to mark bar as"
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" WRITE_COMBINING\n");
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return (rc);
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}
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}
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return (0);
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@ -1282,13 +1315,20 @@ ntb_query_link_status(struct ntb_softc *ntb)
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return (ntb->link_status == NTB_LINK_UP);
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}
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static bool
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is_bar_for_data_transfer(int bar_num)
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static void
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save_bar_parameters(struct ntb_pci_bar_info *bar)
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{
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if ((bar_num > NTB_CONFIG_BAR) && (bar_num < NTB_MAX_BARS))
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return true;
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else
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return false;
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bar->pci_bus_tag =
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rman_get_bustag(bar->pci_resource);
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bar->pci_bus_handle =
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rman_get_bushandle(bar->pci_resource);
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bar->pbase =
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rman_get_start(bar->pci_resource);
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bar->size =
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rman_get_size(bar->pci_resource);
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bar->vbase =
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rman_get_virtual(bar->pci_resource);
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}
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device_t ntb_get_device(struct ntb_softc *ntb)
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