Update to igb driver:
- changes in support of the VLAN filter fix to 126850 - removal of a bunch of legacy code that was cruft, if not possibly harmful. - removal of POLLING from this driver, with multiqueue and MSIX it just makes no sense here. - Fix an LRO bug that I've been working on internally, intermittent panics under stress, the problem was releasing the RX ring lock before the LRO flushing. - Following the above fix I now enable LRO by default - For performance reasons increase the default number of RX queues to 4. - Add AIM - "Adaptive Interrupt Moderation", a fancy way of saying that the EITR value is dynamically changed based on the size of packets in the last interrupt interval. - Much goodness to try, enjoy!!
This commit is contained in:
Jack F Vogel
parent
291e9e2772
commit
882a54f65f
@ -94,7 +94,7 @@ int igb_display_debug_stats = 0;
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/*********************************************************************
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* Driver version:
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*********************************************************************/
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char igb_driver_version[] = "version - 1.3.0";
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char igb_driver_version[] = "version - 1.4.0";
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/*********************************************************************
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@ -190,10 +190,10 @@ static void igb_set_multi(struct adapter *);
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static void igb_print_hw_stats(struct adapter *);
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static void igb_update_link_status(struct adapter *);
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static int igb_get_buf(struct rx_ring *, int);
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#ifdef IGB_HW_VLAN_SUPPORT
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static void igb_register_vlan(void *, struct ifnet *, u16);
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static void igb_unregister_vlan(void *, struct ifnet *, u16);
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#endif
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static int igb_xmit(struct tx_ring *, struct mbuf **);
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static int igb_dma_malloc(struct adapter *, bus_size_t,
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struct igb_dma_alloc *, int);
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@ -203,9 +203,6 @@ static void igb_print_nvm_info(struct adapter *);
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static int igb_is_valid_ether_addr(u8 *);
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static int igb_sysctl_stats(SYSCTL_HANDLER_ARGS);
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static int igb_sysctl_debug_info(SYSCTL_HANDLER_ARGS);
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static int igb_sysctl_int_delay(SYSCTL_HANDLER_ARGS);
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static void igb_add_int_delay_sysctl(struct adapter *, const char *,
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const char *, struct igb_int_delay_info *, int, int);
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/* Management and WOL Support */
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static void igb_init_manageability(struct adapter *);
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static void igb_release_manageability(struct adapter *);
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@ -232,9 +229,8 @@ static void igb_msix_rx(void *);
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static void igb_msix_tx(void *);
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static void igb_msix_link(void *);
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#ifdef DEVICE_POLLING
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static poll_handler_t igb_poll;
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#endif
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/* Adaptive Interrupt Moderation */
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static void igb_update_aim(struct rx_ring *);
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/*********************************************************************
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* FreeBSD Device Interface Entry Points
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@ -264,37 +260,35 @@ MODULE_DEPEND(igb, ether, 1, 1, 1);
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* Tunable default values.
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*********************************************************************/
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#define IGB_TICKS_TO_USECS(ticks) ((1024 * (ticks) + 500) / 1000)
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#define IGB_USECS_TO_TICKS(usecs) ((1000 * (usecs) + 512) / 1024)
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#define M_TSO_LEN 66
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/* Allow common code without TSO */
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#ifndef CSUM_TSO
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#define CSUM_TSO 0
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#endif
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static int igb_tx_int_delay_dflt = IGB_TICKS_TO_USECS(IGB_TIDV);
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static int igb_rx_int_delay_dflt = IGB_TICKS_TO_USECS(IGB_RDTR);
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static int igb_tx_abs_int_delay_dflt = IGB_TICKS_TO_USECS(IGB_TADV);
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static int igb_rx_abs_int_delay_dflt = IGB_TICKS_TO_USECS(IGB_RADV);
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/* Descriptor defaults */
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static int igb_rxd = IGB_DEFAULT_RXD;
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static int igb_txd = IGB_DEFAULT_TXD;
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static int igb_smart_pwr_down = FALSE;
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TUNABLE_INT("hw.igb.tx_int_delay", &igb_tx_int_delay_dflt);
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TUNABLE_INT("hw.igb.rx_int_delay", &igb_rx_int_delay_dflt);
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TUNABLE_INT("hw.igb.tx_abs_int_delay", &igb_tx_abs_int_delay_dflt);
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TUNABLE_INT("hw.igb.rx_abs_int_delay", &igb_rx_abs_int_delay_dflt);
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TUNABLE_INT("hw.igb.rxd", &igb_rxd);
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TUNABLE_INT("hw.igb.txd", &igb_txd);
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TUNABLE_INT("hw.igb.smart_pwr_down", &igb_smart_pwr_down);
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/*
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** These parameters are used in Adaptive
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** Interrupt Moderation. The value is set
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** into EITR and controls the interrupt
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** frequency. They can be modified but
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** be careful in tuning them.
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*/
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static int igb_enable_aim = TRUE;
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TUNABLE_INT("hw.igb.enable_aim", &igb_enable_aim);
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static int igb_low_latency = IGB_LOW_LATENCY;
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TUNABLE_INT("hw.igb.low_latency", &igb_low_latency);
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static int igb_ave_latency = IGB_AVE_LATENCY;
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TUNABLE_INT("hw.igb.ave_latency", &igb_low_latency);
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static int igb_bulk_latency = IGB_BULK_LATENCY;
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TUNABLE_INT("hw.igb.bulk_latency", &igb_bulk_latency);
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/*
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** IF YOU CHANGE THESE: be sure and change IGB_MSIX_VEC in
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** if_igb.h to match. These can be autoconfigured if set to
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** 0, it will then be based on number of cpus.
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*/
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static int igb_tx_queues = 1;
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static int igb_rx_queues = 1;
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static int igb_rx_queues = 4;
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TUNABLE_INT("hw.igb.tx_queues", &igb_tx_queues);
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TUNABLE_INT("hw.igb.rx_queues", &igb_rx_queues);
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@ -403,9 +397,34 @@ igb_attach(device_t dev)
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SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
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OID_AUTO, "fc", CTLTYPE_INT|CTLFLAG_RW,
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OID_AUTO, "flow_control", CTLTYPE_INT|CTLFLAG_RW,
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&igb_fc_setting, 0, "Flow Control");
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SYSCTL_ADD_INT(device_get_sysctl_ctx(adapter->dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
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OID_AUTO, "enable_lro", CTLTYPE_INT|CTLFLAG_RW,
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&igb_enable_lro, 0, "Large Receive Offload");
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SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "enable_aim", CTLTYPE_INT|CTLFLAG_RW,
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&igb_enable_aim, 1, "Interrupt Moderation");
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SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "low_latency", CTLTYPE_INT|CTLFLAG_RW,
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&igb_low_latency, 1, "Low Latency");
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SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "ave_latency", CTLTYPE_INT|CTLFLAG_RW,
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&igb_ave_latency, 1, "Average Latency");
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SYSCTL_ADD_INT(device_get_sysctl_ctx(dev),
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SYSCTL_CHILDREN(device_get_sysctl_tree(dev)),
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OID_AUTO, "bulk_latency", CTLTYPE_INT|CTLFLAG_RW,
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&igb_bulk_latency, 1, "Bulk Latency");
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callout_init_mtx(&adapter->timer, &adapter->core_mtx, 0);
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/* Determine hardware and mac info */
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@ -427,24 +446,6 @@ igb_attach(device_t dev)
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e1000_get_bus_info(&adapter->hw);
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/* Set up some sysctls for the tunable interrupt delays */
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igb_add_int_delay_sysctl(adapter, "rx_int_delay",
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"receive interrupt delay in usecs", &adapter->rx_int_delay,
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E1000_REGISTER(&adapter->hw, E1000_RDTR), igb_rx_int_delay_dflt);
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igb_add_int_delay_sysctl(adapter, "tx_int_delay",
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"transmit interrupt delay in usecs", &adapter->tx_int_delay,
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E1000_REGISTER(&adapter->hw, E1000_TIDV), igb_tx_int_delay_dflt);
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igb_add_int_delay_sysctl(adapter, "rx_abs_int_delay",
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"receive interrupt delay limit in usecs",
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&adapter->rx_abs_int_delay,
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E1000_REGISTER(&adapter->hw, E1000_RADV),
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igb_rx_abs_int_delay_dflt);
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igb_add_int_delay_sysctl(adapter, "tx_abs_int_delay",
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"transmit interrupt delay limit in usecs",
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&adapter->tx_abs_int_delay,
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E1000_REGISTER(&adapter->hw, E1000_TADV),
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igb_tx_abs_int_delay_dflt);
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/* Sysctls for limiting the amount of work done in the taskqueue */
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igb_add_rx_process_limit(adapter, "rx_processing_limit",
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"max number of rx packets to process", &adapter->rx_process_limit,
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@ -489,18 +490,12 @@ igb_attach(device_t dev)
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adapter->max_frame_size = ETHERMTU + ETHER_HDR_LEN + ETHERNET_FCS_SIZE;
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adapter->min_frame_size = ETH_ZLEN + ETHERNET_FCS_SIZE;
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/*
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* This controls when hardware reports transmit completion
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* status.
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*/
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adapter->hw.mac.report_tx_early = 1;
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/*
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** Allocate and Setup Queues
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*/
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if (igb_allocate_queues(adapter)) {
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error = ENOMEM;
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goto err_hw_init;
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goto err_pci;
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}
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/* Make sure we have a good EEPROM before we read from it */
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@ -574,13 +569,11 @@ igb_attach(device_t dev)
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if (eeprom_data)
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adapter->wol = E1000_WUFC_MAG;
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#ifdef IGB_HW_VLAN_SUPPORT
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/* Register for VLAN events */
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adapter->vlan_attach = EVENTHANDLER_REGISTER(vlan_config,
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igb_register_vlan, 0, EVENTHANDLER_PRI_FIRST);
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adapter->vlan_detach = EVENTHANDLER_REGISTER(vlan_unconfig,
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igb_unregister_vlan, 0, EVENTHANDLER_PRI_FIRST);
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#endif
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/* Tell the stack that the interface is not active */
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adapter->ifp->if_drv_flags &= ~(IFF_DRV_RUNNING | IFF_DRV_OACTIVE);
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@ -593,8 +586,6 @@ igb_attach(device_t dev)
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igb_free_transmit_structures(adapter);
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igb_free_receive_structures(adapter);
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igb_release_hw_control(adapter);
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err_hw_init:
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e1000_remove_device(&adapter->hw);
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err_pci:
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igb_free_pci_resources(adapter);
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IGB_CORE_LOCK_DESTROY(adapter);
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@ -626,11 +617,6 @@ igb_detach(device_t dev)
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return (EBUSY);
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}
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#ifdef DEVICE_POLLING
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if (ifp->if_capenable & IFCAP_POLLING)
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ether_poll_deregister(ifp);
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#endif
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IGB_CORE_LOCK(adapter);
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adapter->in_detach = 1;
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igb_stop(adapter);
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@ -648,19 +634,16 @@ igb_detach(device_t dev)
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igb_enable_wakeup(dev);
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}
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#ifdef IGB_HW_VLAN_SUPPORT
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/* Unregister VLAN events */
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if (adapter->vlan_attach != NULL)
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EVENTHANDLER_DEREGISTER(vlan_config, adapter->vlan_attach);
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if (adapter->vlan_detach != NULL)
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EVENTHANDLER_DEREGISTER(vlan_unconfig, adapter->vlan_detach);
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#endif
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ether_ifdetach(adapter->ifp);
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callout_drain(&adapter->timer);
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e1000_remove_device(&adapter->hw);
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igb_free_pci_resources(adapter);
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bus_generic_detach(dev);
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if_free(ifp);
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@ -893,9 +876,6 @@ igb_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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IGB_CORE_LOCK(adapter);
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igb_disable_intr(adapter);
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igb_set_multi(adapter);
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#ifdef DEVICE_POLLING
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if (!(ifp->if_capenable & IFCAP_POLLING))
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#endif
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igb_enable_intr(adapter);
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IGB_CORE_UNLOCK(adapter);
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}
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@ -922,26 +902,6 @@ igb_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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IOCTL_DEBUGOUT("ioctl rcv'd: SIOCSIFCAP (Set Capabilities)");
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reinit = 0;
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mask = ifr->ifr_reqcap ^ ifp->if_capenable;
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#ifdef DEVICE_POLLING
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if (mask & IFCAP_POLLING) {
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if (ifr->ifr_reqcap & IFCAP_POLLING) {
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error = ether_poll_register(igb_poll, ifp);
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if (error)
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return (error);
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IGB_CORE_LOCK(adapter);
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igb_disable_intr(adapter);
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ifp->if_capenable |= IFCAP_POLLING;
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IGB_CORE_UNLOCK(adapter);
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} else {
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error = ether_poll_deregister(ifp);
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/* Enable interrupt even in error case */
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IGB_CORE_LOCK(adapter);
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igb_enable_intr(adapter);
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ifp->if_capenable &= ~IFCAP_POLLING;
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IGB_CORE_UNLOCK(adapter);
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}
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}
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#endif
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if (mask & IFCAP_HWCSUM) {
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ifp->if_capenable ^= IFCAP_HWCSUM;
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reinit = 1;
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@ -954,6 +914,10 @@ igb_ioctl(struct ifnet *ifp, u_long command, caddr_t data)
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ifp->if_capenable ^= IFCAP_VLAN_HWTAGGING;
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reinit = 1;
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}
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if (mask & IFCAP_VLAN_HWFILTER) {
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ifp->if_capenable ^= IFCAP_VLAN_HWFILTER;
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reinit = 1;
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}
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if (reinit && (ifp->if_drv_flags & IFF_DRV_RUNNING))
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igb_init(adapter);
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VLAN_CAPABILITIES(ifp);
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@ -1116,6 +1080,8 @@ igb_watchdog(struct adapter *adapter)
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static void
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igb_init_locked(struct adapter *adapter)
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{
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struct rx_ring *rxr = adapter->rx_rings;
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struct tx_ring *txr = adapter->tx_rings;
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struct ifnet *ifp = adapter->ifp;
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device_t dev = adapter->dev;
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u32 pba = 0;
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@ -1153,16 +1119,14 @@ igb_init_locked(struct adapter *adapter)
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E1000_WRITE_REG(&adapter->hw, E1000_VET, ETHERTYPE_VLAN);
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#ifndef IGB_HW_VLAN_SUPPORT
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/* New register interface replaces this but
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waiting on kernel support to be added */
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if (ifp->if_capenable & IFCAP_VLAN_HWTAGGING) {
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/* Vlan's enabled but HW Filtering off */
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if ((ifp->if_capenable & IFCAP_VLAN_HWTAGGING) &&
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((ifp->if_capenable & IFCAP_VLAN_HWFILTER) == 0)) {
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u32 ctrl;
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ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
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ctrl |= E1000_CTRL_VME;
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E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
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}
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#endif
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/* Set hardware offload abilities */
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ifp->if_hwassist = 0;
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@ -1200,25 +1164,26 @@ igb_init_locked(struct adapter *adapter)
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if (adapter->msix > 1) /* Set up queue routing */
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igb_configure_queues(adapter);
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else
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E1000_WRITE_REG(&adapter->hw, E1000_EITR(0), DEFAULT_ITR);
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#ifdef DEVICE_POLLING
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/*
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* Only enable interrupts if we are not polling, make sure
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* they are off otherwise.
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*/
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if (ifp->if_capenable & IFCAP_POLLING)
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igb_disable_intr(adapter);
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else
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#endif /* DEVICE_POLLING */
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{
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/* this clears any pending interrupts */
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E1000_READ_REG(&adapter->hw, E1000_ICR);
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igb_enable_intr(adapter);
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E1000_WRITE_REG(&adapter->hw, E1000_ICS, E1000_ICS_LSC);
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/* Set default RX interrupt moderation */
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for (int i = 0; i < adapter->num_rx_queues; i++, rxr++) {
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E1000_WRITE_REG(&adapter->hw,
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E1000_EITR(rxr->msix), igb_ave_latency);
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rxr->eitr_setting = igb_ave_latency;
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}
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/* Set TX interrupt rate & reset TX watchdog */
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for (int i = 0; i < adapter->num_tx_queues; i++, txr++) {
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E1000_WRITE_REG(&adapter->hw,
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E1000_EITR(txr->msix), igb_ave_latency);
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txr->watchdog_timer = FALSE;
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}
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/* this clears any pending interrupts */
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E1000_READ_REG(&adapter->hw, E1000_ICR);
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igb_enable_intr(adapter);
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E1000_WRITE_REG(&adapter->hw, E1000_ICS, E1000_ICS_LSC);
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#ifdef IGB_TIMESYNC
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/* Initialize IEEE 1588 Time sync if available */
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if (adapter->hw.mac.type == e1000_82576)
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@ -1240,50 +1205,6 @@ igb_init(void *arg)
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}
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#ifdef DEVICE_POLLING
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/*********************************************************************
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*
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* Legacy polling routine
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*
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*********************************************************************/
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static void
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igb_poll(struct ifnet *ifp, enum poll_cmd cmd, int count)
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{
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struct adapter *adapter = ifp->if_softc;
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struct rx_ring *rxr = adapter->rx_rings;
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struct tx_ring *txr = adapter->tx_rings;
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uint32_t reg_icr;
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IGB_CORE_LOCK(adapter);
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if ((ifp->if_drv_flags & IFF_DRV_RUNNING) == 0) {
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IGB_CORE_UNLOCK(adapter);
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return;
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}
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if (cmd == POLL_AND_CHECK_STATUS) {
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reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
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if (reg_icr & (E1000_ICR_RXSEQ | E1000_ICR_LSC)) {
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callout_stop(&adapter->timer);
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adapter->hw.mac.get_link_status = 1;
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igb_update_link_status(adapter);
|
||||
callout_reset(&adapter->timer, hz,
|
||||
igb_local_timer, adapter);
|
||||
}
|
||||
}
|
||||
igb_rxeof(rxr, count);
|
||||
IGB_CORE_UNLOCK(adapter);
|
||||
|
||||
/* With polling we cannot do multiqueue */
|
||||
IGB_TX_LOCK(txr);
|
||||
igb_txeof(txr);
|
||||
|
||||
if (!IFQ_DRV_IS_EMPTY(&ifp->if_snd))
|
||||
igb_start_locked(txr, ifp);
|
||||
IGB_TX_UNLOCK(txr);
|
||||
}
|
||||
#endif /* DEVICE_POLLING */
|
||||
|
||||
|
||||
static void
|
||||
igb_handle_link(void *context, int pending)
|
||||
{
|
||||
@ -1367,12 +1288,8 @@ static int
|
||||
igb_irq_fast(void *arg)
|
||||
{
|
||||
struct adapter *adapter = arg;
|
||||
struct ifnet *ifp = adapter->ifp;
|
||||
uint32_t reg_icr;
|
||||
|
||||
/* Should not happen, but... */
|
||||
if (ifp->if_capenable & IFCAP_POLLING)
|
||||
return FILTER_STRAY;
|
||||
|
||||
reg_icr = E1000_READ_REG(&adapter->hw, E1000_ICR);
|
||||
|
||||
@ -1443,17 +1360,75 @@ igb_msix_rx(void *arg)
|
||||
{
|
||||
struct rx_ring *rxr = arg;
|
||||
struct adapter *adapter = rxr->adapter;
|
||||
struct ifnet *ifp = adapter->ifp;
|
||||
u32 more, loop = 5;
|
||||
|
||||
++rxr->rx_irq;
|
||||
if (ifp->if_drv_flags & IFF_DRV_RUNNING)
|
||||
if (igb_rxeof(rxr, adapter->rx_process_limit) != 0)
|
||||
taskqueue_enqueue(adapter->tq, &rxr->rx_task);
|
||||
do {
|
||||
more = igb_rxeof(rxr, adapter->rx_process_limit);
|
||||
} while (loop-- || more != 0);
|
||||
|
||||
taskqueue_enqueue(adapter->tq, &rxr->rx_task);
|
||||
|
||||
/* Update interrupt rate */
|
||||
if (igb_enable_aim == TRUE)
|
||||
igb_update_aim(rxr);
|
||||
|
||||
/* Reenable this interrupt */
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_EIMS, rxr->eims);
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
** Routine to adjust the RX EITR value based on traffic,
|
||||
** its a simple three state model, but seems to help.
|
||||
**
|
||||
** Note that the three EITR values are tuneable using
|
||||
** sysctl in real time. The feature can be effectively
|
||||
** nullified by setting them equal.
|
||||
*/
|
||||
#define BULK_THRESHOLD 10000
|
||||
#define AVE_THRESHOLD 1600
|
||||
|
||||
static void
|
||||
igb_update_aim(struct rx_ring *rxr)
|
||||
{
|
||||
struct adapter *adapter = rxr->adapter;
|
||||
u32 olditr, newitr;
|
||||
|
||||
/* Update interrupt moderation based on traffic */
|
||||
olditr = rxr->eitr_setting;
|
||||
newitr = olditr;
|
||||
|
||||
/* Idle, don't change setting */
|
||||
if (rxr->bytes == 0)
|
||||
return;
|
||||
|
||||
if (olditr == igb_low_latency) {
|
||||
if (rxr->bytes > AVE_THRESHOLD)
|
||||
newitr = igb_ave_latency;
|
||||
} else if (olditr == igb_ave_latency) {
|
||||
if (rxr->bytes < AVE_THRESHOLD)
|
||||
newitr = igb_low_latency;
|
||||
else if (rxr->bytes > BULK_THRESHOLD)
|
||||
newitr = igb_bulk_latency;
|
||||
} else if (olditr == igb_bulk_latency) {
|
||||
if (rxr->bytes < BULK_THRESHOLD)
|
||||
newitr = igb_ave_latency;
|
||||
}
|
||||
|
||||
if (olditr != newitr) {
|
||||
/* Change interrupt rate */
|
||||
rxr->eitr_setting = newitr;
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_EITR(rxr->me),
|
||||
newitr | (newitr << 16));
|
||||
}
|
||||
|
||||
rxr->bytes = 0;
|
||||
return;
|
||||
}
|
||||
|
||||
|
||||
/*********************************************************************
|
||||
*
|
||||
* MSIX Link Interrupt Service routine
|
||||
@ -1823,8 +1798,9 @@ igb_set_multi(struct adapter *adapter)
|
||||
{
|
||||
struct ifnet *ifp = adapter->ifp;
|
||||
struct ifmultiaddr *ifma;
|
||||
uint32_t reg_rctl = 0;
|
||||
uint8_t mta[512]; /* Largest MTS is 4096 bits */
|
||||
u32 reg_rctl = 0;
|
||||
u8 mta[MAX_NUM_MULTICAST_ADDRESSES * ETH_ADDR_LEN];
|
||||
|
||||
int mcnt = 0;
|
||||
|
||||
IOCTL_DEBUGOUT("igb_set_multi: begin");
|
||||
@ -2234,10 +2210,6 @@ igb_configure_queues(struct adapter *adapter)
|
||||
E1000_GPIE_MSIX_MODE |
|
||||
E1000_GPIE_EIAME |
|
||||
E1000_GPIE_PBA | E1000_GPIE_NSICR);
|
||||
/* Set the MSIX interrupt rate. */
|
||||
for (int i = 0; i < IGB_MSIX_VEC; i++)
|
||||
E1000_WRITE_REG(&adapter->hw,
|
||||
E1000_EITR(i), DEFAULT_ITR);
|
||||
/* RX */
|
||||
for (int i = 0; i < adapter->num_rx_queues; i++) {
|
||||
u32 index = i & 0x7; /* Each IVAR has two entries */
|
||||
@ -2286,11 +2258,6 @@ igb_configure_queues(struct adapter *adapter)
|
||||
tmp |= E1000_CTRL_EXT_IRCA;
|
||||
E1000_WRITE_REG(hw, E1000_CTRL_EXT, tmp);
|
||||
|
||||
/* Set the interrupt throttling rate. */
|
||||
for (int i = 0; i < IGB_MSIX_VEC; i++)
|
||||
E1000_WRITE_REG(&adapter->hw,
|
||||
E1000_EITR(i), DEFAULT_ITR);
|
||||
|
||||
/* TX */
|
||||
for (int i = 0; i < adapter->num_tx_queues; i++) {
|
||||
txr = &adapter->tx_rings[i];
|
||||
@ -2519,18 +2486,13 @@ igb_setup_interface(device_t dev, struct adapter *adapter)
|
||||
ifp->if_capenable = ifp->if_capabilities;
|
||||
|
||||
/*
|
||||
* Tell the upper layer(s) we support long frames.
|
||||
* Tell the upper layer(s) what we support.
|
||||
*/
|
||||
ifp->if_data.ifi_hdrlen = sizeof(struct ether_vlan_header);
|
||||
ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
|
||||
ifp->if_capenable |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_MTU;
|
||||
|
||||
#ifdef DEVICE_POLLING
|
||||
if (adapter->msix > 1)
|
||||
device_printf(adapter->dev, "POLLING not supported with MSIX\n");
|
||||
else
|
||||
ifp->if_capabilities |= IFCAP_POLLING;
|
||||
#endif
|
||||
ifp->if_capabilities |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWFILTER;
|
||||
ifp->if_capabilities |= IFCAP_VLAN_MTU;
|
||||
ifp->if_capenable |= IFCAP_VLAN_HWTAGGING | IFCAP_VLAN_HWFILTER;
|
||||
ifp->if_capenable |= IFCAP_VLAN_MTU;
|
||||
|
||||
/*
|
||||
* Specify the media types supported by this adapter and register
|
||||
@ -2663,7 +2625,6 @@ igb_allocate_queues(struct adapter *adapter)
|
||||
struct rx_ring *rxr;
|
||||
int rsize, tsize, error = E1000_SUCCESS;
|
||||
int txconf = 0, rxconf = 0;
|
||||
char name_string[16];
|
||||
|
||||
/* First allocate the TX ring struct memory */
|
||||
if (!(adapter->tx_rings =
|
||||
@ -2699,9 +2660,9 @@ igb_allocate_queues(struct adapter *adapter)
|
||||
txr->me = i;
|
||||
|
||||
/* Initialize the TX lock */
|
||||
snprintf(name_string, sizeof(name_string), "%s:tx(%d)",
|
||||
snprintf(txr->mtx_name, sizeof(txr->mtx_name), "%s:tx(%d)",
|
||||
device_get_nameunit(dev), txr->me);
|
||||
mtx_init(&txr->tx_mtx, name_string, NULL, MTX_DEF);
|
||||
mtx_init(&txr->tx_mtx, txr->mtx_name, NULL, MTX_DEF);
|
||||
|
||||
if (igb_dma_malloc(adapter, tsize,
|
||||
&txr->txdma, BUS_DMA_NOWAIT)) {
|
||||
@ -2734,9 +2695,9 @@ igb_allocate_queues(struct adapter *adapter)
|
||||
rxr->me = i;
|
||||
|
||||
/* Initialize the RX lock */
|
||||
snprintf(name_string, sizeof(name_string), "%s:rx(%d)",
|
||||
snprintf(rxr->mtx_name, sizeof(rxr->mtx_name), "%s:rx(%d)",
|
||||
device_get_nameunit(dev), txr->me);
|
||||
mtx_init(&rxr->rx_mtx, name_string, NULL, MTX_DEF);
|
||||
mtx_init(&rxr->rx_mtx, rxr->mtx_name, NULL, MTX_DEF);
|
||||
|
||||
if (igb_dma_malloc(adapter, rsize,
|
||||
&rxr->rxdma, BUS_DMA_NOWAIT)) {
|
||||
@ -2897,7 +2858,7 @@ static void
|
||||
igb_initialize_transmit_units(struct adapter *adapter)
|
||||
{
|
||||
struct tx_ring *txr = adapter->tx_rings;
|
||||
u32 tctl, txdctl, tipg = 0;
|
||||
u32 tctl, txdctl;
|
||||
|
||||
INIT_DEBUGOUT("igb_initialize_transmit_units: begin");
|
||||
|
||||
@ -2928,26 +2889,14 @@ igb_initialize_transmit_units(struct adapter *adapter)
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_TXDCTL(i), txdctl);
|
||||
}
|
||||
|
||||
/* Set the default values for the Tx Inter Packet Gap timer */
|
||||
if ((adapter->hw.phy.media_type == e1000_media_type_fiber) ||
|
||||
(adapter->hw.phy.media_type == e1000_media_type_internal_serdes))
|
||||
tipg = DEFAULT_82543_TIPG_IPGT_FIBER;
|
||||
else
|
||||
tipg = DEFAULT_82543_TIPG_IPGT_COPPER;
|
||||
|
||||
tipg |= DEFAULT_82543_TIPG_IPGR1 << E1000_TIPG_IPGR1_SHIFT;
|
||||
tipg |= DEFAULT_82543_TIPG_IPGR2 << E1000_TIPG_IPGR2_SHIFT;
|
||||
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_TIPG, tipg);
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_TIDV, adapter->tx_int_delay.value);
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_TADV, adapter->tx_abs_int_delay.value);
|
||||
|
||||
/* Program the Transmit Control Register */
|
||||
tctl = E1000_READ_REG(&adapter->hw, E1000_TCTL);
|
||||
tctl &= ~E1000_TCTL_CT;
|
||||
tctl |= (E1000_TCTL_PSP | E1000_TCTL_RTLC | E1000_TCTL_EN |
|
||||
(E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT));
|
||||
|
||||
e1000_config_collision_dist(&adapter->hw);
|
||||
|
||||
/* This write will effectively turn on the transmit unit. */
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_TCTL, tctl);
|
||||
|
||||
@ -3615,9 +3564,6 @@ igb_initialize_receive_units(struct adapter *adapter)
|
||||
rctl = E1000_READ_REG(&adapter->hw, E1000_RCTL);
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_RCTL, rctl & ~E1000_RCTL_EN);
|
||||
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_RADV,
|
||||
adapter->rx_abs_int_delay.value);
|
||||
|
||||
/* Setup the Base and Length of the Rx Descriptor Rings */
|
||||
for (int i = 0; i < adapter->num_rx_queues; i++, rxr++) {
|
||||
u64 bus_addr = rxr->rxdma.dma_paddr;
|
||||
@ -3935,7 +3881,8 @@ igb_rxeof(struct rx_ring *rxr, int count)
|
||||
rxr->fmp->m_pkthdr.rcvif = ifp;
|
||||
ifp->if_ipackets++;
|
||||
rxr->rx_packets++;
|
||||
rxr->rx_bytes += rxr->fmp->m_pkthdr.len;
|
||||
rxr->bytes += rxr->fmp->m_pkthdr.len;
|
||||
rxr->rx_bytes += rxr->bytes;
|
||||
|
||||
igb_rx_checksum(staterr, rxr->fmp);
|
||||
#ifndef __NO_STRICT_ALIGNMENT
|
||||
@ -3991,9 +3938,7 @@ igb_rxeof(struct rx_ring *rxr, int count)
|
||||
/* Use LRO if possible */
|
||||
if ((!lro->lro_cnt) || (tcp_lro_rx(lro, m, 0))) {
|
||||
/* Pass up to the stack */
|
||||
IGB_RX_UNLOCK(rxr);
|
||||
(*ifp->if_input)(ifp, m);
|
||||
IGB_RX_LOCK(rxr);
|
||||
i = rxr->next_to_check;
|
||||
}
|
||||
}
|
||||
@ -4005,19 +3950,18 @@ igb_rxeof(struct rx_ring *rxr, int count)
|
||||
|
||||
/* Advance the E1000's Receive Queue #0 "Tail Pointer". */
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_RDT(rxr->me), rxr->last_cleaned);
|
||||
IGB_RX_UNLOCK(rxr);
|
||||
|
||||
/*
|
||||
** Flush any outstanding LRO work
|
||||
** this may call into the stack and
|
||||
** must not hold a driver lock.
|
||||
*/
|
||||
while(!SLIST_EMPTY(&lro->lro_active)) {
|
||||
* Flush any outstanding LRO work
|
||||
*/
|
||||
while (!SLIST_EMPTY(&lro->lro_active)) {
|
||||
queued = SLIST_FIRST(&lro->lro_active);
|
||||
SLIST_REMOVE_HEAD(&lro->lro_active, next);
|
||||
tcp_lro_flush(lro, queued);
|
||||
}
|
||||
|
||||
IGB_RX_UNLOCK(rxr);
|
||||
|
||||
if (!((staterr) & E1000_RXD_STAT_DD))
|
||||
return FALSE;
|
||||
|
||||
@ -4114,7 +4058,6 @@ igb_rx_checksum(u32 staterr, struct mbuf *mp)
|
||||
return;
|
||||
}
|
||||
|
||||
#ifdef IGB_HW_VLAN_SUPPORT
|
||||
/*
|
||||
* This routine is run via an vlan
|
||||
* config EVENT
|
||||
@ -4125,6 +4068,10 @@ igb_register_vlan(void *unused, struct ifnet *ifp, u16 vtag)
|
||||
struct adapter *adapter = ifp->if_softc;
|
||||
u32 ctrl, rctl, index, vfta;
|
||||
|
||||
/* Shouldn't happen */
|
||||
if ((ifp->if_capenable & IFCAP_VLAN_HWFILTER) == 0)
|
||||
return;
|
||||
|
||||
ctrl = E1000_READ_REG(&adapter->hw, E1000_CTRL);
|
||||
ctrl |= E1000_CTRL_VME;
|
||||
E1000_WRITE_REG(&adapter->hw, E1000_CTRL, ctrl);
|
||||
@ -4157,6 +4104,10 @@ igb_unregister_vlan(void *unused, struct ifnet *ifp, u16 vtag)
|
||||
struct adapter *adapter = ifp->if_softc;
|
||||
u32 index, vfta;
|
||||
|
||||
/* Shouldn't happen */
|
||||
if ((ifp->if_capenable & IFCAP_VLAN_HWFILTER) == 0)
|
||||
return;
|
||||
|
||||
/* Remove entry in the hardware filter table */
|
||||
index = ((vtag >> 5) & 0x7F);
|
||||
vfta = E1000_READ_REG_ARRAY(&adapter->hw, E1000_VFTA, index);
|
||||
@ -4175,7 +4126,6 @@ igb_unregister_vlan(void *unused, struct ifnet *ifp, u16 vtag)
|
||||
adapter->max_frame_size);
|
||||
}
|
||||
}
|
||||
#endif /* IGB_HW_VLAN_SUPPORT */
|
||||
|
||||
static void
|
||||
igb_enable_intr(struct adapter *adapter)
|
||||
@ -4457,12 +4407,6 @@ igb_print_debug_info(struct adapter *adapter)
|
||||
device_printf(dev, "Flow control watermarks high = %d low = %d\n",
|
||||
adapter->hw.fc.high_water,
|
||||
adapter->hw.fc.low_water);
|
||||
device_printf(dev, "tx_int_delay = %d, tx_abs_int_delay = %d\n",
|
||||
E1000_READ_REG(&adapter->hw, E1000_TIDV),
|
||||
E1000_READ_REG(&adapter->hw, E1000_TADV));
|
||||
device_printf(dev, "rx_int_delay = %d, rx_abs_int_delay = %d\n",
|
||||
E1000_READ_REG(&adapter->hw, E1000_RDTR),
|
||||
E1000_READ_REG(&adapter->hw, E1000_RADV));
|
||||
|
||||
for (int i = 0; i < adapter->num_tx_queues; i++, txr++) {
|
||||
device_printf(dev, "Queue(%d) tdh = %d, tdt = %d\n", i,
|
||||
@ -4636,64 +4580,6 @@ igb_sysctl_stats(SYSCTL_HANDLER_ARGS)
|
||||
return (error);
|
||||
}
|
||||
|
||||
static int
|
||||
igb_sysctl_int_delay(SYSCTL_HANDLER_ARGS)
|
||||
{
|
||||
struct igb_int_delay_info *info;
|
||||
struct adapter *adapter;
|
||||
uint32_t regval;
|
||||
int error;
|
||||
int usecs;
|
||||
int ticks;
|
||||
|
||||
info = (struct igb_int_delay_info *)arg1;
|
||||
usecs = info->value;
|
||||
error = sysctl_handle_int(oidp, &usecs, 0, req);
|
||||
if (error != 0 || req->newptr == NULL)
|
||||
return (error);
|
||||
if (usecs < 0 || usecs > IGB_TICKS_TO_USECS(65535))
|
||||
return (EINVAL);
|
||||
info->value = usecs;
|
||||
ticks = IGB_USECS_TO_TICKS(usecs);
|
||||
|
||||
adapter = info->adapter;
|
||||
|
||||
IGB_CORE_LOCK(adapter);
|
||||
regval = E1000_READ_OFFSET(&adapter->hw, info->offset);
|
||||
regval = (regval & ~0xffff) | (ticks & 0xffff);
|
||||
/* Handle a few special cases. */
|
||||
switch (info->offset) {
|
||||
case E1000_RDTR:
|
||||
break;
|
||||
case E1000_TIDV:
|
||||
if (ticks == 0) {
|
||||
adapter->txd_cmd &= ~E1000_TXD_CMD_IDE;
|
||||
/* Don't write 0 into the TIDV register. */
|
||||
regval++;
|
||||
} else
|
||||
if (adapter->hw.mac.type < e1000_82575)
|
||||
adapter->txd_cmd |= E1000_TXD_CMD_IDE;
|
||||
break;
|
||||
}
|
||||
E1000_WRITE_OFFSET(&adapter->hw, info->offset, regval);
|
||||
IGB_CORE_UNLOCK(adapter);
|
||||
return (0);
|
||||
}
|
||||
|
||||
static void
|
||||
igb_add_int_delay_sysctl(struct adapter *adapter, const char *name,
|
||||
const char *description, struct igb_int_delay_info *info,
|
||||
int offset, int value)
|
||||
{
|
||||
info->adapter = adapter;
|
||||
info->offset = offset;
|
||||
info->value = value;
|
||||
SYSCTL_ADD_PROC(device_get_sysctl_ctx(adapter->dev),
|
||||
SYSCTL_CHILDREN(device_get_sysctl_tree(adapter->dev)),
|
||||
OID_AUTO, name, CTLTYPE_INT|CTLFLAG_RW,
|
||||
info, 0, igb_sysctl_int_delay, "I", description);
|
||||
}
|
||||
|
||||
static void
|
||||
igb_add_rx_process_limit(struct adapter *adapter, const char *name,
|
||||
const char *description, int *limit, int value)
|
||||
|
||||
@ -210,7 +210,7 @@
|
||||
** The 82575 has a total of 10, 82576 has 25. Set this
|
||||
** to the real amount you need to streamline data storage.
|
||||
*/
|
||||
#define IGB_MSIX_VEC 5 /* MSIX vectors configured */
|
||||
#define IGB_MSIX_VEC 6 /* MSIX vectors configured */
|
||||
|
||||
/* Defines for printing debug information */
|
||||
#define DEBUG_INIT 0
|
||||
@ -234,6 +234,14 @@
|
||||
#define ETH_ADDR_LEN 6
|
||||
#define CSUM_OFFLOAD 7 /* Offload bits in mbuf flag */
|
||||
|
||||
/*
|
||||
* Interrupt Moderation parameters
|
||||
*/
|
||||
#define IGB_LOW_LATENCY 128
|
||||
#define IGB_AVE_LATENCY 450
|
||||
#define IGB_BULK_LATENCY 1200
|
||||
#define IGB_LINK_ITR 2000
|
||||
|
||||
#ifdef IGB_TIMESYNC
|
||||
/* Precision Time Sync (IEEE 1588) defines */
|
||||
#define ETHERTYPE_IEEE1588 0x88F7
|
||||
@ -290,6 +298,7 @@ struct tx_ring {
|
||||
u32 msix; /* This ring's MSIX vector */
|
||||
u32 eims; /* This ring's EIMS bit */
|
||||
struct mtx tx_mtx;
|
||||
char mtx_name[16];
|
||||
struct igb_dma_alloc txdma; /* bus_dma glue for tx desc */
|
||||
struct e1000_tx_desc *tx_base;
|
||||
struct task tx_task; /* cleanup tasklet */
|
||||
@ -317,6 +326,7 @@ struct rx_ring {
|
||||
struct lro_ctrl lro;
|
||||
struct task rx_task; /* cleanup tasklet */
|
||||
struct mtx rx_mtx;
|
||||
char mtx_name[16];
|
||||
u32 last_cleaned;
|
||||
u32 next_to_check;
|
||||
struct igb_buffer *rx_buffers;
|
||||
@ -328,6 +338,10 @@ struct rx_ring {
|
||||
*/
|
||||
struct mbuf *fmp;
|
||||
struct mbuf *lmp;
|
||||
|
||||
u32 bytes;
|
||||
u32 eitr_setting;
|
||||
|
||||
/* Soft stats */
|
||||
u64 rx_irq;
|
||||
u64 rx_packets;
|
||||
@ -364,10 +378,8 @@ struct adapter {
|
||||
struct task link_task;
|
||||
struct task rxtx_task;
|
||||
struct taskqueue *tq; /* private task queue */
|
||||
#ifdef IGB_HW_VLAN_SUPPORT
|
||||
eventhandler_tag vlan_attach;
|
||||
eventhandler_tag vlan_detach;
|
||||
#endif
|
||||
/* Management and WOL features */
|
||||
int wol;
|
||||
int has_manage;
|
||||
@ -377,10 +389,6 @@ struct adapter {
|
||||
u16 link_speed;
|
||||
u16 link_duplex;
|
||||
u32 smartspeed;
|
||||
struct igb_int_delay_info tx_int_delay;
|
||||
struct igb_int_delay_info tx_abs_int_delay;
|
||||
struct igb_int_delay_info rx_int_delay;
|
||||
struct igb_int_delay_info rx_abs_int_delay;
|
||||
|
||||
/*
|
||||
* Transmit rings
|
||||
|
||||
Loading…
Reference in New Issue
Block a user