Add driver for Rockchip One Time Programmable (OTP) device.
This driver created the possibility to assign fixed MAC adresses to eqos devices.
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192
sys/arm64/rockchip/rk_otp.c
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sys/arm64/rockchip/rk_otp.c
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/*-
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* Copyright (c) 2022 Soren Schmidt <sos@deepcore.dk>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__FBSDID("$FreeBSD$");
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#include <sys/param.h>
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#include <sys/bus.h>
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#include <sys/kernel.h>
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#include <sys/module.h>
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#include <sys/mutex.h>
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#include <sys/rman.h>
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#include <machine/bus.h>
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#include <dev/ofw/openfirm.h>
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#include <dev/ofw/ofw_bus.h>
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#include <dev/ofw/ofw_bus_subr.h>
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#include <dev/extres/syscon/syscon.h>
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#include <dev/fdt/simple_mfd.h>
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#include "rk_otp.h"
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#include "rk_otp_if.h"
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#define OTPC_SBPI_CTRL 0x0020
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#define SBPI_ENABLE_MASK 0x00010000
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#define SBPI_ENABLE 1
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#define SBPI_DAP_ADDR_MASK 0xff000000
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#define SBPI_DAP_ADDR 0x02
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#define SBPI_DAP_ADDR_SHIFT 8
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#define OTPC_SBPI_CMD_VALID_PRE 0x0024
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#define SBPI_CMD_VALID_MASK 0xffff0000
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#define OTPC_SBPI_INT_STATUS 0x0304
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#define OTPC_SBPI_DONE 2
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#define OTPC_USER_DONE 4
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#define OTPC_USER_CTRL 0x0100
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#define OTPC_USER_MASK 0xffff0000
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#define OTPC_USER 1
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#define OTPC_USER_ADDR 0x0104
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#define OTPC_USER_ADDR_MASK 0xffff0000
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#define OTPC_USER_ENABLE 0x0108
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#define OTPC_USER_FSM_ENABLE_MASK 0xffff0000
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#define OTPC_USER_FSM_ENABLE 1
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#define OTPC_USER_Q 0x0124
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#define OTPC_SBPI_CMD0_OFFSET 0x1000
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#define SBPI_DAP_CMD_WRF 0xc0
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#define SBPI_DAP_REG_ECC 0x3a
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#define OTPC_SBPI_CMD1_OFFSET 0x1004
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#define SBPI_ECC_ENABLE 0x00
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#define SBPI_ECC_DISABLE 0x09
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static struct ofw_compat_data compat_data[] = {
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{"rockchip,rk3568-otp", 1},
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{NULL, 0}
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};
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static struct rk_otp_softc {
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struct resource *mem;
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} rk_otp_sc;
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static int
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rk_otp_wait(struct rk_otp_softc *sc, uint32_t status)
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{
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int retry = 10000;
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while (!(bus_read_4(sc->mem, OTPC_SBPI_INT_STATUS) & status)) {
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DELAY(10);
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if (--retry == 0)
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return (ETIMEDOUT);
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}
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/* clear status */
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bus_write_4(sc->mem, OTPC_SBPI_INT_STATUS, status);
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return (0);
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}
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static int
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rk_otp_ecc(struct rk_otp_softc *sc, int enable)
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{
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bus_write_4(sc->mem, OTPC_SBPI_CTRL,
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SBPI_DAP_ADDR_MASK | (SBPI_DAP_ADDR << SBPI_DAP_ADDR_SHIFT));
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bus_write_4(sc->mem, OTPC_SBPI_CMD_VALID_PRE,
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SBPI_CMD_VALID_MASK | 0x1);
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bus_write_4(sc->mem, OTPC_SBPI_CMD0_OFFSET,
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SBPI_DAP_CMD_WRF | SBPI_DAP_REG_ECC);
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if (enable)
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bus_write_4(sc->mem, OTPC_SBPI_CMD1_OFFSET, SBPI_ECC_ENABLE);
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else
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bus_write_4(sc->mem, OTPC_SBPI_CMD1_OFFSET, SBPI_ECC_DISABLE);
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bus_write_4(sc->mem, OTPC_SBPI_CTRL, SBPI_ENABLE_MASK | SBPI_ENABLE);
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return (rk_otp_wait(sc, OTPC_SBPI_DONE));
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}
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int
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rk_otp_read(device_t dev, uint8_t *buffer, int offset, int size)
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{
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struct rk_otp_softc *sc = &rk_otp_sc;
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int error;
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/* if not initialized just error out */
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if (!sc->mem)
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return (ENXIO);
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if ((error = rk_otp_ecc(sc, 1))) {
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device_printf(dev, "timeout waiting for OTP ECC status\n");
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return (error);
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}
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bus_write_4(sc->mem, OTPC_USER_CTRL, OTPC_USER | OTPC_USER_MASK);
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DELAY(5);
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while (size--) {
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bus_write_4(sc->mem, OTPC_USER_ADDR,
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offset++ | OTPC_USER_ADDR_MASK);
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bus_write_4(sc->mem, OTPC_USER_ENABLE,
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OTPC_USER_FSM_ENABLE | OTPC_USER_FSM_ENABLE_MASK);
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if ((error = rk_otp_wait(sc, OTPC_USER_DONE))) {
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device_printf(dev, "timeout waiting for OTP data\n");
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break;
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}
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*buffer++ = bus_read_4(sc->mem, OTPC_USER_Q);
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}
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bus_write_4(sc->mem, OTPC_USER_CTRL, OTPC_USER_MASK);
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return (error);
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}
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static int
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rk_otp_probe(device_t dev)
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{
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if (!ofw_bus_status_okay(dev))
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return (ENXIO);
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if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0)
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return (ENXIO);
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device_set_desc(dev, "RockChip OTP");
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return (BUS_PROBE_DEFAULT);
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}
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static int
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rk_otp_attach(device_t dev)
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{
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struct rk_otp_softc *sc = &rk_otp_sc;
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int rid = 0;
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sc->mem = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &rid, RF_ACTIVE);
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if (!sc->mem) {
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device_printf(dev, "Cannot allocate memory resources\n");
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return (ENXIO);
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}
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return (0);
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}
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static device_method_t rk_otp_methods[] = {
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/* Device interface */
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DEVMETHOD(device_probe, rk_otp_probe),
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DEVMETHOD(device_attach, rk_otp_attach),
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DEVMETHOD_END
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};
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DEFINE_CLASS_1(rk_otp, rk_otp_driver, rk_otp_methods,
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sizeof(struct simple_mfd_softc), simple_mfd_driver);
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EARLY_DRIVER_MODULE(rk_otp, simplebus, rk_otp_driver, 0, 0,
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BUS_PASS_BUS + BUS_PASS_ORDER_MIDDLE);
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26
sys/arm64/rockchip/rk_otp.h
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26
sys/arm64/rockchip/rk_otp.h
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@ -0,0 +1,26 @@
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/*-
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* Copyright (c) 2022 Soren Schmidt <sos@deepcore.dk>
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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int rk_otp_read(device_t dev, uint8_t *buffer, int offset, int size);
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sys/arm64/rockchip/rk_otp_if.m
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sys/arm64/rockchip/rk_otp_if.m
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#-
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# Copyright (c) 2022 Soren Schmidt <sos@deepcore.dk>
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# All rights reserved.
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#
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# Redistribution and use in source and binary forms, with or without
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# modification, are permitted provided that the following conditions
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# are met:
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# 1. Redistributions of source code must retain the above copyright
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# notice, this list of conditions and the following disclaimer.
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# 2. Redistributions in binary form must reproduce the above copyright
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# notice, this list of conditions and the following disclaimer in the
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# documentation and/or other materials provided with the distribution.
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#
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# THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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# ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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# IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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# ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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# FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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# DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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# OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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# HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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# LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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# OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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# SUCH DAMAGE.
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#
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# $Id: rk_otp_if.m 921 2022-08-09 18:38:11Z sos $
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#
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#include <arm64/rockchip/rk_otp.h>
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INTERFACE rk_otp;
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HEADER {
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};
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#
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# Initialize SoC specific registers.
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#
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METHOD int read {
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device_t dev;
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void *buffer;
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int offset;
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int size;
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} DEFAULT rk_otp_read;
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