A small number of systems in the ICH9/10 family have a flash
part that is made up of 8K banks rather than 4K, if these systems are using bank 1 then the last change in this code breaks the bank read, resulting in an invalid checksum of the eeprom during driver load. This change fixes this. Approved by: re
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@ -307,7 +307,6 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
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{
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struct e1000_nvm_info *nvm = &hw->nvm;
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struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
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union ich8_hws_flash_status hsfsts;
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u32 gfpreg, sector_base_addr, sector_end_addr;
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s32 ret_val = E1000_SUCCESS;
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u16 i;
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@ -346,20 +345,6 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
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/* Adjust to word count */
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nvm->flash_bank_size /= sizeof(u16);
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/*
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* Make sure the flash bank size does not overwrite the 4k
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* sector ranges. We may have 64k allotted to us but we only care
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* about the first 2 4k sectors. Therefore, if we have anything less
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* than 64k set in the HSFSTS register, we will reduce the bank size
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* down to 4k and let the rest remain unused. If berasesz == 3, then
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* we are working in 64k mode. Otherwise we are not.
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*/
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if (nvm->flash_bank_size > E1000_SHADOW_RAM_WORDS) {
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hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
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if (hsfsts.hsf_status.berasesz != 3)
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nvm->flash_bank_size = E1000_SHADOW_RAM_WORDS;
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}
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nvm->word_size = E1000_SHADOW_RAM_WORDS;
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/* Clear shadow ram */
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@ -1961,13 +1946,8 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
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iteration = 1;
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break;
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case 2:
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if (hw->mac.type == e1000_ich9lan) {
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sector_size = ICH_FLASH_SEG_SIZE_8K;
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iteration = flash_bank_size / ICH_FLASH_SEG_SIZE_8K;
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} else {
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ret_val = -E1000_ERR_NVM;
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goto out;
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}
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sector_size = ICH_FLASH_SEG_SIZE_8K;
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iteration = 1;
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break;
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case 3:
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sector_size = ICH_FLASH_SEG_SIZE_64K;
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