Mechanically convert to if_inc_counter().
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2c705cad05
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@ -568,18 +568,18 @@ gem_tick(void *arg)
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/*
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* Unload collision and error counters.
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*/
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ifp->if_collisions +=
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if_inc_counter(ifp, IFCOUNTER_COLLISIONS,
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GEM_BANK1_READ_4(sc, GEM_MAC_NORM_COLL_CNT) +
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GEM_BANK1_READ_4(sc, GEM_MAC_FIRST_COLL_CNT);
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GEM_BANK1_READ_4(sc, GEM_MAC_FIRST_COLL_CNT));
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v = GEM_BANK1_READ_4(sc, GEM_MAC_EXCESS_COLL_CNT) +
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GEM_BANK1_READ_4(sc, GEM_MAC_LATE_COLL_CNT);
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ifp->if_collisions += v;
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ifp->if_oerrors += v;
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ifp->if_ierrors +=
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if_inc_counter(ifp, IFCOUNTER_COLLISIONS, v);
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if_inc_counter(ifp, IFCOUNTER_OERRORS, v);
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if_inc_counter(ifp, IFCOUNTER_IERRORS,
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GEM_BANK1_READ_4(sc, GEM_MAC_RX_LEN_ERR_CNT) +
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GEM_BANK1_READ_4(sc, GEM_MAC_RX_ALIGN_ERR) +
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GEM_BANK1_READ_4(sc, GEM_MAC_RX_CRC_ERR_CNT) +
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GEM_BANK1_READ_4(sc, GEM_MAC_RX_CODE_VIOL);
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GEM_BANK1_READ_4(sc, GEM_MAC_RX_CODE_VIOL));
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/*
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* Then clear the hardware counters.
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@ -1485,7 +1485,7 @@ gem_tint(struct gem_softc *sc)
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STAILQ_INSERT_TAIL(&sc->sc_txfreeq, txs, txs_q);
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ifp->if_opackets++;
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if_inc_counter(ifp, IFCOUNTER_OPACKETS, 1);
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progress = 1;
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}
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@ -1580,7 +1580,7 @@ gem_rint(struct gem_softc *sc)
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}
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if (rxstat & GEM_RD_BAD_CRC) {
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ifp->if_ierrors++;
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if_inc_counter(ifp, IFCOUNTER_IERRORS, 1);
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device_printf(sc->sc_dev, "receive error: CRC error\n");
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GEM_INIT_RXDESC(sc, sc->sc_rxptr);
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m = NULL;
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@ -1606,7 +1606,7 @@ gem_rint(struct gem_softc *sc)
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* the buffer that's already attached to this descriptor.
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*/
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if (gem_add_rxbuf(sc, sc->sc_rxptr) != 0) {
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ifp->if_iqdrops++;
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if_inc_counter(ifp, IFCOUNTER_IQDROPS, 1);
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GEM_INIT_RXDESC(sc, sc->sc_rxptr);
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m = NULL;
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}
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@ -1634,7 +1634,7 @@ gem_rint(struct gem_softc *sc)
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continue;
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}
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ifp->if_ipackets++;
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if_inc_counter(ifp, IFCOUNTER_IPACKETS, 1);
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m->m_data += ETHER_ALIGN; /* first byte offset */
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m->m_pkthdr.rcvif = ifp;
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m->m_pkthdr.len = m->m_len = GEM_RD_BUFLEN(rxstat);
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@ -1706,7 +1706,7 @@ static void
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gem_eint(struct gem_softc *sc, u_int status)
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{
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sc->sc_ifp->if_ierrors++;
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if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1);
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if ((status & GEM_INTR_RX_TAG_ERR) != 0) {
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gem_reset_rxdma(sc);
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return;
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@ -1784,7 +1784,7 @@ gem_intr(void *v)
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"MAC TX fault, status %x\n", status2);
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if ((status2 &
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(GEM_MAC_TX_UNDERRUN | GEM_MAC_TX_PKT_TOO_LONG)) != 0) {
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sc->sc_ifp->if_oerrors++;
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if_inc_counter(sc->sc_ifp, IFCOUNTER_OERRORS, 1);
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sc->sc_ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
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gem_init_locked(sc);
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}
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@ -1798,7 +1798,7 @@ gem_intr(void *v)
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* likely that the receiver has hung so we reset it.
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*/
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if ((status2 & GEM_MAC_RX_OVERFLOW) != 0) {
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sc->sc_ifp->if_ierrors++;
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if_inc_counter(sc->sc_ifp, IFCOUNTER_IERRORS, 1);
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gem_reset_rxdma(sc);
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} else if ((status2 &
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~(GEM_MAC_RX_DONE | GEM_MAC_RX_FRAME_CNT)) != 0)
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@ -1835,7 +1835,7 @@ gem_watchdog(struct gem_softc *sc)
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device_printf(sc->sc_dev, "device timeout\n");
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else if (bootverbose)
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device_printf(sc->sc_dev, "device timeout (no link)\n");
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++ifp->if_oerrors;
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if_inc_counter(ifp, IFCOUNTER_OERRORS, 1);
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/* Try to get more packets going. */
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ifp->if_drv_flags &= ~IFF_DRV_RUNNING;
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