Fix bugs with operand ordering and unnecessary sync/eieio ops. Mostly
obtained from Alpha atomic.h Approved by: Benno
This commit is contained in:
Peter Grehan
parent
add0e67094
commit
8e9238c604
@ -53,15 +53,16 @@ atomic_set_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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#ifdef __GNUC__
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__asm __volatile (
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"1:\tlwarx %0, 0, %1\n\t" /* load old value */
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"or %0, %0, %2\n\t" /* calculate new value */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"or %0, %3, %0\n\t" /* calculate new value */
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"stwcx. %0, 0, %2\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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"eieio\n" /* drain to memory */
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: "=&r" (temp)
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: "=&r" (temp), "+m" (*p)
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: "r" (p), "r" (v)
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: "memory");
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: "cc", "memory");
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#endif
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}
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static __inline void
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@ -69,15 +70,16 @@ atomic_clear_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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#ifdef __GNUC__
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__asm __volatile (
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"1:\tlwarx %0, 0, %1\n\t" /* load old value */
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"andc %0, %0, %2\n\t" /* calculate new value */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"andc %0, %0, %3\n\t" /* calculate new value */
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"stwcx. %0, 0, %2\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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"eieio\n" /* drain to memory */
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: "=&r" (temp)
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: "=&r" (temp), "+m" (*p)
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: "r" (p), "r" (v)
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: "memory");
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: "cc", "memory");
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#endif
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}
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static __inline void
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@ -85,15 +87,16 @@ atomic_add_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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#ifdef __GNUC__
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__asm __volatile (
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"1:\tlwarx %0, 0, %1\n\t" /* load old value */
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"add %0, %0, %2\n\t" /* calculate new value */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"add %0, %3, %0\n\t" /* calculate new value */
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"stwcx. %0, 0, %2\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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"eieio\n" /* Old McDonald had a farm */
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: "=&r" (temp)
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: "=&r" (temp), "+m" (*p)
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: "r" (p), "r" (v)
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: "memory");
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: "cc", "memory");
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#endif
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}
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static __inline void
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@ -101,15 +104,16 @@ atomic_subtract_32(volatile u_int32_t *p, u_int32_t v)
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{
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u_int32_t temp;
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#ifdef __GNUC__
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__asm __volatile (
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"1:\tlwarx %0, 0, %1\n\t" /* load old value */
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"sub %0, %2, %0\n\t" /* calculate new value */
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"stwcx. %0, 0, %1\n\t" /* attempt to store */
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"subf %0, %3, %0\n\t" /* calculate new value */
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"stwcx. %0, 0, %2\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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"eieio\n" /* drain to memory */
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: "=&r" (temp)
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: "=&r" (temp), "+m" (*p)
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: "r" (p), "r" (v)
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: "memory");
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: "cc", "memory");
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#endif
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}
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static __inline u_int32_t
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@ -117,18 +121,19 @@ atomic_readandclear_32(volatile u_int32_t *addr)
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{
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u_int32_t result,temp;
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#ifdef __GNUC__
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__asm __volatile (
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"\teieio\n" /* memory barrier */
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"\tsync\n" /* drain writes */
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"1:\tlwarx %0, 0, %3\n\t" /* load old value */
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"li %1, 0\n\t" /* load new value */
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"stwcx. %1, 0, %2\n\t" /* attempt to store */
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"stwcx. %1, 0, %3\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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"eieio\n" /* drain to memory */
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: "=&r"(result), "=&r"(temp)
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: "r"(addr)
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: "memory");
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: "=&r"(result), "=&r"(temp), "+m" (*addr)
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: "r" (addr)
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: "cc", "memory");
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#endif
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return result;
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return (result);
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}
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#if 0
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@ -237,29 +242,29 @@ atomic_readandclear_64(volatile u_int64_t *addr)
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static __inline void \
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atomic_##NAME##_acq_##WIDTH(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v) \
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{ \
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powerpc_mb(); \
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atomic_##NAME##_##WIDTH(p, v); \
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powerpc_mb(); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_##WIDTH(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v) \
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{ \
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atomic_##NAME##_##WIDTH(p, v); \
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powerpc_mb(); \
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atomic_##NAME##_##WIDTH(p, v); \
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} \
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\
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static __inline void \
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atomic_##NAME##_acq_##TYPE(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v) \
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{ \
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powerpc_mb(); \
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atomic_##NAME##_##WIDTH(p, v); \
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powerpc_mb(); \
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} \
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\
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static __inline void \
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atomic_##NAME##_rel_##TYPE(volatile u_int##WIDTH##_t *p, u_int##WIDTH##_t v) \
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{ \
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atomic_##NAME##_##WIDTH(p, v); \
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powerpc_mb(); \
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atomic_##NAME##_##WIDTH(p, v); \
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}
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ATOMIC_ACQ_REL(set, 8, char)
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@ -293,28 +298,35 @@ ATOMIC_ACQ_REL(subtract, 32, int)
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static __inline u_##TYPE \
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atomic_load_acq_##WIDTH(volatile u_##TYPE *p) \
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{ \
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u_##TYPE v; \
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\
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v = *p; \
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powerpc_mb(); \
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return (*p); \
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return (v); \
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} \
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\
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static __inline void \
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atomic_store_rel_##WIDTH(volatile u_##TYPE *p, u_##TYPE v) \
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{ \
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*p = v; \
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powerpc_mb(); \
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*p = v; \
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} \
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\
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static __inline u_##TYPE \
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atomic_load_acq_##TYPE(volatile u_##TYPE *p) \
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{ \
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u_##TYPE v; \
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\
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v = *p; \
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powerpc_mb(); \
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return (*p); \
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return (v); \
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} \
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\
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static __inline void \
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atomic_store_rel_##TYPE(volatile u_##TYPE *p, u_##TYPE v) \
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{ \
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*p = v; \
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powerpc_mb(); \
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*p = v; \
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}
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ATOMIC_STORE_LOAD(char, 8)
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@ -336,24 +348,25 @@ atomic_cmpset_32(volatile u_int32_t* p, u_int32_t cmpval, u_int32_t newval)
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{
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u_int32_t ret;
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#ifdef __GNUC__
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__asm __volatile (
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"1:\tlwarx %0, 0, %3\n\t" /* load old value */
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"cmplw 0, %1, %0\n\t" /* compare */
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"1:\tlwarx %0, 0, %2\n\t" /* load old value */
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"cmplw %3, %0\n\t" /* compare */
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"bne 2f\n\t" /* exit if not equal */
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"mr %0, %2\n\t" /* value to store */
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"stwcx. %0, 0, %3\n\t" /* attempt to store */
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"stwcx. %4, 0, %2\n\t" /* attempt to store */
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"bne- 1b\n\t" /* spin if failed */
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"eieio\n" /* memory barrier */
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"sync\n"
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"li %0, 1\n\t" /* success - retval = 1 */
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"b 3f\n\t" /* we've succeeded */
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"2:\t\n"
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"xor %0,%0,%0\t\n" /* failure, so return 0 */
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"3:\t\n"
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: "=&r" (ret)
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: "r" (cmpval), "r" (newval), "r" (p)
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: "memory");
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"2:\n\t"
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"stwcx. %0, 0, %2\n\t" /* clear reservation (74xx) */
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"li %0, 0\n\t" /* failure - retval = 0 */
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"3:\n\t"
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: "=&r" (ret), "+m" (*p)
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: "r" (p), "r" (cmpval), "r" (newval)
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: "cc", "memory");
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#endif
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return ret;
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return (ret);
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}
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#if 0
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@ -395,14 +408,6 @@ atomic_cmpset_ptr(volatile void *dst, void *exp, void *src)
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static __inline u_int32_t
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atomic_cmpset_acq_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
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{
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powerpc_mb();
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return (atomic_cmpset_32(p, cmpval, newval));
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}
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static __inline u_int32_t
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atomic_cmpset_rel_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
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{
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int retval;
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@ -411,6 +416,13 @@ atomic_cmpset_rel_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
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return (retval);
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}
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static __inline u_int32_t
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atomic_cmpset_rel_32(volatile u_int32_t *p, u_int32_t cmpval, u_int32_t newval)
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{
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powerpc_mb();
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return (atomic_cmpset_32(p, cmpval, newval));
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}
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#define atomic_cmpset_acq_int atomic_cmpset_acq_32
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#define atomic_cmpset_rel_int atomic_cmpset_rel_32
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#define atomic_cmpset_acq_long atomic_cmpset_acq_32
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