For IP1001 PHYs, read auto-negotiation advertisement register to

get default next page configuration. While I'm here explicitly set
IP1000PHY_ANAR_CSMA bit. This bit is read-only and always set
by hardware so setting it has no effect but it would clear the
intention. With this change controllers that couldn't establish
1000baseT link should work.

PR:	kern/130846
This commit is contained in:
Pyun YongHyeon 2009-03-09 08:17:46 +00:00
parent 34e4a32dc0
commit 8fc8651306
2 changed files with 13 additions and 6 deletions

View File

@ -391,18 +391,24 @@ ip1000phy_status(struct mii_softc *sc)
}
static int
ip1000phy_mii_phy_auto(struct mii_softc *mii)
ip1000phy_mii_phy_auto(struct mii_softc *sc)
{
struct ip1000phy_softc *isc;
uint32_t reg;
PHY_WRITE(mii, IP1000PHY_MII_ANAR,
IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX |
isc = (struct ip1000phy_softc *)sc;
reg = 0;
if (isc->model == MII_MODEL_ICPLUS_IP1001)
reg = PHY_READ(sc, IP1000PHY_MII_ANAR);
reg |= IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX |
IP1000PHY_ANAR_100TX | IP1000PHY_ANAR_100TX_FDX |
IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE);
IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE;
PHY_WRITE(sc, IP1000PHY_MII_ANAR, reg | IP1000PHY_ANAR_CSMA);
reg = IP1000PHY_1000CR_1000T | IP1000PHY_1000CR_1000T_FDX;
reg |= IP1000PHY_1000CR_MASTER;
PHY_WRITE(mii, IP1000PHY_MII_1000CR, reg);
PHY_WRITE(mii, IP1000PHY_MII_BMCR, (IP1000PHY_BMCR_FDX |
PHY_WRITE(sc, IP1000PHY_MII_1000CR, reg);
PHY_WRITE(sc, IP1000PHY_MII_BMCR, (IP1000PHY_BMCR_FDX |
IP1000PHY_BMCR_AUTOEN | IP1000PHY_BMCR_STARTNEG));
return (EJUSTRETURN);

View File

@ -61,6 +61,7 @@
/* Autonegotiation advertisement register */
#define IP1000PHY_MII_ANAR 0x04
#define IP1000PHY_ANAR_CSMA 0x0001
#define IP1000PHY_ANAR_10T 0x0020
#define IP1000PHY_ANAR_10T_FDX 0x0040
#define IP1000PHY_ANAR_100TX 0x0080