For IP1001 PHYs, read auto-negotiation advertisement register to
get default next page configuration. While I'm here explicitly set IP1000PHY_ANAR_CSMA bit. This bit is read-only and always set by hardware so setting it has no effect but it would clear the intention. With this change controllers that couldn't establish 1000baseT link should work. PR: kern/130846
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@ -391,18 +391,24 @@ ip1000phy_status(struct mii_softc *sc)
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}
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static int
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ip1000phy_mii_phy_auto(struct mii_softc *mii)
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ip1000phy_mii_phy_auto(struct mii_softc *sc)
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{
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struct ip1000phy_softc *isc;
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uint32_t reg;
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PHY_WRITE(mii, IP1000PHY_MII_ANAR,
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IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX |
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isc = (struct ip1000phy_softc *)sc;
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reg = 0;
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if (isc->model == MII_MODEL_ICPLUS_IP1001)
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reg = PHY_READ(sc, IP1000PHY_MII_ANAR);
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reg |= IP1000PHY_ANAR_10T | IP1000PHY_ANAR_10T_FDX |
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IP1000PHY_ANAR_100TX | IP1000PHY_ANAR_100TX_FDX |
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IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE);
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IP1000PHY_ANAR_PAUSE | IP1000PHY_ANAR_APAUSE;
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PHY_WRITE(sc, IP1000PHY_MII_ANAR, reg | IP1000PHY_ANAR_CSMA);
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reg = IP1000PHY_1000CR_1000T | IP1000PHY_1000CR_1000T_FDX;
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reg |= IP1000PHY_1000CR_MASTER;
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PHY_WRITE(mii, IP1000PHY_MII_1000CR, reg);
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PHY_WRITE(mii, IP1000PHY_MII_BMCR, (IP1000PHY_BMCR_FDX |
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PHY_WRITE(sc, IP1000PHY_MII_1000CR, reg);
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PHY_WRITE(sc, IP1000PHY_MII_BMCR, (IP1000PHY_BMCR_FDX |
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IP1000PHY_BMCR_AUTOEN | IP1000PHY_BMCR_STARTNEG));
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return (EJUSTRETURN);
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@ -61,6 +61,7 @@
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/* Autonegotiation advertisement register */
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#define IP1000PHY_MII_ANAR 0x04
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#define IP1000PHY_ANAR_CSMA 0x0001
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#define IP1000PHY_ANAR_10T 0x0020
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#define IP1000PHY_ANAR_10T_FDX 0x0040
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#define IP1000PHY_ANAR_100TX 0x0080
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