SIS_CFG_EDB_MASTER_EN indicates the EDB bus is used instead of
the PCI bus. When this bit is set, the Max DMA Burst Size for TX/RX DMA should be no larger than 64 bytes. Reviewed by: luoqi Obtained from: (idea from linux driver source) MFC after: 2 weeks
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@ -1806,8 +1806,16 @@ sis_init(xsc)
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CSR_WRITE_4(sc, SIS_RX_LISTPTR, sc->sis_cdata.sis_rx_paddr);
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CSR_WRITE_4(sc, SIS_TX_LISTPTR, sc->sis_cdata.sis_tx_paddr);
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/* Set RX configuration */
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CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG);
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/* SIS_CFG_EDB_MASTER_EN indicates the EDB bus is used instead of
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* the PCI bus. When this bit is set, the Max DMA Burst Size
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* for TX/RX DMA should be no larger than 16 double words.
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*/
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if (CSR_READ_4(sc, SIS_CFG) & SIS_CFG_EDB_MASTER_EN) {
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CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG64);
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} else {
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CSR_WRITE_4(sc, SIS_RX_CFG, SIS_RXCFG256);
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}
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/* Accept Long Packets for VLAN support */
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SIS_SETBIT(sc, SIS_RX_CFG, SIS_RXCFG_RX_JABBER);
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@ -114,6 +114,7 @@
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#define SIS_CFG_OUTOFWIN_TIMER 0x00000020
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#define SIS_CFG_SINGLE_BACKOFF 0x00000040
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#define SIS_CFG_PCIREQ_ALG 0x00000080
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#define SIS_CFG_EDB_MASTER_EN 0x00002000
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#define SIS_EECTL_DIN 0x00000001
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#define SIS_EECTL_DOUT 0x00000002
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@ -247,8 +248,10 @@
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#define SIS_RXDMA_128BYTES 0x00600000
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#define SIS_RXDMA_256BYTES 0x00700000
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#define SIS_RXCFG \
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#define SIS_RXCFG256 \
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(SIS_RXCFG_DRAIN(64)|SIS_RXDMA_256BYTES)
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#define SIS_RXCFG64 \
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(SIS_RXCFG_DRAIN(64)|SIS_RXDMA_64BYTES)
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#define SIS_RXFILTCTL_ADDR 0x000F0000
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#define NS_RXFILTCTL_MCHASH 0x00200000
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