From the submitter:
CPU_WT_ALLOC does not work correctly for K6-2s of model 8+ and probably K6-3s (when they appear on the market soon). In addition, print_AMD_info() incorrectly printfs write allocation's size. I've fixed them, so they now Do The Right Thing, and added a "NO_MEMORY_HOLE" option to easily allow 15-16mb range handling for us K6 and K6-2 users. Submitted by: Brian Feldman <green@unixhelp.org>
This commit is contained in:
Mike Smith
parent
96d5e20872
commit
925f368193
@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.52 1998/10/06 13:16:23 kato Exp $
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* $Id: identcpu.c,v 1.53 1998/12/05 16:30:55 kato Exp $
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*/
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#include "opt_cpu.h"
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@ -68,6 +68,7 @@ void earlysetcpuclass(void);
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#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
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void enable_K5_wt_alloc(void);
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void enable_K6_wt_alloc(void);
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void enable_K6_2_wt_alloc(void);
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#endif
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void panicifcpuunsupported(void);
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static void identifycyrix(void);
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@ -291,9 +292,11 @@ printcpuinfo(void)
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if ((cpu_id & 0xf00) == 0x500) {
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if (((cpu_id & 0x0f0) > 0)
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&& ((cpu_id & 0x0f0) < 0x60)
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&& ((cpu_id & 0x00f) > 3)) {
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&& ((cpu_id & 0x00f) > 3))
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enable_K5_wt_alloc();
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} else if ((cpu_id & 0x0f0) > 0x50)
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else if ((cpu_id & 0x0f0) > 0x70)
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enable_K6_2_wt_alloc();
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else if ((cpu_id & 0x0f0) > 0x50)
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enable_K6_wt_alloc();
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}
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#endif
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@ -860,19 +863,29 @@ print_AMD_info(void)
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switch (cpu_id & 0xFF0) {
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case 0x560: /* K6 0.35u */
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case 0x570: /* K6 0.25u */
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case 0x580: /* K6-2 */
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case 0x590: /* K6-3 */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & 0x00fe)) {
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printf("Write Allocate Disable\n");
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} else {
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printf("Write Allocate Enable Limit: %dM bytes\n",
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(u_int32_t)(amd_whcr & 0x00fe) * 2);
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(u_int32_t)(amd_whcr & 0x00fe) * 4);
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & 0x0001) ? "Enable" : "Disable");
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printf("Hardware Write Allocate Control: %s\n",
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(amd_whcr & 0x0100) ? "Enable" : "Disable");
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}
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break;
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case 0x580: /* K6-2 */
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case 0x590: /* K6-3 */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & (0x3ff << 22))) {
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printf("Write Allocate Disable\n");
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} else {
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printf("Write Allocate Enable Limit: %dM bytes\n",
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(u_int32_t)((amd_whcr & (0x3ff << 22)) >> 22) * 4);
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & (1 << 16)) ? "Enable" : "Disable");
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}
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break;
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}
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}
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* $Id: initcpu.c,v 1.14 1998/10/06 13:16:23 kato Exp $
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* $Id: initcpu.c,v 1.15 1998/12/14 06:16:13 dillon Exp $
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*/
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#include "opt_cpu.h"
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@ -44,6 +44,7 @@ void initializecpu(void);
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#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
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void enable_K5_wt_alloc(void);
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void enable_K6_wt_alloc(void);
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void enable_K6_2_wt_alloc(void);
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#endif
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#ifdef I486_CPU
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@ -628,8 +629,9 @@ enable_K6_wt_alloc(void)
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whcr &= ~0x00feLL;
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whcr |= (size << 1);
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#ifdef PC98
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#if defined(PC98) || defined(NO_MEMORY_HOLE)
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if (whcr & 0x00feLL) {
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#ifdef PC98
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/*
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* If bit 2 of port 0x43b is 0, disable wrte allocate for the
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* 15-16M range.
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@ -637,6 +639,7 @@ enable_K6_wt_alloc(void)
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if (!(inb(0x43b) & 4))
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whcr &= ~0x0001LL;
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else
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#endif
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whcr |= 0x0001LL;
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}
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#else
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@ -644,7 +647,68 @@ enable_K6_wt_alloc(void)
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* There is no way to know wheter 15-16M hole exists or not.
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* Therefore, we disable write allocate for this range.
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*/
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whcr &= 0x00feLL;
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whcr &= ~0x0001LL;
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#endif
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wrmsr(0x0c0000082, whcr);
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write_eflags(eflags);
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enable_intr();
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}
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void
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enable_K6_2_wt_alloc(void)
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{
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quad_t size;
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u_int64_t whcr;
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u_long eflags;
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eflags = read_eflags();
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disable_intr();
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wbinvd();
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#ifdef CPU_DISABLE_CACHE
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/*
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* Certain K6-2 box becomes unstable when write allocation is
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* enabled.
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*/
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/*
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* The AMD-K6 processer provides the 64-bit Test Register 12(TR12),
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* but only the Cache Inhibit(CI) (bit 3 of TR12) is suppported.
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* All other bits in TR12 have no effect on the processer's operation.
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* The I/O Trap Restart function (bit 9 of TR12) is always enabled
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* on the AMD-K6.
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*/
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wrmsr(0x0000000e, (u_int64_t)0x0008);
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#endif
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/* Don't assume that memory size is aligned with 4M. */
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if (Maxmem > 0)
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size = ((Maxmem >> 8) + 3) >> 2;
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else
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size = 0;
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/* Limit is 4092M bytes. */
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size &= 0x3ff;
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whcr = (rdmsr(0xc0000082) & ~(0x3ffLL << 22)) | (size << 22);
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#if defined(PC98) || defined(NO_MEMORY_HOLE)
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if (whcr & (0x3ffLL << 22)) {
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#ifdef PC98
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/*
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* If bit 2 of port 0x43b is 0, disable wrte allocate for the
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* 15-16M range.
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*/
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if (!(inb(0x43b) & 4))
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whcr &= ~(1LL << 16);
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else
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#endif
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whcr |= 1LL << 16;
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}
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#else
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/*
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* There is no way to know wheter 15-16M hole exists or not.
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* Therefore, we disable write allocate for this range.
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*/
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whcr &= ~(1LL << 16);
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#endif
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wrmsr(0x0c0000082, whcr);
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@ -2,7 +2,7 @@
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# LINT -- config file for checking all the sources, tries to pull in
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# as much of the source tree as it can.
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#
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# $Id: LINT,v 1.520 1998/12/27 19:51:34 phk Exp $
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# $Id: LINT,v 1.521 1998/12/27 21:46:55 phk Exp $
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#
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# NB: You probably don't want to try running a kernel built from this
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# file. Instead, you should start from GENERIC, and add options from
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@ -178,6 +178,10 @@ cpu "I686_CPU" # aka Pentium Pro(tm)
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# executed. This should be included for ALL kernels that won't run
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# on a Pentium.
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#
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# NO_MEMORY_HOLE is an optimisation for systems with AMD K6 processors
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# which indicates that the 15-16MB range is *definitely* not being
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# occupied by an ISA memory hole.
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#
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# NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT,
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# CPU_LOOP_ENand CPU_RSTK_EN should not be used becasue of CPU bugs.
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# These options may crash your system.
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@ -1,4 +1,4 @@
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# $Id: options.i386,v 1.98 1998/12/27 14:21:08 sos Exp $
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# $Id: options.i386,v 1.99 1998/12/27 21:46:55 phk Exp $
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DISABLE_PSE
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IDE_DELAY
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@ -56,6 +56,7 @@ CPU_UPGRADE_HW_CACHE opt_cpu.h
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CPU_WT_ALLOC opt_cpu.h
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CYRIX_CACHE_WORKS opt_cpu.h
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CYRIX_CACHE_REALLY_WORKS opt_cpu.h
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NO_MEMORY_HOLE opt_cpu.h
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# The CPU type affects the endian conversion functions all over the kernel.
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I386_CPU opt_global.h
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@ -2,7 +2,7 @@
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# LINT -- config file for checking all the sources, tries to pull in
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# as much of the source tree as it can.
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#
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# $Id: LINT,v 1.520 1998/12/27 19:51:34 phk Exp $
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# $Id: LINT,v 1.521 1998/12/27 21:46:55 phk Exp $
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#
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# NB: You probably don't want to try running a kernel built from this
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# file. Instead, you should start from GENERIC, and add options from
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@ -178,6 +178,10 @@ cpu "I686_CPU" # aka Pentium Pro(tm)
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# executed. This should be included for ALL kernels that won't run
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# on a Pentium.
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#
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# NO_MEMORY_HOLE is an optimisation for systems with AMD K6 processors
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# which indicates that the 15-16MB range is *definitely* not being
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# occupied by an ISA memory hole.
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#
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# NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT,
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# CPU_LOOP_ENand CPU_RSTK_EN should not be used becasue of CPU bugs.
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# These options may crash your system.
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@ -2,7 +2,7 @@
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# LINT -- config file for checking all the sources, tries to pull in
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# as much of the source tree as it can.
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#
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# $Id: LINT,v 1.520 1998/12/27 19:51:34 phk Exp $
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# $Id: LINT,v 1.521 1998/12/27 21:46:55 phk Exp $
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#
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# NB: You probably don't want to try running a kernel built from this
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# file. Instead, you should start from GENERIC, and add options from
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@ -178,6 +178,10 @@ cpu "I686_CPU" # aka Pentium Pro(tm)
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# executed. This should be included for ALL kernels that won't run
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# on a Pentium.
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#
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# NO_MEMORY_HOLE is an optimisation for systems with AMD K6 processors
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# which indicates that the 15-16MB range is *definitely* not being
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# occupied by an ISA memory hole.
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#
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# NOTE 1: The options, CPU_BTB_EN, CPU_LOOP_EN, CPU_IORT,
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# CPU_LOOP_ENand CPU_RSTK_EN should not be used becasue of CPU bugs.
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# These options may crash your system.
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@ -1,4 +1,4 @@
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# $Id: options.i386,v 1.98 1998/12/27 14:21:08 sos Exp $
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# $Id: options.i386,v 1.99 1998/12/27 21:46:55 phk Exp $
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DISABLE_PSE
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IDE_DELAY
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@ -56,6 +56,7 @@ CPU_UPGRADE_HW_CACHE opt_cpu.h
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CPU_WT_ALLOC opt_cpu.h
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CYRIX_CACHE_WORKS opt_cpu.h
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CYRIX_CACHE_REALLY_WORKS opt_cpu.h
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NO_MEMORY_HOLE opt_cpu.h
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# The CPU type affects the endian conversion functions all over the kernel.
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I386_CPU opt_global.h
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@ -36,7 +36,7 @@
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* SUCH DAMAGE.
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*
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* from: Id: machdep.c,v 1.193 1996/06/18 01:22:04 bde Exp
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* $Id: identcpu.c,v 1.52 1998/10/06 13:16:23 kato Exp $
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* $Id: identcpu.c,v 1.53 1998/12/05 16:30:55 kato Exp $
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*/
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#include "opt_cpu.h"
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@ -68,6 +68,7 @@ void earlysetcpuclass(void);
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#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
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void enable_K5_wt_alloc(void);
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void enable_K6_wt_alloc(void);
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void enable_K6_2_wt_alloc(void);
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#endif
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void panicifcpuunsupported(void);
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static void identifycyrix(void);
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@ -291,9 +292,11 @@ printcpuinfo(void)
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if ((cpu_id & 0xf00) == 0x500) {
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if (((cpu_id & 0x0f0) > 0)
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&& ((cpu_id & 0x0f0) < 0x60)
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&& ((cpu_id & 0x00f) > 3)) {
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&& ((cpu_id & 0x00f) > 3))
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enable_K5_wt_alloc();
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} else if ((cpu_id & 0x0f0) > 0x50)
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else if ((cpu_id & 0x0f0) > 0x70)
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enable_K6_2_wt_alloc();
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else if ((cpu_id & 0x0f0) > 0x50)
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enable_K6_wt_alloc();
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}
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#endif
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@ -860,19 +863,29 @@ print_AMD_info(void)
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switch (cpu_id & 0xFF0) {
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case 0x560: /* K6 0.35u */
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case 0x570: /* K6 0.25u */
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case 0x580: /* K6-2 */
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case 0x590: /* K6-3 */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & 0x00fe)) {
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printf("Write Allocate Disable\n");
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} else {
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printf("Write Allocate Enable Limit: %dM bytes\n",
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(u_int32_t)(amd_whcr & 0x00fe) * 2);
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(u_int32_t)(amd_whcr & 0x00fe) * 4);
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & 0x0001) ? "Enable" : "Disable");
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printf("Hardware Write Allocate Control: %s\n",
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(amd_whcr & 0x0100) ? "Enable" : "Disable");
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}
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break;
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case 0x580: /* K6-2 */
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case 0x590: /* K6-3 */
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amd_whcr = rdmsr(0xc0000082);
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if (!(amd_whcr & (0x3ff << 22))) {
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printf("Write Allocate Disable\n");
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} else {
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printf("Write Allocate Enable Limit: %dM bytes\n",
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(u_int32_t)((amd_whcr & (0x3ff << 22)) >> 22) * 4);
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printf("Write Allocate 15-16M bytes: %s\n",
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(amd_whcr & (1 << 16)) ? "Enable" : "Disable");
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}
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break;
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}
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}
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@ -26,7 +26,7 @@
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
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* $Id: initcpu.c,v 1.14 1998/10/06 13:16:23 kato Exp $
|
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* $Id: initcpu.c,v 1.15 1998/12/14 06:16:13 dillon Exp $
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*/
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#include "opt_cpu.h"
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@ -44,6 +44,7 @@ void initializecpu(void);
|
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#if defined(I586_CPU) && defined(CPU_WT_ALLOC)
|
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void enable_K5_wt_alloc(void);
|
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void enable_K6_wt_alloc(void);
|
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void enable_K6_2_wt_alloc(void);
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#endif
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|
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#ifdef I486_CPU
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@ -628,8 +629,9 @@ enable_K6_wt_alloc(void)
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whcr &= ~0x00feLL;
|
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whcr |= (size << 1);
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#ifdef PC98
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#if defined(PC98) || defined(NO_MEMORY_HOLE)
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if (whcr & 0x00feLL) {
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#ifdef PC98
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/*
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* If bit 2 of port 0x43b is 0, disable wrte allocate for the
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* 15-16M range.
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@ -637,6 +639,7 @@ enable_K6_wt_alloc(void)
|
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if (!(inb(0x43b) & 4))
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whcr &= ~0x0001LL;
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else
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#endif
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whcr |= 0x0001LL;
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}
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#else
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@ -644,7 +647,68 @@ enable_K6_wt_alloc(void)
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* There is no way to know wheter 15-16M hole exists or not.
|
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* Therefore, we disable write allocate for this range.
|
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*/
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whcr &= 0x00feLL;
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whcr &= ~0x0001LL;
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#endif
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wrmsr(0x0c0000082, whcr);
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write_eflags(eflags);
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enable_intr();
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}
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|
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void
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enable_K6_2_wt_alloc(void)
|
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{
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quad_t size;
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u_int64_t whcr;
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u_long eflags;
|
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|
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eflags = read_eflags();
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disable_intr();
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wbinvd();
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|
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#ifdef CPU_DISABLE_CACHE
|
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/*
|
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* Certain K6-2 box becomes unstable when write allocation is
|
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* enabled.
|
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*/
|
||||
/*
|
||||
* The AMD-K6 processer provides the 64-bit Test Register 12(TR12),
|
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* but only the Cache Inhibit(CI) (bit 3 of TR12) is suppported.
|
||||
* All other bits in TR12 have no effect on the processer's operation.
|
||||
* The I/O Trap Restart function (bit 9 of TR12) is always enabled
|
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* on the AMD-K6.
|
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*/
|
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wrmsr(0x0000000e, (u_int64_t)0x0008);
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#endif
|
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/* Don't assume that memory size is aligned with 4M. */
|
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if (Maxmem > 0)
|
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size = ((Maxmem >> 8) + 3) >> 2;
|
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else
|
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size = 0;
|
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|
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/* Limit is 4092M bytes. */
|
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size &= 0x3ff;
|
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whcr = (rdmsr(0xc0000082) & ~(0x3ffLL << 22)) | (size << 22);
|
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|
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#if defined(PC98) || defined(NO_MEMORY_HOLE)
|
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if (whcr & (0x3ffLL << 22)) {
|
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#ifdef PC98
|
||||
/*
|
||||
* If bit 2 of port 0x43b is 0, disable wrte allocate for the
|
||||
* 15-16M range.
|
||||
*/
|
||||
if (!(inb(0x43b) & 4))
|
||||
whcr &= ~(1LL << 16);
|
||||
else
|
||||
#endif
|
||||
whcr |= 1LL << 16;
|
||||
}
|
||||
#else
|
||||
/*
|
||||
* There is no way to know wheter 15-16M hole exists or not.
|
||||
* Therefore, we disable write allocate for this range.
|
||||
*/
|
||||
whcr &= ~(1LL << 16);
|
||||
#endif
|
||||
wrmsr(0x0c0000082, whcr);
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user