Add initial support for the AR9485 CUS198 / CUS230 variants.
These variants have a few differences from the default AR9485 NIC, namely: * a non-default antenna switch config; * slightly different RX gain table setup; * an external XLNA hooked up to a GPIO pin; * (and not yet done) RSSI threshold differences when doing slow diversity. To make this possible: * Add the PCI device list from Linux ath9k, complete with vendor and sub-vendor IDs for various things to be enabled; * .. and until FreeBSD learns about a PCI device list like this, write a search function inspired by the USB device enumeration code; * add HAL_OPS_CONFIG to the HAL attach methods; the HAL can use this to initialise its local driver parameters upon attach; * copy these parameters over in the AR9300 HAL; * don't default to override the antenna switch - only do it for the chips that require it; * I brought over ar9300_attenuation_apply() from ath9k which is cleaner and easier to read for this particular NIC. This is a work in progress. I'm worried that there's some post-AR9380 NIC out there which doesn't work without the antenna override set as I currently haven't implemented bluetooth coexistence for the AR9380 and later HAL. But I'd rather have this code in the tree and fix it up before 11.0-RELEASE happens versus having a set of newer NICs in laptops be effectively RX deaf. Tested: * AR9380 (STA) * AR9485 CUS198 (STA) Obtained from: Qualcomm Atheros, Linux ath9k
This commit is contained in:
parent
c1efb88730
commit
9389d5a95e
sys
contrib/dev/ath/ath_hal/ar9300
dev/ath
@ -1181,10 +1181,11 @@ struct ath_hal;
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extern struct ath_hal_9300 * ar9300_new_state(u_int16_t devid,
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HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_OPS_CONFIG *ah_config,
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HAL_STATUS *status);
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extern struct ath_hal * ar9300_attach(u_int16_t devid,
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HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_STATUS *status);
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HAL_OPS_CONFIG *ah_config, HAL_STATUS *status);
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extern void ar9300_detach(struct ath_hal *ah);
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extern void ar9300_read_revisions(struct ath_hal *ah);
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extern HAL_BOOL ar9300_chip_test(struct ath_hal *ah);
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@ -618,7 +618,8 @@ ar9300_read_revisions(struct ath_hal *ah)
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*/
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struct ath_hal *
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ar9300_attach(u_int16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st,
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HAL_BUS_HANDLE sh, uint16_t *eepromdata, HAL_STATUS *status)
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HAL_BUS_HANDLE sh, uint16_t *eepromdata, HAL_OPS_CONFIG *ah_config,
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HAL_STATUS *status)
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{
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struct ath_hal_9300 *ahp;
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struct ath_hal *ah;
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@ -628,7 +629,7 @@ ar9300_attach(u_int16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st,
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HAL_NO_INTERSPERSED_READS;
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/* NB: memory is returned zero'd */
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ahp = ar9300_new_state(devid, sc, st, sh, eepromdata, status);
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ahp = ar9300_new_state(devid, sc, st, sh, eepromdata, ah_config, status);
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if (ahp == AH_NULL) {
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return AH_NULL;
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}
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@ -654,12 +655,6 @@ ar9300_attach(u_int16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st,
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/* XXX FreeBSD: enable RX mitigation */
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ah->ah_config.ath_hal_intr_mitigation_rx = 1;
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/*
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* XXX what's this do? Check in the qcamain driver code
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* as to what it does.
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*/
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ah->ah_config.ath_hal_ext_atten_margin_cfg = 0;
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/* interrupt mitigation */
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#ifdef AR5416_INT_MITIGATION
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if (ah->ah_config.ath_hal_intr_mitigation_rx != 0) {
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@ -2378,7 +2373,9 @@ ar9300_detach(struct ath_hal *ah)
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struct ath_hal_9300 *
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ar9300_new_state(u_int16_t devid, HAL_SOFTC sc,
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh,
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uint16_t *eepromdata, HAL_STATUS *status)
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uint16_t *eepromdata,
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HAL_OPS_CONFIG *ah_config,
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HAL_STATUS *status)
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{
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static const u_int8_t defbssidmask[IEEE80211_ADDR_LEN] =
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{ 0xff, 0xff, 0xff, 0xff, 0xff, 0xff };
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@ -2430,7 +2427,7 @@ ar9300_new_state(u_int16_t devid, HAL_SOFTC sc,
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** Initialize factory defaults in the private space
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*/
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// ath_hal_factory_defaults(AH_PRIVATE(ah), hal_conf_parm);
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ar9300_config_defaults_freebsd(ah);
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ar9300_config_defaults_freebsd(ah, ah_config);
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/* XXX FreeBSD: cal is always in EEPROM */
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#if 0
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@ -2456,6 +2453,7 @@ ar9300_new_state(u_int16_t devid, HAL_SOFTC sc,
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AH_PRIVATE(ah)->ah_tpScale = HAL_TP_SCALE_MAX; /* no scaling */
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ahp->ah_atim_window = 0; /* [0..1000] */
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ahp->ah_diversity_control =
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ah->ah_config.ath_hal_diversity_control;
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ahp->ah_antenna_switch_swap =
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@ -3835,6 +3833,11 @@ ar9300_ant_div_comb_get_config(struct ath_hal *ah,
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} else {
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div_comb_conf->antdiv_configgroup = DEFAULT_ANTDIV_CONFIG_GROUP;
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}
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/*
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* XXX TODO: allow the HAL to override the rssithres and fast_div_bias
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* values (eg CUS198.)
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*/
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}
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void
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@ -1606,6 +1606,7 @@ HAL_BOOL ar9300_ant_ctrl_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
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if ( AR_SREV_POSEIDON(ah) && (ahp->ah_lna_div_use_bt_ant_enable == TRUE) ) {
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value &= ~AR_SWITCH_TABLE_COM2_ALL;
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value |= ah->ah_config.ath_hal_ant_ctrl_comm2g_switch_enable;
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HALDEBUG(ah, HAL_DEBUG_RESET, "%s: com2=0x%08x\n", __func__, value)
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}
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#endif /* ATH_ANT_DIV_COMB */
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OS_REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value);
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@ -1711,6 +1712,8 @@ HAL_BOOL ar9300_ant_ctrl_apply(struct ath_hal *ah, HAL_BOOL is_2ghz)
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/* For WB225, need to swith ANT2 from BT to Wifi
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* This will not affect HB125 LNA diversity feature.
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*/
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HALDEBUG(ah, HAL_DEBUG_RESET, "%s: com2=0x%08x\n", __func__,
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ah->ah_config.ath_hal_ant_ctrl_comm2g_switch_enable)
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OS_REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL,
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ah->ah_config.ath_hal_ant_ctrl_comm2g_switch_enable);
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break;
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@ -1776,6 +1779,7 @@ ar9300_attenuation_margin_chain_get(struct ath_hal *ah, int chain,
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return 0;
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}
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#if 0
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HAL_BOOL ar9300_attenuation_apply(struct ath_hal *ah, u_int16_t channel)
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{
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u_int32_t value;
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@ -1814,6 +1818,75 @@ HAL_BOOL ar9300_attenuation_apply(struct ath_hal *ah, u_int16_t channel)
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}
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return 0;
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}
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#endif
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HAL_BOOL
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ar9300_attenuation_apply(struct ath_hal *ah, u_int16_t channel)
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{
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int i;
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uint32_t value;
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uint32_t ext_atten_reg[3] = {
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AR_PHY_EXT_ATTEN_CTL_0,
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AR_PHY_EXT_ATTEN_CTL_1,
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AR_PHY_EXT_ATTEN_CTL_2
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};
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/*
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* If it's an AR9462 and we're receiving on the second
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* chain only, set the chain 0 details from chain 1
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* calibration.
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*
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* This is from ath9k.
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*/
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if (AR_SREV_JUPITER(ah) && (AH9300(ah)->ah_rx_chainmask == 0x2)) {
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value = ar9300_attenuation_chain_get(ah, 1, channel);
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OS_REG_RMW_FIELD(ah, ext_atten_reg[0],
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB, value);
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value = ar9300_attenuation_margin_chain_get(ah, 1, channel);
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OS_REG_RMW_FIELD(ah, ext_atten_reg[0],
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN, value);
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}
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/*
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* Now, loop over the configured transmit chains and
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* load in the attenuation/margin settings as appropriate.
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*/
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for (i = 0; i < 3; i++) {
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if ((AH9300(ah)->ah_tx_chainmask & (1 << i)) == 0)
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continue;
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value = ar9300_attenuation_chain_get(ah, i, channel);
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OS_REG_RMW_FIELD(ah, ext_atten_reg[i],
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_DB,
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value);
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if (AR_SREV_POSEIDON(ah) &&
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(ar9300_rx_gain_index_get(ah) == 0) &&
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ah->ah_config.ath_hal_ext_atten_margin_cfg) {
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value = 5;
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} else {
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value = ar9300_attenuation_margin_chain_get(ah, 0,
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channel);
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}
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/*
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* I'm not sure why it's loading in this setting into
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* the chain 0 margin regardless of the current chain.
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*/
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if (ah->ah_config.ath_hal_min_gainidx)
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OS_REG_RMW_FIELD(ah,
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AR_PHY_EXT_ATTEN_CTL_0,
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN,
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value);
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OS_REG_RMW_FIELD(ah,
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ext_atten_reg[i],
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AR_PHY_EXT_ATTEN_CTL_XATTEN1_MARGIN,
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value);
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}
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return (0);
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}
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static u_int16_t ar9300_quick_drop_get(struct ath_hal *ah,
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int chain, u_int16_t channel)
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@ -254,7 +254,27 @@ ar9300_attach_freebsd_ops(struct ath_hal *ah)
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ah->ah_divLnaConfSet = ar9300_ant_div_comb_set_config;
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/* Setup HAL configuration defaults */
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/* XXX cus198 defaults from ath9k */
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/* xlna_gpio = 9 */
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/* xatten_margin_cfg = true */
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/* alt_mingainidx = true */
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/* comm2g_switch_enable = 0x000bbb88 */
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/* ant_comb.low_rssi_thresh = 20 */
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/* ant_comb.fast_div_bias = 3 */
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#if 0
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/*
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* The HAL code treats this as a mask.
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* The ath9k code above treats it as a bit offset.
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* So it should be set to 0x200, not 0x9.
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*/
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ah->ah_config.ath_hal_ext_lna_ctl_gpio = 0x200; /* bit 9 */
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ah->ah_config.ath_hal_ext_atten_margin_cfg = AH_TRUE;
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ah->ah_config.ath_hal_min_gainidx = AH_TRUE;
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ah->ah_config.ath_hal_ant_ctrl_comm2g_switch_enable = 0x000bbb88;
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/* XXX low_rssi_thresh */
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/* XXX fast_div_bias */
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#endif
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}
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HAL_BOOL
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@ -338,9 +358,11 @@ ar9300_ani_poll_freebsd(struct ath_hal *ah,
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* wants.
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*/
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void
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ar9300_config_defaults_freebsd(struct ath_hal *ah)
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ar9300_config_defaults_freebsd(struct ath_hal *ah, HAL_OPS_CONFIG *ah_config)
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{
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/* Until FreeBSD's HAL does this by default - just copy */
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OS_MEMCPY(&ah->ah_config, ah_config, sizeof(HAL_OPS_CONFIG));
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ah->ah_config.ath_hal_enable_ani = AH_TRUE;
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}
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@ -11,7 +11,8 @@ extern HAL_STATUS ar9300_eeprom_get_freebsd(struct ath_hal *, int param,
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extern HAL_BOOL ar9300_stop_tx_dma_freebsd(struct ath_hal *ah, u_int q);
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extern void ar9300_ani_poll_freebsd(struct ath_hal *ah,
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const struct ieee80211_channel *chan);
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extern void ar9300_config_defaults_freebsd(struct ath_hal *ah);
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extern void ar9300_config_defaults_freebsd(struct ath_hal *ah,
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HAL_OPS_CONFIG *ah_config);
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extern HAL_BOOL ar9300_stop_dma_receive_freebsd(struct ath_hal *ah);
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extern HAL_BOOL ar9300_get_pending_interrupts_freebsd(struct ath_hal *ah,
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HAL_INT *masked);
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@ -6151,6 +6151,7 @@ ar9300_ant_ctrl_set_lna_div_use_bt_ant(struct ath_hal *ah, HAL_BOOL enable, cons
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value &= ~AR_SWITCH_TABLE_COM2_ALL;
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value |= ah->ah_config.ath_hal_ant_ctrl_comm2g_switch_enable;
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}
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HALDEBUG(ah, HAL_DEBUG_RESET, "%s: com2=0x%08x\n", __func__, value);
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OS_REG_RMW_FIELD(ah, AR_PHY_SWITCH_COM_2, AR_SWITCH_TABLE_COM2_ALL, value);
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value = ar9300_eeprom_get(ahp, EEP_ANTDIV_control);
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@ -55,7 +55,9 @@ ath_hal_probe(uint16_t vendorid, uint16_t devid)
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*/
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struct ath_hal*
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ath_hal_attach(uint16_t devid, HAL_SOFTC sc,
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, HAL_STATUS *error)
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_OPS_CONFIG *ah_config,
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HAL_STATUS *error)
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{
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struct ath_hal_chip * const *pchip;
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@ -66,7 +68,8 @@ ath_hal_attach(uint16_t devid, HAL_SOFTC sc,
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/* XXX don't have vendorid, assume atheros one works */
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if (chip->probe(ATHEROS_VENDOR_ID, devid) == AH_NULL)
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continue;
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ah = chip->attach(devid, sc, st, sh, eepromdata, error);
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ah = chip->attach(devid, sc, st, sh, eepromdata, ah_config,
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error);
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if (ah != AH_NULL) {
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/* copy back private state to public area */
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ah->ah_devid = AH_PRIVATE(ah)->ah_devid;
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@ -1264,6 +1264,7 @@ typedef struct
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int ath_hal_show_bb_panic;
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int ath_hal_ant_ctrl_comm2g_switch_enable;
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int ath_hal_ext_atten_margin_cfg;
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int ath_hal_min_gainidx;
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int ath_hal_war70c;
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uint32_t ath_hal_mci_config;
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} HAL_OPS_CONFIG;
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@ -1616,7 +1617,8 @@ extern const char *__ahdecl ath_hal_probe(uint16_t vendorid, uint16_t devid);
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* be returned if the status parameter is non-zero.
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*/
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extern struct ath_hal * __ahdecl ath_hal_attach(uint16_t devid, HAL_SOFTC,
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HAL_BUS_TAG, HAL_BUS_HANDLE, uint16_t *eepromdata, HAL_STATUS* status);
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HAL_BUS_TAG, HAL_BUS_HANDLE, uint16_t *eepromdata,
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HAL_OPS_CONFIG *ah_config, HAL_STATUS* status);
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extern const char *ath_hal_mac_name(struct ath_hal *);
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extern const char *ath_hal_rf_name(struct ath_hal *);
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@ -91,6 +91,7 @@ struct ath_hal_chip {
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const char *(*probe)(uint16_t vendorid, uint16_t devid);
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struct ath_hal *(*attach)(uint16_t devid, HAL_SOFTC,
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HAL_BUS_TAG, HAL_BUS_HANDLE, uint16_t *eepromdata,
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HAL_OPS_CONFIG *ah,
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HAL_STATUS *error);
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};
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#ifndef AH_CHIP
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@ -183,7 +183,7 @@ static HAL_BOOL ar5210FillCapabilityInfo(struct ath_hal *ah);
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*/
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static struct ath_hal *
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ar5210Attach(uint16_t devid, HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh,
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uint16_t *eepromdata, HAL_STATUS *status)
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uint16_t *eepromdata, HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)
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{
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#define N(a) (sizeof(a)/sizeof(a[0]))
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struct ath_hal_5210 *ahp;
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@ -203,7 +203,7 @@ ar5211GetRadioRev(struct ath_hal *ah)
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static struct ath_hal *
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ar5211Attach(uint16_t devid, HAL_SOFTC sc,
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_STATUS *status)
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HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)
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{
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#define N(a) (sizeof(a)/sizeof(a[0]))
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struct ath_hal_5211 *ahp;
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@ -317,7 +317,7 @@ ar5212IsMacSupported(uint8_t macVersion, uint8_t macRev)
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static struct ath_hal *
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ar5212Attach(uint16_t devid, HAL_SOFTC sc,
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_STATUS *status)
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HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)
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{
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#define AH_EEPROM_PROTECT(ah) \
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(AH_PRIVATE(ah)->ah_ispcie)? AR_EEPROM_PROTECT_PCIE : AR_EEPROM_PROTECT)
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@ -62,7 +62,7 @@ ar5312AniSetup(struct ath_hal *ah)
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static struct ath_hal *
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ar5312Attach(uint16_t devid, HAL_SOFTC sc,
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_STATUS *status)
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HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)
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{
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struct ath_hal_5212 *ahp = AH_NULL;
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struct ath_hal *ah;
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@ -297,7 +297,7 @@ ar5416GetRadioRev(struct ath_hal *ah)
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static struct ath_hal *
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ar5416Attach(uint16_t devid, HAL_SOFTC sc,
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_STATUS *status)
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HAL_OPS_CONFIG *ah_config, HAL_STATUS *status)
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{
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struct ath_hal_5416 *ahp5416;
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struct ath_hal_5212 *ahp;
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@ -69,7 +69,9 @@ static HAL_BOOL ar9130FillCapabilityInfo(struct ath_hal *ah);
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*/
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static struct ath_hal *
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ar9130Attach(uint16_t devid, HAL_SOFTC sc,
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata, HAL_STATUS *status)
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HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
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HAL_OPS_CONFIG *ah_config,
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HAL_STATUS *status)
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{
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struct ath_hal_5416 *ahp5416;
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struct ath_hal_5212 *ahp;
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@ -114,6 +114,7 @@ ar9160InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
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static struct ath_hal *
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ar9160Attach(uint16_t devid, HAL_SOFTC sc,
|
||||
HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
|
||||
HAL_OPS_CONFIG *ah_config,
|
||||
HAL_STATUS *status)
|
||||
{
|
||||
struct ath_hal_5416 *ahp5416;
|
||||
|
@ -148,6 +148,7 @@ ar9280InitPLL(struct ath_hal *ah, const struct ieee80211_channel *chan)
|
||||
static struct ath_hal *
|
||||
ar9280Attach(uint16_t devid, HAL_SOFTC sc,
|
||||
HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
|
||||
HAL_OPS_CONFIG *ah_config,
|
||||
HAL_STATUS *status)
|
||||
{
|
||||
struct ath_hal_9280 *ahp9280;
|
||||
|
@ -133,6 +133,7 @@ ar9285_eeprom_print_diversity_settings(struct ath_hal *ah)
|
||||
static struct ath_hal *
|
||||
ar9285Attach(uint16_t devid, HAL_SOFTC sc,
|
||||
HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
|
||||
HAL_OPS_CONFIG *ah_config,
|
||||
HAL_STATUS *status)
|
||||
{
|
||||
struct ath_hal_9285 *ahp9285;
|
||||
|
@ -111,6 +111,7 @@ ar9287AniSetup(struct ath_hal *ah)
|
||||
static struct ath_hal *
|
||||
ar9287Attach(uint16_t devid, HAL_SOFTC sc,
|
||||
HAL_BUS_TAG st, HAL_BUS_HANDLE sh, uint16_t *eepromdata,
|
||||
HAL_OPS_CONFIG *ah_config,
|
||||
HAL_STATUS *status)
|
||||
{
|
||||
struct ath_hal_9287 *ahp9287;
|
||||
|
@ -435,6 +435,81 @@ _ath_power_restore_power_state(struct ath_softc *sc, const char *file, int line)
|
||||
|
||||
}
|
||||
|
||||
/*
|
||||
* Configure the initial HAL configuration values based on bus
|
||||
* specific parameters.
|
||||
*
|
||||
* Some PCI IDs and other information may need tweaking.
|
||||
*
|
||||
* XXX TODO: ath9k and the Atheros HAL only program comm2g_switch_enable
|
||||
* if BT antenna diversity isn't enabled.
|
||||
*
|
||||
* So, let's also figure out how to enable BT diversity for AR9485.
|
||||
*/
|
||||
static void
|
||||
ath_setup_hal_config(struct ath_softc *sc, HAL_OPS_CONFIG *ah_config)
|
||||
{
|
||||
/* XXX TODO: only for PCI devices? */
|
||||
|
||||
if (sc->sc_pci_devinfo & (ATH_PCI_CUS198 | ATH_PCI_CUS230)) {
|
||||
ah_config->ath_hal_ext_lna_ctl_gpio = 0x200; /* bit 9 */
|
||||
ah_config->ath_hal_ext_atten_margin_cfg = AH_TRUE;
|
||||
ah_config->ath_hal_min_gainidx = AH_TRUE;
|
||||
ah_config->ath_hal_ant_ctrl_comm2g_switch_enable = 0x000bbb88;
|
||||
/* XXX low_rssi_thresh */
|
||||
/* XXX fast_div_bias */
|
||||
device_printf(sc->sc_dev, "configuring for %s\n",
|
||||
(sc->sc_pci_devinfo & ATH_PCI_CUS198) ?
|
||||
"CUS198" : "CUS230");
|
||||
}
|
||||
|
||||
if (sc->sc_pci_devinfo & ATH_PCI_CUS217)
|
||||
device_printf(sc->sc_dev, "CUS217 card detected\n");
|
||||
|
||||
if (sc->sc_pci_devinfo & ATH_PCI_CUS252)
|
||||
device_printf(sc->sc_dev, "CUS252 card detected\n");
|
||||
|
||||
if (sc->sc_pci_devinfo & ATH_PCI_AR9565_1ANT)
|
||||
device_printf(sc->sc_dev, "WB335 1-ANT card detected\n");
|
||||
|
||||
if (sc->sc_pci_devinfo & ATH_PCI_AR9565_2ANT)
|
||||
device_printf(sc->sc_dev, "WB335 2-ANT card detected\n");
|
||||
|
||||
if (sc->sc_pci_devinfo & ATH_PCI_KILLER)
|
||||
device_printf(sc->sc_dev, "Killer Wireless card detected\n");
|
||||
|
||||
#if 0
|
||||
/*
|
||||
* Some WB335 cards do not support antenna diversity. Since
|
||||
* we use a hardcoded value for AR9565 instead of using the
|
||||
* EEPROM/OTP data, remove the combining feature from
|
||||
* the HW capabilities bitmap.
|
||||
*/
|
||||
if (sc->sc_pci_devinfo & (ATH9K_PCI_AR9565_1ANT | ATH9K_PCI_AR9565_2ANT)) {
|
||||
if (!(sc->sc_pci_devinfo & ATH9K_PCI_BT_ANT_DIV))
|
||||
pCap->hw_caps &= ~ATH9K_HW_CAP_ANT_DIV_COMB;
|
||||
}
|
||||
|
||||
if (sc->sc_pci_devinfo & ATH9K_PCI_BT_ANT_DIV) {
|
||||
pCap->hw_caps |= ATH9K_HW_CAP_BT_ANT_DIV;
|
||||
device_printf(sc->sc_dev, "Set BT/WLAN RX diversity capability\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
if (sc->sc_pci_devinfo & ATH_PCI_D3_L1_WAR) {
|
||||
ah_config->ath_hal_pcie_waen = 0x0040473b;
|
||||
device_printf(sc->sc_dev, "Enable WAR for ASPM D3/L1\n");
|
||||
}
|
||||
|
||||
#if 0
|
||||
if (sc->sc_pci_devinfo & ATH9K_PCI_NO_PLL_PWRSAVE) {
|
||||
ah->config.no_pll_pwrsave = true;
|
||||
device_printf(sc->sc_dev, "Disable PLL PowerSave\n");
|
||||
}
|
||||
#endif
|
||||
|
||||
}
|
||||
|
||||
#define HAL_MODE_HT20 (HAL_MODE_11NG_HT20 | HAL_MODE_11NA_HT20)
|
||||
#define HAL_MODE_HT40 \
|
||||
(HAL_MODE_11NG_HT40PLUS | HAL_MODE_11NG_HT40MINUS | \
|
||||
@ -450,6 +525,7 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
|
||||
u_int wmodes;
|
||||
uint8_t macaddr[IEEE80211_ADDR_LEN];
|
||||
int rx_chainmask, tx_chainmask;
|
||||
HAL_OPS_CONFIG ah_config;
|
||||
|
||||
DPRINTF(sc, ATH_DEBUG_ANY, "%s: devid 0x%x\n", __func__, devid);
|
||||
|
||||
@ -468,8 +544,17 @@ ath_attach(u_int16_t devid, struct ath_softc *sc)
|
||||
device_get_unit(sc->sc_dev));
|
||||
CURVNET_RESTORE();
|
||||
|
||||
/*
|
||||
* Configure the initial configuration data.
|
||||
*
|
||||
* This is stuff that may be needed early during attach
|
||||
* rather than done via configuration calls later.
|
||||
*/
|
||||
bzero(&ah_config, sizeof(ah_config));
|
||||
ath_setup_hal_config(sc, &ah_config);
|
||||
|
||||
ah = ath_hal_attach(devid, sc, sc->sc_st, sc->sc_sh,
|
||||
sc->sc_eepromdata, &status);
|
||||
sc->sc_eepromdata, &ah_config, &status);
|
||||
if (ah == NULL) {
|
||||
if_printf(ifp, "unable to attach hardware; HAL status %u\n",
|
||||
status);
|
||||
@ -7101,6 +7186,6 @@ ath_node_recv_pspoll(struct ieee80211_node *ni, struct mbuf *m)
|
||||
|
||||
MODULE_VERSION(if_ath, 1);
|
||||
MODULE_DEPEND(if_ath, wlan, 1, 1, 1); /* 802.11 media layer */
|
||||
#if defined(IEEE80211_ALQ) || defined(AH_DEBUG_ALQ)
|
||||
#if defined(IEEE80211_ALQ) || defined(AH_DEBUG_ALQ) || defined(ATH_DEBUG_ALQ)
|
||||
MODULE_DEPEND(if_ath, alq, 1, 1, 1);
|
||||
#endif
|
||||
|
@ -209,6 +209,10 @@ bad:
|
||||
return (error);
|
||||
}
|
||||
|
||||
/*
|
||||
* XXX need to low_rssi_thresh config from ath9k, to support CUS198
|
||||
* antenna diversity correctly.
|
||||
*/
|
||||
static HAL_BOOL
|
||||
ath_is_alt_ant_ratio_better(int alt_ratio, int maxdelta, int mindelta,
|
||||
int main_rssi_avg, int alt_rssi_avg, int pkt_count)
|
||||
|
@ -80,6 +80,98 @@ struct ath_pci_softc {
|
||||
void *sc_ih; /* interrupt handler */
|
||||
};
|
||||
|
||||
/*
|
||||
* XXX eventually this should be some system level definition
|
||||
* so modules will hvae probe/attach information like USB.
|
||||
* But for now..
|
||||
*/
|
||||
struct pci_device_id {
|
||||
int vendor_id;
|
||||
int device_id;
|
||||
|
||||
int sub_vendor_id;
|
||||
int sub_device_id;
|
||||
|
||||
int driver_data;
|
||||
|
||||
int match_populated:1;
|
||||
int match_vendor_id:1;
|
||||
int match_device_id:1;
|
||||
int match_sub_vendor_id:1;
|
||||
int match_sub_device_id:1;
|
||||
};
|
||||
|
||||
#define PCI_VDEVICE(v, s) \
|
||||
.vendor_id = (v), \
|
||||
.device_id = (s), \
|
||||
.match_populated = 1, \
|
||||
.match_vendor_id = 1, \
|
||||
.match_device_id = 1
|
||||
|
||||
#define PCI_DEVICE_SUB(v, d, dv, ds) \
|
||||
.match_populated = 1, \
|
||||
.vendor_id = (v), .match_vendor_id = 1, \
|
||||
.device_id = (d), .match_device_id = 1, \
|
||||
.sub_vendor_id = (dv), .match_sub_vendor_id = 1, \
|
||||
.sub_device_id = (ds), .match_sub_device_id = 1
|
||||
|
||||
#define PCI_VENDOR_ID_ATHEROS 0x168c
|
||||
#define PCI_VENDOR_ID_SAMSUNG 0x144d
|
||||
#define PCI_VENDOR_ID_AZWAVE 0x1a3b
|
||||
#define PCI_VENDOR_ID_FOXCONN 0x105b
|
||||
#define PCI_VENDOR_ID_ATTANSIC 0x1969
|
||||
#define PCI_VENDOR_ID_ASUSTEK 0x1043
|
||||
#define PCI_VENDOR_ID_DELL 0x1028
|
||||
#define PCI_VENDOR_ID_QMI 0x1a32
|
||||
#define PCI_VENDOR_ID_LENOVO 0x17aa
|
||||
#define PCI_VENDOR_ID_HP 0x103c
|
||||
|
||||
#include "if_ath_pci_devlist.h"
|
||||
|
||||
/*
|
||||
* Attempt to find a match for the given device in
|
||||
* the given device table.
|
||||
*
|
||||
* Returns the device structure or NULL if no matching
|
||||
* PCI device is found.
|
||||
*/
|
||||
static const struct pci_device_id *
|
||||
ath_pci_probe_device(device_t dev, const struct pci_device_id *dev_table, int nentries)
|
||||
{
|
||||
int i;
|
||||
int vendor_id, device_id;
|
||||
int sub_vendor_id, sub_device_id;
|
||||
|
||||
vendor_id = pci_get_vendor(dev);
|
||||
device_id = pci_get_device(dev);
|
||||
sub_vendor_id = pci_get_subvendor(dev);
|
||||
sub_device_id = pci_get_subdevice(dev);
|
||||
|
||||
for (i = 0; i < nentries; i++) {
|
||||
/* Don't match on non-populated (eg empty) entries */
|
||||
if (! dev_table[i].match_populated)
|
||||
continue;
|
||||
|
||||
if (dev_table[i].match_vendor_id &&
|
||||
(dev_table[i].vendor_id != vendor_id))
|
||||
continue;
|
||||
if (dev_table[i].match_device_id &&
|
||||
(dev_table[i].device_id != device_id))
|
||||
continue;
|
||||
if (dev_table[i].match_sub_vendor_id &&
|
||||
(dev_table[i].sub_vendor_id != sub_vendor_id))
|
||||
continue;
|
||||
if (dev_table[i].match_sub_device_id &&
|
||||
(dev_table[i].sub_device_id != sub_device_id))
|
||||
continue;
|
||||
|
||||
/* Match */
|
||||
return (&dev_table[i]);
|
||||
}
|
||||
|
||||
return (NULL);
|
||||
}
|
||||
|
||||
#define BS_BAR 0x10
|
||||
#define PCIR_RETRY_TIMEOUT 0x41
|
||||
#define PCIR_CFG_PMCSR 0x48
|
||||
@ -150,9 +242,15 @@ ath_pci_attach(device_t dev)
|
||||
const struct firmware *fw = NULL;
|
||||
const char *buf;
|
||||
#endif
|
||||
const struct pci_device_id *pd;
|
||||
|
||||
sc->sc_dev = dev;
|
||||
|
||||
/* Do this lookup anyway; figure out what to do with it later */
|
||||
pd = ath_pci_probe_device(dev, ath_pci_id_table, nitems(ath_pci_id_table));
|
||||
if (pd)
|
||||
sc->sc_pci_devinfo = pd->driver_data;
|
||||
|
||||
/*
|
||||
* Enable bus mastering.
|
||||
*/
|
||||
|
@ -81,6 +81,25 @@
|
||||
#define ATH_BEACON_CWMIN_DEFAULT 0 /* default cwmin for ap beacon q */
|
||||
#define ATH_BEACON_CWMAX_DEFAULT 0 /* default cwmax for ap beacon q */
|
||||
|
||||
/*
|
||||
* The following bits can be set during the PCI (and perhaps non-PCI
|
||||
* later) device probe path.
|
||||
*
|
||||
* It controls some of the driver and HAL behaviour.
|
||||
*/
|
||||
|
||||
#define ATH_PCI_CUS198 0x0001
|
||||
#define ATH_PCI_CUS230 0x0002
|
||||
#define ATH_PCI_CUS217 0x0004
|
||||
#define ATH_PCI_CUS252 0x0008
|
||||
#define ATH_PCI_WOW 0x0010
|
||||
#define ATH_PCI_BT_ANT_DIV 0x0020
|
||||
#define ATH_PCI_D3_L1_WAR 0x0040
|
||||
#define ATH_PCI_AR9565_1ANT 0x0080
|
||||
#define ATH_PCI_AR9565_2ANT 0x0100
|
||||
#define ATH_PCI_NO_PLL_PWRSAVE 0x0200
|
||||
#define ATH_PCI_KILLER 0x0400
|
||||
|
||||
/*
|
||||
* The key cache is used for h/w cipher state and also for
|
||||
* tracking station state such as the current tx antenna.
|
||||
@ -884,6 +903,9 @@ struct ath_softc {
|
||||
HAL_POWER_MODE sc_cur_powerstate;
|
||||
|
||||
int sc_powersave_refcnt;
|
||||
|
||||
/* ATH_PCI_* flags */
|
||||
uint32_t sc_pci_devinfo;
|
||||
};
|
||||
|
||||
#define ATH_LOCK_INIT(_sc) \
|
||||
|
Loading…
x
Reference in New Issue
Block a user