From 93a73e5a00fdf2ef1baa8da0c9926403758f5dbb Mon Sep 17 00:00:00 2001 From: Michael Reifenberger Date: Wed, 19 Jul 2006 16:31:09 +0000 Subject: [PATCH] Reflect the additional support of C7 CPU's in padlock(4). Submitted by: brueffer MFC after: 1 day --- share/man/man4/man4.i386/padlock.4 | 15 ++++++++++----- 1 file changed, 10 insertions(+), 5 deletions(-) diff --git a/share/man/man4/man4.i386/padlock.4 b/share/man/man4/man4.i386/padlock.4 index 4ed45e1edcc3..0dccd4914c6a 100644 --- a/share/man/man4/man4.i386/padlock.4 +++ b/share/man/man4/man4.i386/padlock.4 @@ -24,12 +24,12 @@ .\" .\" $FreeBSD$ .\" -.Dd June 5, 2006 +.Dd July 19, 2006 .Dt PADLOCK 4 i386 .Os .Sh NAME .Nm padlock -.Nd "driver for the cryptographic functions and RNG in VIA C3 and Eden processors" +.Nd "driver for the cryptographic functions and RNG in VIA C3, C7 and Eden processors" .Sh SYNOPSIS To compile this driver into the kernel, place the following lines in your @@ -47,14 +47,18 @@ padlock_load="YES" .Ed .Sh DESCRIPTION The C3 and Eden processor series from VIA include hardware acceleration for -AES, as well as a hardware random number generator. +AES. +The C7 series includes hardware acceleration for AES, SHA and RSA. +All of the above processor series include a hardware random number generator. .Pp The .Nm driver registers itself to accelerate AES operations for .Xr crypto 4 . -It also registers itself to accelerate various HMAC algorithms, but there is no -hardware acceleration for those algorithms, this is only needed, so +It also registers itself to accelerate various HMAC algorithms, although +there is no +hardware acceleration for those algorithms. +This is only needed, so .Nm can work with .Xr fast_ipsec 4 . @@ -74,6 +78,7 @@ release to include it was .Sh SEE ALSO .Xr crypt 3 , .Xr crypto 4 , +.Xr fast_ipsec 4 , .Xr intro 4 , .Xr random 4 , .Xr crypto 9