o Correct the calculation how many pages we need
o Ensure we use correct bank for MSK register o Save and restore current bank in interrupt handler o Stop TX watchdog on fatal errors o Use right register for EPH status This fixes operation on ARMv8 Foundation Model Reviewed by: benno@
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@ -527,7 +527,7 @@ smc_start_locked(struct ifnet *ifp)
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* Work out how many 256 byte "pages" we need. We have to include the
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* control data for the packet in this calculation.
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*/
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npages = (len * PKT_CTRL_DATA_LEN) >> 8;
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npages = (len + PKT_CTRL_DATA_LEN) >> 8;
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if (npages == 0)
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npages = 1;
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@ -805,12 +805,24 @@ static int
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smc_intr(void *context)
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{
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struct smc_softc *sc;
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uint32_t curbank;
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sc = (struct smc_softc *)context;
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/*
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* Save current bank and restore later in this function
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*/
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curbank = (smc_read_2(sc, BSR) & BSR_BANK_MASK);
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/*
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* Block interrupts in order to let smc_task_intr to kick in
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*/
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smc_select_bank(sc, 2);
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smc_write_1(sc, MSK, 0);
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/* Restore bank */
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smc_select_bank(sc, curbank);
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taskqueue_enqueue_fast(sc->smc_tq, &sc->smc_intr);
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return (FILTER_HANDLED);
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}
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@ -844,13 +856,19 @@ smc_task_intr(void *context, int pending)
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*/
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packet = smc_read_1(sc, FIFO_TX);
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if ((packet & FIFO_EMPTY) == 0) {
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callout_stop(&sc->smc_watchdog);
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smc_select_bank(sc, 2);
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smc_write_1(sc, PNR, packet);
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smc_write_2(sc, PTR, 0 | PTR_READ |
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PTR_AUTO_INCR);
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tcr = smc_read_2(sc, DATA0);
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smc_select_bank(sc, 0);
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tcr = smc_read_2(sc, EPHSR);
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#if 0
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if ((tcr & EPHSR_TX_SUC) == 0)
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device_printf(sc->smc_dev,
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"bad packet\n");
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#endif
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smc_select_bank(sc, 2);
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smc_mmu_wait(sc);
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smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE_PKT);
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@ -921,6 +939,7 @@ smc_task_intr(void *context, int pending)
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/*
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* Update the interrupt mask.
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*/
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smc_select_bank(sc, 2);
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if ((ifp->if_capenable & IFCAP_POLLING) == 0)
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smc_write_1(sc, MSK, sc->smc_mask);
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