Synchronize with sys/i386/isa/clock.c revision 1.98.
This commit is contained in:
KATO Takenori
parent
9587ee1621
commit
95ec91943b
@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.29 1997/07/21 13:12:01 kato Exp $
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* $Id: clock.c,v 1.30 1997/07/23 11:28:39 kato Exp $
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*/
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/*
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@ -70,7 +70,7 @@
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#include <machine/ipl.h>
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#ifdef APIC_IO
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#include <machine/smp.h>
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#include <machine/smptests.h> /** TEST_ALTTIMER, APIC_PIN0_TIMER */
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#include <machine/smptests.h> /** NEW_STRATEGY (,SMP_TIMER_NC) */
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#endif /* APIC_IO */
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#include <i386/isa/icu.h>
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@ -1164,6 +1164,10 @@ cpu_initclocks()
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#ifdef APIC_IO
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#ifdef NEW_STRATEGY
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#ifdef SMP_TIMER_NC
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#error 'options SMP_TIMER_NC' no longer used, remove & reconfig.
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#endif /** XXX SMP_TIMER_NC */
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/* 1st look for ExtInt on pin 0 */
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if (apic_int_type(0, 0) == 3) {
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/*
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@ -1172,7 +1176,7 @@ cpu_initclocks()
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* reset; prog 4 bytes, single ICU, edge triggered
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*/
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outb(IO_ICU1, 0x13);
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector (unused) */
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outb(IO_ICU1 + 1, 0x00); /* ignore slave */
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outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
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outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
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@ -1182,14 +1186,14 @@ cpu_initclocks()
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panic("8254 redirect via APIC pin0 impossible!");
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x = 0;
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/** if (bootverbose */
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/* XXX if (bootverbose) */
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printf("APIC_IO: routing 8254 via 8259 on pin 0\n");
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}
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/* failing that, look for 8254 on pin 2 */
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else if (isa_apic_pin(0) == 2) {
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x = 2;
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/** if (bootverbose */
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/* XXX if (bootverbose) */
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printf("APIC_IO: routing 8254 via pin 2\n");
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}
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@ -1197,7 +1201,34 @@ cpu_initclocks()
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else
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panic("neither pin 0 or pin 2 works for 8254");
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/* setup the vectors for the chosen method */
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#else /** NEW_STRATEGY */
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/* 8254 is traditionally on ISA IRQ0 */
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#if defined(SMP_TIMER_NC)
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x = -1;
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#else
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x = isa_apic_pin(0);
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#endif /** XXX SMP_TIMER_NC */
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if (x < 0) {
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/* bummer, attempt to redirect thru the 8259 */
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if (bootverbose)
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printf("APIC missing 8254 connection\n");
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/* allow 8254 timer to INTerrupt 8259 */
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x = inb(IO_ICU1 + 1); /* current mask in 8259 */
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x &= ~1; /* clear 8254 timer mask */
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outb(IO_ICU1 + 1, x); /* write new mask */
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/* program IO APIC for type 3 INT on INT0 */
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if (ext_int_setup(0, 0) < 0)
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panic("8254 redirect impossible!");
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x = 0; /* 8259 is on 0 */
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}
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#endif /** NEW_STRATEGY */
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/* setup the vectors */
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vec[x] = (u_int)vec8254;
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Xintr8254 = (u_int)ivectors[x];
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mask8254 = (1 << x);
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@ -1207,75 +1238,13 @@ cpu_initclocks()
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/* unit */ 0);
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INTREN(mask8254);
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#else /** NEW_STRATEGY */
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#ifdef APIC_PIN0_TIMER
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/*
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* Allow 8254 timer to INTerrupt 8259:
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* re-initialize master 8259:
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* reset; prog 4 bytes, single ICU, edge triggered
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*/
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outb(IO_ICU1, 0x13);
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
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outb(IO_ICU1 + 1, 0x00); /* ignore slave */
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outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
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outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
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/* program IO APIC for type 3 INT on INT0 */
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if (ext_int_setup(0, 0) < 0)
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panic("8254 redirect via APIC pin0 impossible!");
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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INTREN(APIC_IRQ0);
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#else /* APIC_PIN0_TIMER */
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/* 8254 is traditionally on ISA IRQ0 */
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if ((x = isa_apic_pin(0)) < 0) {
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/* bummer, attempt to redirect thru the 8259 */
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if (bootverbose)
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printf("APIC missing 8254 connection\n");
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/* allow 8254 timer to INTerrupt 8259 */
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#ifdef TEST_ALTTIMER
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/*
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* re-initialize master 8259:
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* reset; prog 4 bytes, single ICU, edge triggered
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*/
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outb(IO_ICU1, 0x13);
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
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outb(IO_ICU1 + 1, 0x00); /* ignore slave */
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outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
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outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
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#else
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x = inb(IO_ICU1 + 1); /* current mask in 8259 */
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x &= ~1; /* clear 8254 timer mask */
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outb(IO_ICU1 + 1, x); /* write new mask */
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#endif /* TEST_ALTTIMER */
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/* program IO APIC for type 3 INT on INT0 */
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if (ext_int_setup(0, 0) < 0)
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panic("8254 redirect impossible!");
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x = 0; /* 8259 is on 0 */
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}
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vec[x] = (u_int)vec8254;
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Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
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mask8254 = (1 << x);
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register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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INTREN(mask8254);
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#endif /* APIC_PIN0_TIMER */
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#endif /** NEW_STRATEGY */
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#else /* APIC_IO */
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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INTREN(IRQ0);
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#endif /* APIC_IO */
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#if (defined(I586_CPU) || defined(I686_CPU)) && !defined(SMP)
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.29 1997/07/21 13:12:01 kato Exp $
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* $Id: clock.c,v 1.30 1997/07/23 11:28:39 kato Exp $
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*/
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/*
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@ -70,7 +70,7 @@
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#include <machine/ipl.h>
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#ifdef APIC_IO
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#include <machine/smp.h>
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#include <machine/smptests.h> /** TEST_ALTTIMER, APIC_PIN0_TIMER */
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#include <machine/smptests.h> /** NEW_STRATEGY (,SMP_TIMER_NC) */
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#endif /* APIC_IO */
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#include <i386/isa/icu.h>
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@ -1164,6 +1164,10 @@ cpu_initclocks()
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#ifdef APIC_IO
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#ifdef NEW_STRATEGY
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#ifdef SMP_TIMER_NC
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#error 'options SMP_TIMER_NC' no longer used, remove & reconfig.
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#endif /** XXX SMP_TIMER_NC */
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/* 1st look for ExtInt on pin 0 */
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if (apic_int_type(0, 0) == 3) {
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/*
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@ -1172,7 +1176,7 @@ cpu_initclocks()
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* reset; prog 4 bytes, single ICU, edge triggered
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*/
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outb(IO_ICU1, 0x13);
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector (unused) */
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outb(IO_ICU1 + 1, 0x00); /* ignore slave */
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outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
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outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
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@ -1182,14 +1186,14 @@ cpu_initclocks()
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panic("8254 redirect via APIC pin0 impossible!");
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x = 0;
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/** if (bootverbose */
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/* XXX if (bootverbose) */
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printf("APIC_IO: routing 8254 via 8259 on pin 0\n");
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}
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/* failing that, look for 8254 on pin 2 */
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else if (isa_apic_pin(0) == 2) {
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x = 2;
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/** if (bootverbose */
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/* XXX if (bootverbose) */
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printf("APIC_IO: routing 8254 via pin 2\n");
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}
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@ -1197,7 +1201,34 @@ cpu_initclocks()
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else
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panic("neither pin 0 or pin 2 works for 8254");
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/* setup the vectors for the chosen method */
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#else /** NEW_STRATEGY */
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/* 8254 is traditionally on ISA IRQ0 */
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#if defined(SMP_TIMER_NC)
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x = -1;
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#else
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x = isa_apic_pin(0);
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#endif /** XXX SMP_TIMER_NC */
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if (x < 0) {
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/* bummer, attempt to redirect thru the 8259 */
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if (bootverbose)
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printf("APIC missing 8254 connection\n");
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/* allow 8254 timer to INTerrupt 8259 */
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x = inb(IO_ICU1 + 1); /* current mask in 8259 */
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x &= ~1; /* clear 8254 timer mask */
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outb(IO_ICU1 + 1, x); /* write new mask */
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/* program IO APIC for type 3 INT on INT0 */
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if (ext_int_setup(0, 0) < 0)
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panic("8254 redirect impossible!");
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x = 0; /* 8259 is on 0 */
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}
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#endif /** NEW_STRATEGY */
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/* setup the vectors */
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vec[x] = (u_int)vec8254;
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Xintr8254 = (u_int)ivectors[x];
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mask8254 = (1 << x);
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@ -1207,75 +1238,13 @@ cpu_initclocks()
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/* unit */ 0);
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INTREN(mask8254);
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#else /** NEW_STRATEGY */
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#ifdef APIC_PIN0_TIMER
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/*
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* Allow 8254 timer to INTerrupt 8259:
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* re-initialize master 8259:
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* reset; prog 4 bytes, single ICU, edge triggered
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*/
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outb(IO_ICU1, 0x13);
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
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outb(IO_ICU1 + 1, 0x00); /* ignore slave */
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outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
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outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
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/* program IO APIC for type 3 INT on INT0 */
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if (ext_int_setup(0, 0) < 0)
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panic("8254 redirect via APIC pin0 impossible!");
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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INTREN(APIC_IRQ0);
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#else /* APIC_PIN0_TIMER */
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/* 8254 is traditionally on ISA IRQ0 */
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if ((x = isa_apic_pin(0)) < 0) {
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/* bummer, attempt to redirect thru the 8259 */
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if (bootverbose)
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printf("APIC missing 8254 connection\n");
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/* allow 8254 timer to INTerrupt 8259 */
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#ifdef TEST_ALTTIMER
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/*
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* re-initialize master 8259:
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* reset; prog 4 bytes, single ICU, edge triggered
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*/
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outb(IO_ICU1, 0x13);
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
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outb(IO_ICU1 + 1, 0x00); /* ignore slave */
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outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
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outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
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#else
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x = inb(IO_ICU1 + 1); /* current mask in 8259 */
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x &= ~1; /* clear 8254 timer mask */
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outb(IO_ICU1 + 1, x); /* write new mask */
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#endif /* TEST_ALTTIMER */
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/* program IO APIC for type 3 INT on INT0 */
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if (ext_int_setup(0, 0) < 0)
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panic("8254 redirect impossible!");
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x = 0; /* 8259 is on 0 */
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}
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vec[x] = (u_int)vec8254;
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Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
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mask8254 = (1 << x);
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register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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INTREN(mask8254);
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#endif /* APIC_PIN0_TIMER */
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#endif /** NEW_STRATEGY */
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#else /* APIC_IO */
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register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
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/* XXX */ (inthand2_t *)clkintr, &clk_imask,
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/* unit */ 0);
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INTREN(IRQ0);
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#endif /* APIC_IO */
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#if (defined(I586_CPU) || defined(I686_CPU)) && !defined(SMP)
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@ -34,7 +34,7 @@
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* SUCH DAMAGE.
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*
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* from: @(#)clock.c 7.2 (Berkeley) 5/12/91
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* $Id: clock.c,v 1.29 1997/07/21 13:12:01 kato Exp $
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* $Id: clock.c,v 1.30 1997/07/23 11:28:39 kato Exp $
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*/
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/*
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@ -70,7 +70,7 @@
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#include <machine/ipl.h>
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#ifdef APIC_IO
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#include <machine/smp.h>
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#include <machine/smptests.h> /** TEST_ALTTIMER, APIC_PIN0_TIMER */
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#include <machine/smptests.h> /** NEW_STRATEGY (,SMP_TIMER_NC) */
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#endif /* APIC_IO */
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#include <i386/isa/icu.h>
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@ -1164,6 +1164,10 @@ cpu_initclocks()
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#ifdef APIC_IO
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#ifdef NEW_STRATEGY
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#ifdef SMP_TIMER_NC
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#error 'options SMP_TIMER_NC' no longer used, remove & reconfig.
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#endif /** XXX SMP_TIMER_NC */
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/* 1st look for ExtInt on pin 0 */
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if (apic_int_type(0, 0) == 3) {
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/*
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@ -1172,7 +1176,7 @@ cpu_initclocks()
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* reset; prog 4 bytes, single ICU, edge triggered
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*/
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outb(IO_ICU1, 0x13);
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
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outb(IO_ICU1 + 1, NRSVIDT); /* start vector (unused) */
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outb(IO_ICU1 + 1, 0x00); /* ignore slave */
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outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
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outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
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@ -1182,14 +1186,14 @@ cpu_initclocks()
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panic("8254 redirect via APIC pin0 impossible!");
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x = 0;
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/** if (bootverbose */
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/* XXX if (bootverbose) */
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printf("APIC_IO: routing 8254 via 8259 on pin 0\n");
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}
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/* failing that, look for 8254 on pin 2 */
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else if (isa_apic_pin(0) == 2) {
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x = 2;
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/** if (bootverbose */
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/* XXX if (bootverbose) */
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printf("APIC_IO: routing 8254 via pin 2\n");
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}
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@ -1197,7 +1201,34 @@ cpu_initclocks()
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else
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panic("neither pin 0 or pin 2 works for 8254");
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/* setup the vectors for the chosen method */
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#else /** NEW_STRATEGY */
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/* 8254 is traditionally on ISA IRQ0 */
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#if defined(SMP_TIMER_NC)
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x = -1;
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#else
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x = isa_apic_pin(0);
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#endif /** XXX SMP_TIMER_NC */
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if (x < 0) {
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/* bummer, attempt to redirect thru the 8259 */
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if (bootverbose)
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printf("APIC missing 8254 connection\n");
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/* allow 8254 timer to INTerrupt 8259 */
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x = inb(IO_ICU1 + 1); /* current mask in 8259 */
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x &= ~1; /* clear 8254 timer mask */
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outb(IO_ICU1 + 1, x); /* write new mask */
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/* program IO APIC for type 3 INT on INT0 */
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if (ext_int_setup(0, 0) < 0)
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panic("8254 redirect impossible!");
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x = 0; /* 8259 is on 0 */
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}
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#endif /** NEW_STRATEGY */
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/* setup the vectors */
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vec[x] = (u_int)vec8254;
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Xintr8254 = (u_int)ivectors[x];
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mask8254 = (1 << x);
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@ -1207,75 +1238,13 @@ cpu_initclocks()
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/* unit */ 0);
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INTREN(mask8254);
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#else /** NEW_STRATEGY */
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#ifdef APIC_PIN0_TIMER
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/*
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* Allow 8254 timer to INTerrupt 8259:
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* re-initialize master 8259:
|
||||
* reset; prog 4 bytes, single ICU, edge triggered
|
||||
*/
|
||||
outb(IO_ICU1, 0x13);
|
||||
outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
|
||||
outb(IO_ICU1 + 1, 0x00); /* ignore slave */
|
||||
outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
|
||||
outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
|
||||
|
||||
/* program IO APIC for type 3 INT on INT0 */
|
||||
if (ext_int_setup(0, 0) < 0)
|
||||
panic("8254 redirect via APIC pin0 impossible!");
|
||||
|
||||
register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
|
||||
/* XXX */ (inthand2_t *)clkintr, &clk_imask,
|
||||
/* unit */ 0);
|
||||
INTREN(APIC_IRQ0);
|
||||
#else /* APIC_PIN0_TIMER */
|
||||
/* 8254 is traditionally on ISA IRQ0 */
|
||||
if ((x = isa_apic_pin(0)) < 0) {
|
||||
/* bummer, attempt to redirect thru the 8259 */
|
||||
if (bootverbose)
|
||||
printf("APIC missing 8254 connection\n");
|
||||
|
||||
/* allow 8254 timer to INTerrupt 8259 */
|
||||
#ifdef TEST_ALTTIMER
|
||||
/*
|
||||
* re-initialize master 8259:
|
||||
* reset; prog 4 bytes, single ICU, edge triggered
|
||||
*/
|
||||
outb(IO_ICU1, 0x13);
|
||||
outb(IO_ICU1 + 1, NRSVIDT); /* start vector */
|
||||
outb(IO_ICU1 + 1, 0x00); /* ignore slave */
|
||||
outb(IO_ICU1 + 1, 0x03); /* auto EOI, 8086 */
|
||||
|
||||
outb(IO_ICU1 + 1, 0xfe); /* unmask INT0 */
|
||||
#else
|
||||
x = inb(IO_ICU1 + 1); /* current mask in 8259 */
|
||||
x &= ~1; /* clear 8254 timer mask */
|
||||
outb(IO_ICU1 + 1, x); /* write new mask */
|
||||
#endif /* TEST_ALTTIMER */
|
||||
|
||||
/* program IO APIC for type 3 INT on INT0 */
|
||||
if (ext_int_setup(0, 0) < 0)
|
||||
panic("8254 redirect impossible!");
|
||||
x = 0; /* 8259 is on 0 */
|
||||
}
|
||||
|
||||
vec[x] = (u_int)vec8254;
|
||||
Xintr8254 = (u_int)ivectors[x]; /* XXX might need Xfastintr# */
|
||||
mask8254 = (1 << x);
|
||||
register_intr(/* irq */ x, /* XXX id */ 0, /* flags */ 0,
|
||||
/* XXX */ (inthand2_t *)clkintr, &clk_imask,
|
||||
/* unit */ 0);
|
||||
INTREN(mask8254);
|
||||
#endif /* APIC_PIN0_TIMER */
|
||||
|
||||
#endif /** NEW_STRATEGY */
|
||||
|
||||
#else /* APIC_IO */
|
||||
|
||||
register_intr(/* irq */ 0, /* XXX id */ 0, /* flags */ 0,
|
||||
/* XXX */ (inthand2_t *)clkintr, &clk_imask,
|
||||
/* unit */ 0);
|
||||
INTREN(IRQ0);
|
||||
|
||||
#endif /* APIC_IO */
|
||||
|
||||
#if (defined(I586_CPU) || defined(I686_CPU)) && !defined(SMP)
|
||||
|
||||
Loading…
Reference in New Issue
Block a user