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Rename a10_emac_gpio_config() to a10_gpio_ethernet_activate() to make the

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change to GMAC easier on A20 SoCs.

On A10 only the EMAC controller is available (fast ethernet), but on A20
there is also GMAC a high (or better) performant controller (gigabit
ethernet).

On A20 the both controllers uses the same pins to talk to the ethernet PHY
(MII or RGMII) and they can be selected by the GPIO pin mux.

There is work in progress to bring in GMAC support.
This commit is contained in:
Luiz Otavio O Souza 2015-07-03 17:54:41 +00:00
parent eb89622653
commit 9639a6c7c9
3 changed files with 12 additions and 12 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

6
sys/arm/allwinner/a10_gpio.c
View File

@ -524,8 +524,9 @@ static driver_t a10_gpio_driver = {
DRIVER_MODULE(a10_gpio, simplebus, a10_gpio_driver, a10_gpio_devclass, 0, 0);
int
a10_emac_gpio_config(uint32_t pin)
a10_gpio_ethernet_activate(uint32_t func)
{
int i;
struct a10_gpio_softc *sc = a10_gpio_sc;
if (sc == NULL)
@ -533,7 +534,8 @@ a10_emac_gpio_config(uint32_t pin)
/* Configure pin mux settings for MII. */
A10_GPIO_LOCK(sc);
a10_gpio_set_function(sc, pin, A10_GPIO_PULLDOWN);
for (i = 0; i <= 17; i++)
a10_gpio_set_function(sc, i, func);
A10_GPIO_UNLOCK(sc);
return (0);

5
sys/arm/allwinner/a10_gpio.h
View File

@ -29,6 +29,9 @@
#ifndef _A10_GPIO_H_
#define _A10_GPIO_H_
int a10_emac_gpio_config(uint32_t pin);
#define A10_GPIO_FUNC_MII 2
#define A10_GPIO_FUNC_RGMII 5
int a10_gpio_ethernet_activate(uint32_t);
#endif

13
sys/arm/allwinner/if_emac.c
View File

@ -142,17 +142,12 @@ static int sysctl_hw_emac_proc_limit(SYSCTL_HANDLER_ARGS);
static void
emac_sys_setup(void)
{
int i;
/* Activate EMAC clock. */
a10_clk_emac_activate();
/*
* Configure pin mux settings for MII.
* Pins PA0 from PA17.
*/
for (i = 0; i <= 17; i++)
a10_emac_gpio_config(i);
/* Map sram */
/* Set the pin mux to EMAC (mii). */
a10_gpio_ethernet_activate(A10_GPIO_FUNC_MII);
/* Map sram. */
a10_map_to_emac();
}