From 9771cac29156f6d4c4bea0028a414a4891f48fcf Mon Sep 17 00:00:00 2001 From: Dimitry Andric Date: Sun, 26 Jan 2020 00:21:30 +0000 Subject: [PATCH] Update build glue for a minimal build of the clang executable. --- lib/clang/headers/Makefile | 28 +---- lib/clang/include/llvm/Support/Extension.def | 3 + lib/clang/libclang/Makefile | 110 +++++++++++++++++-- lib/clang/libllvm/Makefile | 64 +++++++++-- 4 files changed, 159 insertions(+), 46 deletions(-) create mode 100644 lib/clang/include/llvm/Support/Extension.def diff --git a/lib/clang/headers/Makefile b/lib/clang/headers/Makefile index db1cbcb3e0f9..ff5dacce04a7 100644 --- a/lib/clang/headers/Makefile +++ b/lib/clang/headers/Makefile @@ -5,14 +5,11 @@ .PATH: ${CLANG_SRCS}/lib/Headers -INCSGROUPS= INCS CUDA FUZZ OMP PPC PROF SAN +INCSGROUPS= INCS CUDA OMP PPC INCSDIR= ${LIBDIR}/clang/10.0.0/include CUDADIR= ${INCSDIR}/cuda_wrappers -FUZZDIR= ${INCSDIR}/fuzzer OMPDIR= ${INCSDIR}/openmp_wrappers PPCDIR= ${INCSDIR}/ppc_wrappers -PROFDIR= ${INCSDIR}/profile -SANDIR= ${INCSDIR}/sanitizer GENINCS+= arm_fp16.h GENINCS+= arm_mve.h @@ -149,8 +146,6 @@ CUDA+= cuda_wrappers/algorithm CUDA+= cuda_wrappers/complex CUDA+= cuda_wrappers/new -FUZZ+= fuzzer/FuzzedDataProvider.h - OMP+= openmp_wrappers/__clang_openmp_math.h OMP+= openmp_wrappers/__clang_openmp_math_declares.h OMP+= openmp_wrappers/cmath @@ -164,27 +159,6 @@ PPC+= ppc_wrappers/smmintrin.h PPC+= ppc_wrappers/tmmintrin.h PPC+= ppc_wrappers/xmmintrin.h -PROF+= profile/InstrProfData.inc - -SAN+= sanitizer/allocator_interface.h -SAN+= sanitizer/asan_interface.h -SAN+= sanitizer/common_interface_defs.h -SAN+= sanitizer/coverage_interface.h -SAN+= sanitizer/dfsan_interface.h -SAN+= sanitizer/hwasan_interface.h -SAN+= sanitizer/linux_syscall_hooks.h -SAN+= sanitizer/lsan_interface.h -SAN+= sanitizer/msan_interface.h -SAN+= sanitizer/netbsd_syscall_hooks.h -SAN+= sanitizer/scudo_interface.h -SAN+= sanitizer/tsan_interface.h -SAN+= sanitizer/tsan_interface_atomic.h -SAN+= sanitizer/ubsan_interface.h - -XRAY+= xray/xray_interface.h -XRAY+= xray/xray_log_interface.h -XRAY+= xray/xray_records.h - arm_fp16.h: ${CLANG_SRCS}/include/clang/Basic/arm_fp16.td ${CLANG_TBLGEN} -gen-arm-fp16 \ -I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \ diff --git a/lib/clang/include/llvm/Support/Extension.def b/lib/clang/include/llvm/Support/Extension.def new file mode 100644 index 000000000000..07fb3782b6c3 --- /dev/null +++ b/lib/clang/include/llvm/Support/Extension.def @@ -0,0 +1,3 @@ +// $FreeBSD$ +//extension handlers +#undef HANDLE_EXTENSION diff --git a/lib/clang/libclang/Makefile b/lib/clang/libclang/Makefile index be9c0c337ac5..36c1eeeb1fff 100644 --- a/lib/clang/libclang/Makefile +++ b/lib/clang/libclang/Makefile @@ -47,6 +47,7 @@ SRCS_FUL+= ARCMigrate/TransZeroOutPropsInDealloc.cpp SRCS_FUL+= ARCMigrate/TransformActions.cpp SRCS_FUL+= ARCMigrate/Transforms.cpp SRCS_MIN+= AST/APValue.cpp +SRCS_MIN+= AST/ASTConcept.cpp SRCS_MIN+= AST/ASTConsumer.cpp SRCS_MIN+= AST/ASTContext.cpp SRCS_MIN+= AST/ASTDiagnostic.cpp @@ -78,12 +79,33 @@ SRCS_MIN+= AST/DeclarationName.cpp SRCS_MIN+= AST/Expr.cpp SRCS_MIN+= AST/ExprCXX.cpp SRCS_MIN+= AST/ExprClassification.cpp +SRCS_MIN+= AST/ExprConcepts.cpp SRCS_MIN+= AST/ExprConstant.cpp SRCS_MIN+= AST/ExprObjC.cpp SRCS_LDB+= AST/ExternalASTMerger.cpp SRCS_MIN+= AST/ExternalASTSource.cpp SRCS_MIN+= AST/FormatString.cpp SRCS_MIN+= AST/InheritViz.cpp +SRCS_MIN+= AST/Interp/Block.cpp +SRCS_MIN+= AST/Interp/ByteCodeEmitter.cpp +SRCS_MIN+= AST/Interp/ByteCodeExprGen.cpp +SRCS_MIN+= AST/Interp/ByteCodeGenError.cpp +SRCS_MIN+= AST/Interp/ByteCodeStmtGen.cpp +SRCS_MIN+= AST/Interp/Context.cpp +SRCS_MIN+= AST/Interp/Descriptor.cpp +SRCS_MIN+= AST/Interp/EvalEmitter.cpp +SRCS_MIN+= AST/Interp/Frame.cpp +SRCS_MIN+= AST/Interp/Function.cpp +SRCS_MIN+= AST/Interp/Interp.cpp +SRCS_MIN+= AST/Interp/InterpFrame.cpp +SRCS_MIN+= AST/Interp/InterpStack.cpp +SRCS_MIN+= AST/Interp/InterpState.cpp +SRCS_MIN+= AST/Interp/Pointer.cpp +SRCS_MIN+= AST/Interp/PrimType.cpp +SRCS_MIN+= AST/Interp/Program.cpp +SRCS_MIN+= AST/Interp/Record.cpp +SRCS_MIN+= AST/Interp/Source.cpp +SRCS_MIN+= AST/Interp/State.cpp SRCS_MIN+= AST/ItaniumCXXABI.cpp SRCS_MIN+= AST/ItaniumMangle.cpp SRCS_MIN+= AST/JSONNodeDumper.cpp @@ -159,6 +181,7 @@ SRCS_MIN+= Basic/FileSystemStatCache.cpp SRCS_MIN+= Basic/FixedPoint.cpp SRCS_MIN+= Basic/IdentifierTable.cpp SRCS_MIN+= Basic/LangOptions.cpp +SRCS_MIN+= Basic/LangStandards.cpp SRCS_MIN+= Basic/Module.cpp SRCS_MIN+= Basic/ObjCRuntime.cpp SRCS_MIN+= Basic/OpenMPKinds.cpp @@ -168,6 +191,7 @@ SRCS_MIN+= Basic/SanitizerSpecialCaseList.cpp SRCS_MIN+= Basic/Sanitizers.cpp SRCS_MIN+= Basic/SourceLocation.cpp SRCS_MIN+= Basic/SourceManager.cpp +SRCS_MIN+= Basic/Stack.cpp SRCS_MIN+= Basic/TargetInfo.cpp SRCS_MIN+= Basic/Targets.cpp SRCS_MIN+= Basic/Targets/AArch64.cpp @@ -262,10 +286,12 @@ SRCS_MIN+= Driver/Driver.cpp SRCS_MIN+= Driver/DriverOptions.cpp SRCS_MIN+= Driver/Job.cpp SRCS_MIN+= Driver/Multilib.cpp +SRCS_MIN+= Driver/OptionUtils.cpp SRCS_MIN+= Driver/Phases.cpp SRCS_MIN+= Driver/SanitizerArgs.cpp SRCS_MIN+= Driver/Tool.cpp SRCS_MIN+= Driver/ToolChain.cpp +SRCS_MIN+= Driver/ToolChains/AIX.cpp SRCS_MIN+= Driver/ToolChains/AMDGPU.cpp SRCS_MIN+= Driver/ToolChains/AVR.cpp SRCS_MIN+= Driver/ToolChains/Ananas.cpp @@ -286,6 +312,7 @@ SRCS_MIN+= Driver/ToolChains/CrossWindows.cpp SRCS_MIN+= Driver/ToolChains/Cuda.cpp SRCS_MIN+= Driver/ToolChains/Darwin.cpp SRCS_MIN+= Driver/ToolChains/DragonFly.cpp +SRCS_MIN+= Driver/ToolChains/Flang.cpp SRCS_MIN+= Driver/ToolChains/FreeBSD.cpp SRCS_MIN+= Driver/ToolChains/Fuchsia.cpp SRCS_MIN+= Driver/ToolChains/Gnu.cpp @@ -293,6 +320,7 @@ SRCS_MIN+= Driver/ToolChains/HIP.cpp SRCS_MIN+= Driver/ToolChains/Haiku.cpp SRCS_MIN+= Driver/ToolChains/Hexagon.cpp SRCS_MIN+= Driver/ToolChains/Hurd.cpp +SRCS_MIN+= Driver/ToolChains/InterfaceStubs.cpp SRCS_MIN+= Driver/ToolChains/Linux.cpp SRCS_MIN+= Driver/ToolChains/MSP430.cpp SRCS_MIN+= Driver/ToolChains/MSVC.cpp @@ -348,7 +376,6 @@ SRCS_MIN+= Frontend/HeaderIncludeGen.cpp SRCS_MIN+= Frontend/InitHeaderSearch.cpp SRCS_MIN+= Frontend/InitPreprocessor.cpp SRCS_MIN+= Frontend/InterfaceStubFunctionsConsumer.cpp -SRCS_MIN+= Frontend/LangStandards.cpp SRCS_MIN+= Frontend/LayoutOverrideSource.cpp SRCS_MIN+= Frontend/LogDiagnosticPrinter.cpp SRCS_MIN+= Frontend/ModuleDependencyCollector.cpp @@ -437,6 +464,7 @@ SRCS_MIN+= Sema/SemaCXXScopeSpec.cpp SRCS_MIN+= Sema/SemaCast.cpp SRCS_MIN+= Sema/SemaChecking.cpp SRCS_MIN+= Sema/SemaCodeComplete.cpp +SRCS_MIN+= Sema/SemaConcept.cpp SRCS_MIN+= Sema/SemaConsumer.cpp SRCS_MIN+= Sema/SemaCoroutine.cpp SRCS_MIN+= Sema/SemaDecl.cpp @@ -477,7 +505,7 @@ SRCS_MIN+= Serialization/ASTWriterStmt.cpp SRCS_MIN+= Serialization/GeneratePCH.cpp SRCS_MIN+= Serialization/GlobalModuleIndex.cpp SRCS_MIN+= Serialization/InMemoryModuleCache.cpp -SRCS_MIN+= Serialization/Module.cpp +SRCS_MIN+= Serialization/ModuleFile.cpp SRCS_MIN+= Serialization/ModuleFileExtension.cpp SRCS_MIN+= Serialization/ModuleManager.cpp SRCS_MIN+= Serialization/PCHContainerOperations.cpp @@ -519,7 +547,6 @@ SRCS_FUL+= StaticAnalyzer/Checkers/GTestChecker.cpp SRCS_FUL+= StaticAnalyzer/Checkers/GenericTaintChecker.cpp SRCS_FUL+= StaticAnalyzer/Checkers/IdenticalExprChecker.cpp SRCS_FUL+= StaticAnalyzer/Checkers/InnerPointerChecker.cpp -SRCS_FUL+= StaticAnalyzer/Checkers/IteratorChecker.cpp SRCS_FUL+= StaticAnalyzer/Checkers/IvarInvalidationChecker.cpp SRCS_FUL+= StaticAnalyzer/Checkers/LLVMConventionsChecker.cpp SRCS_FUL+= StaticAnalyzer/Checkers/LocalizationChecker.cpp @@ -601,7 +628,6 @@ SRCS_FUL+= StaticAnalyzer/Core/CheckerManager.cpp SRCS_FUL+= StaticAnalyzer/Core/CommonBugCategories.cpp SRCS_FUL+= StaticAnalyzer/Core/ConstraintManager.cpp SRCS_FUL+= StaticAnalyzer/Core/CoreEngine.cpp -SRCS_FUL+= StaticAnalyzer/Core/DynamicTypeMap.cpp SRCS_FUL+= StaticAnalyzer/Core/Environment.cpp SRCS_FUL+= StaticAnalyzer/Core/ExplodedGraph.cpp SRCS_FUL+= StaticAnalyzer/Core/ExprEngine.cpp @@ -615,7 +641,6 @@ SRCS_FUL+= StaticAnalyzer/Core/IssueHash.cpp SRCS_FUL+= StaticAnalyzer/Core/LoopUnrolling.cpp SRCS_FUL+= StaticAnalyzer/Core/LoopWidening.cpp SRCS_FUL+= StaticAnalyzer/Core/MemRegion.cpp -SRCS_FUL+= StaticAnalyzer/Core/PathDiagnostic.cpp SRCS_FUL+= StaticAnalyzer/Core/PlistDiagnostics.cpp SRCS_FUL+= StaticAnalyzer/Core/ProgramState.cpp SRCS_FUL+= StaticAnalyzer/Core/RangeConstraintManager.cpp @@ -662,6 +687,34 @@ SRCS_ALL+= ${SRCS_LDB} .endif SRCS+= ${SRCS_ALL:O} +clang/AST/AbstractBasicReader.inc: \ + ${CLANG_SRCS}/include/clang/AST/PropertiesBase.td + ${CLANG_TBLGEN} -gen-clang-basic-reader \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + ${CLANG_SRCS}/include/clang/AST/PropertiesBase.td +TGHDRS+= clang/AST/AbstractBasicReader.inc + +clang/AST/AbstractBasicWriter.inc: \ + ${CLANG_SRCS}/include/clang/AST/PropertiesBase.td + ${CLANG_TBLGEN} -gen-clang-basic-writer \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + ${CLANG_SRCS}/include/clang/AST/PropertiesBase.td +TGHDRS+= clang/AST/AbstractBasicWriter.inc + +clang/AST/AbstractTypeReader.inc: \ + ${CLANG_SRCS}/include/clang/AST/TypeProperties.td + ${CLANG_TBLGEN} -gen-clang-type-reader \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + ${CLANG_SRCS}/include/clang/AST/TypeProperties.td +TGHDRS+= clang/AST/AbstractTypeReader.inc + +clang/AST/AbstractTypeWriter.inc: \ + ${CLANG_SRCS}/include/clang/AST/TypeProperties.td + ${CLANG_TBLGEN} -gen-clang-type-writer \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + ${CLANG_SRCS}/include/clang/AST/TypeProperties.td +TGHDRS+= clang/AST/AbstractTypeWriter.inc + clang/AST/AttrImpl.inc: ${CLANG_SRCS}/include/clang/Basic/Attr.td ${CLANG_TBLGEN} -gen-clang-attr-impl \ -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ @@ -729,17 +782,18 @@ TGHDRS+= clang/AST/CommentHTMLTagsProperties.inc clang/AST/CommentNodes.inc: ${CLANG_SRCS}/include/clang/Basic/CommentNodes.td ${CLANG_TBLGEN} -gen-clang-comment-nodes \ - -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ ${CLANG_SRCS}/include/clang/Basic/CommentNodes.td TGHDRS+= clang/AST/CommentNodes.inc clang/AST/DeclNodes.inc: ${CLANG_SRCS}/include/clang/Basic/DeclNodes.td ${CLANG_TBLGEN} -gen-clang-decl-nodes \ - -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ ${CLANG_SRCS}/include/clang/Basic/DeclNodes.td TGHDRS+= clang/AST/DeclNodes.inc -clang/AST/StmtDataCollectors.inc: ${CLANG_SRCS}/include/clang/AST/StmtDataCollectors.td +clang/AST/StmtDataCollectors.inc: \ + ${CLANG_SRCS}/include/clang/AST/StmtDataCollectors.td ${CLANG_TBLGEN} -gen-clang-data-collectors \ -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ ${CLANG_SRCS}/include/clang/AST/StmtDataCollectors.td @@ -747,10 +801,16 @@ TGHDRS+= clang/AST/StmtDataCollectors.inc clang/AST/StmtNodes.inc: ${CLANG_SRCS}/include/clang/Basic/StmtNodes.td ${CLANG_TBLGEN} -gen-clang-stmt-nodes \ - -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ ${CLANG_SRCS}/include/clang/Basic/StmtNodes.td TGHDRS+= clang/AST/StmtNodes.inc +clang/AST/TypeNodes.inc: ${CLANG_SRCS}/include/clang/Basic/TypeNodes.td + ${CLANG_TBLGEN} -gen-clang-type-nodes \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + ${CLANG_SRCS}/include/clang/Basic/TypeNodes.td +TGHDRS+= clang/AST/TypeNodes.inc + clang/Basic/AttrHasAttributeImpl.inc: ${CLANG_SRCS}/include/clang/Basic/Attr.td ${CLANG_TBLGEN} -gen-clang-attr-has-attribute-impl \ -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ @@ -806,6 +866,32 @@ clang/Basic/arm_neon.inc: ${CLANG_SRCS}/include/clang/Basic/arm_neon.td -o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_neon.td TGHDRS+= clang/Basic/arm_neon.inc +clang/Basic/arm_mve_builtins.inc: ${CLANG_SRCS}/include/clang/Basic/arm_mve.td + ${CLANG_TBLGEN} -gen-arm-mve-builtin-def \ + -I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \ + -o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_mve.td +TGHDRS+= clang/Basic/arm_mve_builtins.inc + +clang/Basic/arm_mve_builtin_aliases.inc: \ + ${CLANG_SRCS}/include/clang/Basic/arm_mve.td + ${CLANG_TBLGEN} -gen-arm-mve-builtin-aliases \ + -I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \ + -o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_mve.td +TGHDRS+= clang/Basic/arm_mve_builtin_aliases.inc + +clang/Basic/arm_mve_builtin_cg.inc: ${CLANG_SRCS}/include/clang/Basic/arm_mve.td + ${CLANG_TBLGEN} -gen-arm-mve-builtin-codegen \ + -I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \ + -o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_mve.td +TGHDRS+= clang/Basic/arm_mve_builtin_cg.inc + +clang/Basic/arm_mve_builtin_sema.inc: \ + ${CLANG_SRCS}/include/clang/Basic/arm_mve.td + ${CLANG_TBLGEN} -gen-arm-mve-builtin-sema \ + -I ${CLANG_SRCS}/include/clang/Basic -d ${.TARGET:C/$/.d/} \ + -o ${.TARGET} ${CLANG_SRCS}/include/clang/Basic/arm_mve.td +TGHDRS+= clang/Basic/arm_mve_builtin_sema.inc + clang/Driver/Options.inc: ${CLANG_SRCS}/include/clang/Driver/Options.td ${LLVM_TBLGEN} -gen-opt-parser-defs \ -I ${LLVM_SRCS}/include -I ${CLANG_SRCS}/include/clang/Driver \ @@ -878,6 +964,12 @@ clang/StaticAnalyzer/Checkers/Checkers.inc: \ ${CLANG_SRCS}/include/clang/StaticAnalyzer/Checkers/Checkers.td TGHDRS+= clang/StaticAnalyzer/Checkers/Checkers.inc +Opcodes.inc: ${CLANG_SRCS}/lib/AST/Interp/Opcodes.td + ${CLANG_TBLGEN} -gen-clang-opcodes \ + -I ${CLANG_SRCS}/include -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ + ${CLANG_SRCS}/lib/AST/Interp/Opcodes.td +TGHDRS+= Opcodes.inc + OpenCLBuiltins.inc: ${CLANG_SRCS}/lib/Sema/OpenCLBuiltins.td ${CLANG_TBLGEN} -gen-clang-opencl-builtins \ -d ${.TARGET:C/$/.d/} -o ${.TARGET} \ diff --git a/lib/clang/libllvm/Makefile b/lib/clang/libllvm/Makefile index 473dbcb9c991..a0b3e147521d 100644 --- a/lib/clang/libllvm/Makefile +++ b/lib/clang/libllvm/Makefile @@ -60,9 +60,11 @@ SRCS_MIN+= Analysis/CmpInstAnalysis.cpp SRCS_MIN+= Analysis/CodeMetrics.cpp SRCS_MIN+= Analysis/ConstantFolding.cpp SRCS_MIN+= Analysis/CostModel.cpp +SRCS_MIN+= Analysis/DDG.cpp SRCS_MIN+= Analysis/Delinearization.cpp SRCS_MIN+= Analysis/DemandedBits.cpp SRCS_MIN+= Analysis/DependenceAnalysis.cpp +SRCS_MIN+= Analysis/DependenceGraphBuilder.cpp SRCS_MIN+= Analysis/DivergenceAnalysis.cpp SRCS_MIN+= Analysis/DomPrinter.cpp SRCS_MIN+= Analysis/DomTreeUpdater.cpp @@ -88,6 +90,7 @@ SRCS_MIN+= Analysis/Lint.cpp SRCS_MIN+= Analysis/Loads.cpp SRCS_MIN+= Analysis/LoopAccessAnalysis.cpp SRCS_MIN+= Analysis/LoopAnalysisManager.cpp +SRCS_MIN+= Analysis/LoopCacheAnalysis.cpp SRCS_MIN+= Analysis/LoopInfo.cpp SRCS_MIN+= Analysis/LoopPass.cpp SRCS_MIN+= Analysis/LoopUnrollAnalyzer.cpp @@ -127,6 +130,7 @@ SRCS_MIN+= Analysis/TargetLibraryInfo.cpp SRCS_MIN+= Analysis/TargetTransformInfo.cpp SRCS_MIN+= Analysis/TypeBasedAliasAnalysis.cpp SRCS_MIN+= Analysis/TypeMetadataUtils.cpp +SRCS_MIN+= Analysis/VFABIDemangling.cpp SRCS_MIN+= Analysis/ValueLattice.cpp SRCS_MIN+= Analysis/ValueLatticeUtils.cpp SRCS_MIN+= Analysis/ValueTracking.cpp @@ -137,6 +141,7 @@ SRCS_MIN+= AsmParser/Parser.cpp SRCS_MIN+= BinaryFormat/Dwarf.cpp SRCS_MIN+= BinaryFormat/Magic.cpp SRCS_MIN+= BinaryFormat/Wasm.cpp +SRCS_MIN+= BinaryFormat/XCOFF.cpp SRCS_MIN+= Bitcode/Reader/BitReader.cpp SRCS_EXT+= Bitcode/Reader/BitcodeAnalyzer.cpp SRCS_MIN+= Bitcode/Reader/BitcodeReader.cpp @@ -180,6 +185,7 @@ SRCS_MIN+= CodeGen/BranchFolding.cpp SRCS_MIN+= CodeGen/BranchRelaxation.cpp SRCS_MIN+= CodeGen/BreakFalseDeps.cpp SRCS_EXT+= CodeGen/BuiltinGCs.cpp +SRCS_MIN+= CodeGen/CFGuardLongjmp.cpp SRCS_MIN+= CodeGen/CFIInstrInserter.cpp SRCS_MIN+= CodeGen/CalcSpillWeights.cpp SRCS_MIN+= CodeGen/CallingConvLower.cpp @@ -210,6 +216,7 @@ SRCS_MIN+= CodeGen/GlobalISel/Combiner.cpp SRCS_MIN+= CodeGen/GlobalISel/CombinerHelper.cpp SRCS_MIN+= CodeGen/GlobalISel/CallLowering.cpp SRCS_MIN+= CodeGen/GlobalISel/GISelChangeObserver.cpp +SRCS_MIN+= CodeGen/GlobalISel/GISelKnownBits.cpp SRCS_MIN+= CodeGen/GlobalISel/GlobalISel.cpp SRCS_MIN+= CodeGen/GlobalISel/IRTranslator.cpp SRCS_MIN+= CodeGen/GlobalISel/InstructionSelect.cpp @@ -257,11 +264,13 @@ SRCS_MIN+= CodeGen/LoopTraversal.cpp SRCS_MIN+= CodeGen/LowLevelType.cpp SRCS_MIN+= CodeGen/LowerEmuTLS.cpp SRCS_MIN+= CodeGen/MIRCanonicalizerPass.cpp +SRCS_MIN+= CodeGen/MIRNamerPass.cpp SRCS_EXT+= CodeGen/MIRParser/MILexer.cpp SRCS_EXT+= CodeGen/MIRParser/MIParser.cpp SRCS_EXT+= CodeGen/MIRParser/MIRParser.cpp SRCS_MIN+= CodeGen/MIRPrinter.cpp SRCS_MIN+= CodeGen/MIRPrintingPass.cpp +SRCS_MIN+= CodeGen/MIRVRegNamerUtils.cpp SRCS_MIN+= CodeGen/MachineBasicBlock.cpp SRCS_MIN+= CodeGen/MachineBlockFrequencyInfo.cpp SRCS_MIN+= CodeGen/MachineBlockPlacement.cpp @@ -279,6 +288,7 @@ SRCS_MIN+= CodeGen/MachineInstr.cpp SRCS_MIN+= CodeGen/MachineInstrBundle.cpp SRCS_MIN+= CodeGen/MachineLICM.cpp SRCS_MIN+= CodeGen/MachineLoopInfo.cpp +SRCS_MIN+= CodeGen/MachineLoopUtils.cpp SRCS_MIN+= CodeGen/MachineModuleInfo.cpp SRCS_MIN+= CodeGen/MachineModuleInfoImpls.cpp SRCS_MIN+= CodeGen/MachineOperand.cpp @@ -291,9 +301,11 @@ SRCS_MIN+= CodeGen/MachineRegisterInfo.cpp SRCS_MIN+= CodeGen/MachineSSAUpdater.cpp SRCS_MIN+= CodeGen/MachineScheduler.cpp SRCS_MIN+= CodeGen/MachineSink.cpp +SRCS_MIN+= CodeGen/MachineSizeOpts.cpp SRCS_MIN+= CodeGen/MachineTraceMetrics.cpp SRCS_MIN+= CodeGen/MachineVerifier.cpp SRCS_MIN+= CodeGen/MacroFusion.cpp +SRCS_MIN+= CodeGen/ModuloSchedule.cpp SRCS_MIN+= CodeGen/OptimizePHIs.cpp SRCS_MIN+= CodeGen/PHIElimination.cpp SRCS_MIN+= CodeGen/PHIEliminationUtils.cpp @@ -379,6 +391,7 @@ SRCS_MIN+= CodeGen/TargetRegisterInfo.cpp SRCS_MIN+= CodeGen/TargetSchedule.cpp SRCS_MIN+= CodeGen/TargetSubtargetInfo.cpp SRCS_MIN+= CodeGen/TwoAddressInstructionPass.cpp +SRCS_MIN+= CodeGen/TypePromotion.cpp SRCS_MIN+= CodeGen/UnreachableBlockElim.cpp SRCS_MIN+= CodeGen/ValueTypes.cpp SRCS_MIN+= CodeGen/VirtRegMap.cpp @@ -567,9 +580,7 @@ SRCS_EXT+= ExecutionEngine/Orc/Legacy.cpp SRCS_EXT+= ExecutionEngine/Orc/NullResolver.cpp SRCS_EXT+= ExecutionEngine/Orc/OrcABISupport.cpp SRCS_EXT+= ExecutionEngine/Orc/OrcCBindings.cpp -SRCS_EXT+= ExecutionEngine/Orc/OrcError.cpp SRCS_EXT+= ExecutionEngine/Orc/OrcMCJITReplacement.cpp -SRCS_EXT+= ExecutionEngine/Orc/RPCUtils.cpp SRCS_EXT+= ExecutionEngine/Orc/RTDyldObjectLinkingLayer.cpp SRCS_EXT+= ExecutionEngine/Orc/ThreadSafeModule.cpp SRCS_XDB+= ExecutionEngine/RuntimeDyld/JITSymbol.cpp @@ -582,6 +593,8 @@ SRCS_XDB+= ExecutionEngine/RuntimeDyld/RuntimeDyldMachO.cpp SRCS_XDB+= ExecutionEngine/RuntimeDyld/Targets/RuntimeDyldELFMips.cpp SRCS_XDB+= ExecutionEngine/SectionMemoryManager.cpp SRCS_XDB+= ExecutionEngine/TargetSelect.cpp +SRCS_MIN+= Frontend/OpenMP/OMPConstants.cpp +SRCS_MIN+= Frontend/OpenMP/OMPIRBuilder.cpp SRCS_MIN+= IR/AbstractCallSite.cpp SRCS_MIN+= IR/AsmWriter.cpp SRCS_MIN+= IR/Attributes.cpp @@ -601,6 +614,7 @@ SRCS_MIN+= IR/DiagnosticHandler.cpp SRCS_MIN+= IR/DiagnosticInfo.cpp SRCS_MIN+= IR/DiagnosticPrinter.cpp SRCS_MIN+= IR/Dominators.cpp +SRCS_MIN+= IR/FPEnv.cpp SRCS_MIN+= IR/Function.cpp SRCS_MIN+= IR/GVMaterializer.cpp SRCS_MIN+= IR/Globals.cpp @@ -660,7 +674,6 @@ SRCS_MIN+= MC/MCAsmMacro.cpp SRCS_MIN+= MC/MCAsmStreamer.cpp SRCS_MIN+= MC/MCAssembler.cpp SRCS_MIN+= MC/MCCodeEmitter.cpp -SRCS_MIN+= MC/MCCodePadder.cpp SRCS_MIN+= MC/MCCodeView.cpp SRCS_MIN+= MC/MCContext.cpp SRCS_XDL+= MC/MCDisassembler/Disassembler.cpp @@ -779,7 +792,7 @@ SRCS_MIN+= Option/OptTable.cpp SRCS_MIN+= Option/Option.cpp SRCS_MIN+= Passes/PassBuilder.cpp SRCS_MIN+= Passes/PassPlugin.cpp -SRCS_EXT+= Passes/StandardInstrumentations.cpp +SRCS_MIN+= Passes/StandardInstrumentations.cpp SRCS_MIN+= ProfileData/Coverage/CoverageMapping.cpp SRCS_MIN+= ProfileData/Coverage/CoverageMappingReader.cpp SRCS_MIN+= ProfileData/Coverage/CoverageMappingWriter.cpp @@ -791,7 +804,9 @@ SRCS_MIN+= ProfileData/ProfileSummaryBuilder.cpp SRCS_MIN+= ProfileData/SampleProf.cpp SRCS_MIN+= ProfileData/SampleProfReader.cpp SRCS_MIN+= ProfileData/SampleProfWriter.cpp +SRCS_MIN+= Remarks/BitstreamRemarkSerializer.cpp SRCS_MIN+= Remarks/RemarkFormat.cpp +SRCS_MIN+= Remarks/RemarkSerializer.cpp SRCS_MIN+= Remarks/RemarkStringTable.cpp SRCS_MIN+= Remarks/YAMLRemarkSerializer.cpp SRCS_MIN+= Support/AArch64TargetParser.cpp @@ -830,7 +845,7 @@ SRCS_MIN+= Support/Errno.cpp SRCS_MIN+= Support/Error.cpp SRCS_MIN+= Support/ErrorHandling.cpp SRCS_EXL+= Support/FileOutputBuffer.cpp -SRCS_EXT+= Support/FileUtilities.cpp +SRCS_MIN+= Support/FileUtilities.cpp SRCS_MIN+= Support/FoldingSet.cpp SRCS_MIN+= Support/FormatVariadic.cpp SRCS_MIN+= Support/FormattedStream.cpp @@ -843,7 +858,6 @@ SRCS_MIN+= Support/IntEqClasses.cpp SRCS_MIN+= Support/IntervalMap.cpp SRCS_MIN+= Support/ItaniumManglingCanonicalizer.cpp SRCS_MIN+= Support/JSON.cpp -SRCS_MIN+= Support/JamCRC.cpp SRCS_MIN+= Support/KnownBits.cpp SRCS_MIN+= Support/LEB128.cpp SRCS_MIN+= Support/LineIterator.cpp @@ -960,6 +974,7 @@ SRCS_MIN+= Target/AArch64/AArch64SIMDInstrOpt.cpp SRCS_MIN+= Target/AArch64/AArch64SelectionDAGInfo.cpp SRCS_MIN+= Target/AArch64/AArch64SpeculationHardening.cpp SRCS_MIN+= Target/AArch64/AArch64StackTagging.cpp +SRCS_MIN+= Target/AArch64/AArch64StackTaggingPreRA.cpp SRCS_MIN+= Target/AArch64/AArch64StorePairSuppress.cpp SRCS_MIN+= Target/AArch64/AArch64Subtarget.cpp SRCS_MIN+= Target/AArch64/AArch64TargetMachine.cpp @@ -991,7 +1006,6 @@ SRCS_MIN+= Target/ARM/ARMBaseRegisterInfo.cpp SRCS_MIN+= Target/ARM/ARMBasicBlockInfo.cpp SRCS_MIN+= Target/ARM/ARMCallLowering.cpp SRCS_MIN+= Target/ARM/ARMCallingConv.cpp -SRCS_MIN+= Target/ARM/ARMCodeGenPrepare.cpp SRCS_MIN+= Target/ARM/ARMConstantIslandPass.cpp SRCS_MIN+= Target/ARM/ARMConstantPoolValue.cpp SRCS_MIN+= Target/ARM/ARMExpandPseudoInsts.cpp @@ -1034,6 +1048,9 @@ SRCS_MIN+= Target/ARM/MCTargetDesc/ARMUnwindOpAsm.cpp SRCS_MIN+= Target/ARM/MCTargetDesc/ARMWinCOFFObjectWriter.cpp SRCS_MIN+= Target/ARM/MCTargetDesc/ARMWinCOFFStreamer.cpp SRCS_MIN+= Target/ARM/MLxExpansionPass.cpp +SRCS_MIN+= Target/ARM/MVEGatherScatterLowering.cpp +SRCS_MIN+= Target/ARM/MVETailPredication.cpp +SRCS_MIN+= Target/ARM/MVEVPTBlockPass.cpp SRCS_MIN+= Target/ARM/TargetInfo/ARMTargetInfo.cpp SRCS_MIN+= Target/ARM/Thumb1FrameLowering.cpp SRCS_MIN+= Target/ARM/Thumb1InstrInfo.cpp @@ -1153,7 +1170,8 @@ SRCS_MIN+= Target/PowerPC/PPCHazardRecognizers.cpp SRCS_MIN+= Target/PowerPC/PPCISelDAGToDAG.cpp SRCS_MIN+= Target/PowerPC/PPCISelLowering.cpp SRCS_MIN+= Target/PowerPC/PPCInstrInfo.cpp -SRCS_MIN+= Target/PowerPC/PPCLoopPreIncPrep.cpp +SRCS_MIN+= Target/PowerPC/PPCLoopInstrFormPrep.cpp +SRCS_MIN+= Target/PowerPC/PPCLowerMASSVEntries.cpp SRCS_MIN+= Target/PowerPC/PPCMCInstLower.cpp SRCS_MIN+= Target/PowerPC/PPCMIPeephole.cpp SRCS_MIN+= Target/PowerPC/PPCMachineFunctionInfo.cpp @@ -1186,13 +1204,17 @@ SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCExpr.cpp SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVMCTargetDesc.cpp SRCS_MIN+= Target/RISCV/MCTargetDesc/RISCVTargetStreamer.cpp SRCS_MIN+= Target/RISCV/RISCVAsmPrinter.cpp +SRCS_MIN+= Target/RISCV/RISCVCallLowering.cpp SRCS_MIN+= Target/RISCV/RISCVExpandPseudoInsts.cpp SRCS_MIN+= Target/RISCV/RISCVFrameLowering.cpp SRCS_MIN+= Target/RISCV/RISCVInstrInfo.cpp +SRCS_MIN+= Target/RISCV/RISCVInstructionSelector.cpp SRCS_MIN+= Target/RISCV/RISCVISelDAGToDAG.cpp SRCS_MIN+= Target/RISCV/RISCVISelLowering.cpp +SRCS_MIN+= Target/RISCV/RISCVLegalizerInfo.cpp SRCS_MIN+= Target/RISCV/RISCVMCInstLower.cpp SRCS_MIN+= Target/RISCV/RISCVMergeBaseOffset.cpp +SRCS_MIN+= Target/RISCV/RISCVRegisterBankInfo.cpp SRCS_MIN+= Target/RISCV/RISCVRegisterInfo.cpp SRCS_MIN+= Target/RISCV/RISCVSubtarget.cpp SRCS_MIN+= Target/RISCV/RISCVTargetMachine.cpp @@ -1235,7 +1257,6 @@ SRCS_MIN+= Target/TargetMachineC.cpp .if ${MK_LLVM_TARGET_X86} != "no" SRCS_MIN+= Target/X86/AsmParser/X86AsmParser.cpp SRCS_XDW+= Target/X86/Disassembler/X86Disassembler.cpp -SRCS_XDW+= Target/X86/Disassembler/X86DisassemblerDecoder.cpp SRCS_MIN+= Target/X86/MCTargetDesc/X86ATTInstPrinter.cpp SRCS_MIN+= Target/X86/MCTargetDesc/X86AsmBackend.cpp SRCS_MIN+= Target/X86/MCTargetDesc/X86ELFObjectWriter.cpp @@ -1253,6 +1274,7 @@ SRCS_MIN+= Target/X86/TargetInfo/X86TargetInfo.cpp SRCS_MIN+= Target/X86/Utils/X86ShuffleDecode.cpp SRCS_MIN+= Target/X86/X86AsmPrinter.cpp SRCS_MIN+= Target/X86/X86AvoidStoreForwardingBlocks.cpp +SRCS_MIN+= Target/X86/X86AvoidTrailingCall.cpp SRCS_MIN+= Target/X86/X86CallFrameOptimization.cpp SRCS_MIN+= Target/X86/X86CallLowering.cpp SRCS_MIN+= Target/X86/X86CallingConv.cpp @@ -1302,6 +1324,7 @@ SRCS_MIN+= ToolDrivers/llvm-dlltool/DlltoolDriver.cpp SRCS_MIW+= ToolDrivers/llvm-lib/LibDriver.cpp SRCS_MIN+= Transforms/AggressiveInstCombine/AggressiveInstCombine.cpp SRCS_MIN+= Transforms/AggressiveInstCombine/TruncInstCombine.cpp +SRCS_MIN+= Transforms/CFGuard/CFGuard.cpp SRCS_MIN+= Transforms/Coroutines/CoroCleanup.cpp SRCS_MIN+= Transforms/Coroutines/CoroEarly.cpp SRCS_MIN+= Transforms/Coroutines/CoroElide.cpp @@ -1376,6 +1399,7 @@ SRCS_MIN+= Transforms/Instrumentation/PGOMemOPSizeOpt.cpp SRCS_MIN+= Transforms/Instrumentation/PoisonChecking.cpp SRCS_MIN+= Transforms/Instrumentation/SanitizerCoverage.cpp SRCS_MIN+= Transforms/Instrumentation/ThreadSanitizer.cpp +SRCS_MIN+= Transforms/Instrumentation/ValueProfileCollector.cpp SRCS_MIN+= Transforms/ObjCARC/DependencyAnalysis.cpp SRCS_EXT+= Transforms/ObjCARC/ObjCARC.cpp SRCS_MIN+= Transforms/ObjCARC/ObjCARCAPElim.cpp @@ -1430,8 +1454,10 @@ SRCS_MIN+= Transforms/Scalar/LoopUnrollAndJamPass.cpp SRCS_MIN+= Transforms/Scalar/LoopUnswitch.cpp SRCS_MIN+= Transforms/Scalar/LoopVersioningLICM.cpp SRCS_MIN+= Transforms/Scalar/LowerAtomic.cpp +SRCS_MIN+= Transforms/Scalar/LowerConstantIntrinsics.cpp SRCS_MIN+= Transforms/Scalar/LowerExpectIntrinsic.cpp SRCS_MIN+= Transforms/Scalar/LowerGuardIntrinsic.cpp +SRCS_MIN+= Transforms/Scalar/LowerMatrixIntrinsics.cpp SRCS_MIN+= Transforms/Scalar/LowerWidenableCondition.cpp SRCS_MIN+= Transforms/Scalar/MakeGuardsExplicit.cpp SRCS_MIN+= Transforms/Scalar/MemCpyOptimizer.cpp @@ -1469,6 +1495,7 @@ SRCS_MIN+= Transforms/Utils/CanonicalizeAliases.cpp SRCS_MIN+= Transforms/Utils/CloneFunction.cpp SRCS_MIN+= Transforms/Utils/CloneModule.cpp SRCS_MIN+= Transforms/Utils/CodeExtractor.cpp +SRCS_MIN+= Transforms/Utils/CodeMoverUtils.cpp SRCS_MIN+= Transforms/Utils/CtorUtils.cpp SRCS_MIN+= Transforms/Utils/DemoteRegToStack.cpp SRCS_MIN+= Transforms/Utils/EntryExitInstrumenter.cpp @@ -1480,6 +1507,7 @@ SRCS_MIN+= Transforms/Utils/FunctionImportUtils.cpp SRCS_MIN+= Transforms/Utils/GlobalStatus.cpp SRCS_MIN+= Transforms/Utils/GuardUtils.cpp SRCS_MIN+= Transforms/Utils/ImportedFunctionsInliningStatistics.cpp +SRCS_MIN+= Transforms/Utils/InjectTLIMappings.cpp SRCS_MIN+= Transforms/Utils/InlineFunction.cpp SRCS_MIN+= Transforms/Utils/InstructionNamer.cpp SRCS_MIN+= Transforms/Utils/IntegerDivision.cpp @@ -1498,6 +1526,7 @@ SRCS_MIN+= Transforms/Utils/LowerInvoke.cpp SRCS_MIN+= Transforms/Utils/LowerSwitch.cpp SRCS_MIN+= Transforms/Utils/Mem2Reg.cpp SRCS_MIN+= Transforms/Utils/MetaRenamer.cpp +SRCS_MIN+= Transforms/Utils/MisExpect.cpp SRCS_MIN+= Transforms/Utils/ModuleUtils.cpp SRCS_MIN+= Transforms/Utils/NameAnonGlobals.cpp SRCS_MIN+= Transforms/Utils/PredicateInfo.cpp @@ -1522,8 +1551,8 @@ SRCS_MIN+= Transforms/Vectorize/LoopVectorize.cpp SRCS_MIN+= Transforms/Vectorize/SLPVectorizer.cpp SRCS_MIN+= Transforms/Vectorize/VPlan.cpp SRCS_MIN+= Transforms/Vectorize/VPlanHCFGBuilder.cpp -SRCS_MIN+= Transforms/Vectorize/VPlanHCFGTransforms.cpp SRCS_MIN+= Transforms/Vectorize/VPlanPredicator.cpp +SRCS_MIN+= Transforms/Vectorize/VPlanTransforms.cpp SRCS_MIN+= Transforms/Vectorize/VPlanVerifier.cpp SRCS_EXT+= Transforms/Vectorize/Vectorize.cpp SRCS_EXT+= XRay/BlockIndexer.cpp @@ -1585,6 +1614,17 @@ llvm/IR/IntrinsicImpl.inc: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td TGHDRS+= llvm/IR/IntrinsicImpl.inc +.for arch in \ + AArch64/aarch64 AMDGPU/amdgcn ARM/arm BPF/bpf Hexagon/hexagon \ + Mips/mips NVPTX/nvvm PowerPC/ppc R600/r600 RISCV/riscv S390/s390 \ + WebAssembly/wasm X86/x86 XCore/xcore +llvm/IR/Intrinsics${arch:H}.h: ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td + ${LLVM_TBLGEN} -gen-intrinsic-enums -intrinsic-prefix=${arch:T} \ + -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \ + ${LLVM_SRCS}/include/llvm/IR/Intrinsics.td +TGHDRS+= llvm/IR/Intrinsics${arch:H}.h +.endfor + AttributesCompatFunc.inc: ${LLVM_SRCS}/lib/IR/AttributesCompatFunc.td ${LLVM_TBLGEN} -gen-attrs \ -I ${LLVM_SRCS}/include -d ${.TARGET}.d -o ${.TARGET} \ @@ -1636,6 +1676,7 @@ beforebuild: DisassemblerTables/-gen-disassembler \ EVEX2VEXTables/-gen-x86-EVEX2VEX-tables \ FastISel/-gen-fast-isel \ + GICombiner/-gen-global-isel-combiner,-combiners=${arch:H}PreLegalizerCombinerHelper \ GlobalISel/-gen-global-isel \ InstrInfo/-gen-instr-info \ MCCodeEmitter/-gen-emitter \ @@ -1660,6 +1701,7 @@ TGHDRS+= AArch64GenCallingConv.inc TGHDRS+= AArch64GenDAGISel.inc TGHDRS+= AArch64GenDisassemblerTables.inc TGHDRS+= AArch64GenFastISel.inc +TGHDRS+= AArch64GenGICombiner.inc TGHDRS+= AArch64GenGlobalISel.inc TGHDRS+= AArch64GenInstrInfo.inc TGHDRS+= AArch64GenMCCodeEmitter.inc @@ -1731,9 +1773,11 @@ TGHDRS+= RISCVGenCompressInstEmitter.inc TGHDRS+= RISCVGenDAGISel.inc TGHDRS+= RISCVGenDisassemblerTables.inc TGHDRS+= RISCVGenDAGISel.inc +TGHDRS+= RISCVGenGlobalISel.inc TGHDRS+= RISCVGenInstrInfo.inc TGHDRS+= RISCVGenMCCodeEmitter.inc TGHDRS+= RISCVGenMCPseudoLowering.inc +TGHDRS+= RISCVGenRegisterBank.inc TGHDRS+= RISCVGenRegisterInfo.inc TGHDRS+= RISCVGenSubtargetInfo.inc TGHDRS+= RISCVGenSystemOperands.inc