Only support a 4 level smmu page table
We only ever build a 4 level page table for the Arm SMMU. Remove the support for a 3 level table. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D38949
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@ -388,8 +388,8 @@ _smmu_pmap_unwire_l3(pmap_t pmap, vm_offset_t va, vm_page_t m,
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smmu_pmap_add_delayed_free_list(m, free, TRUE);
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}
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static int
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smmu_pmap_pinit_levels(pmap_t pmap, int levels)
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int
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smmu_pmap_pinit(pmap_t pmap)
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{
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vm_page_t m;
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@ -404,31 +404,12 @@ smmu_pmap_pinit_levels(pmap_t pmap, int levels)
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vm_radix_init(&pmap->pm_root);
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bzero(&pmap->pm_stats, sizeof(pmap->pm_stats));
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MPASS(levels == 3 || levels == 4);
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pmap->pm_levels = levels;
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/*
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* Allocate the level 1 entry to use as the root. This will increase
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* the refcount on the level 1 page so it won't be removed until
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* pmap_release() is called.
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*/
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if (pmap->pm_levels == 3) {
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PMAP_LOCK(pmap);
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m = _pmap_alloc_l3(pmap, NUL2E + NUL1E);
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PMAP_UNLOCK(pmap);
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}
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pmap->pm_levels = 4;
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pmap->pm_ttbr = VM_PAGE_TO_PHYS(m);
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return (1);
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}
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int
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smmu_pmap_pinit(pmap_t pmap)
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{
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return (smmu_pmap_pinit_levels(pmap, 4));
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}
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/*
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* This routine is called if the desired page table page does not exist.
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*
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@ -567,26 +548,8 @@ _pmap_alloc_l3(pmap_t pmap, vm_pindex_t ptepindex)
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void
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smmu_pmap_release(pmap_t pmap)
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{
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boolean_t rv __diagused;
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struct spglist free;
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vm_page_t m;
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if (pmap->pm_levels != 4) {
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KASSERT(pmap->pm_stats.resident_count == 1,
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("pmap_release: pmap resident count %ld != 0",
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pmap->pm_stats.resident_count));
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KASSERT((pmap->pm_l0[0] & ATTR_DESCR_VALID) == ATTR_DESCR_VALID,
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("pmap_release: Invalid l0 entry: %lx", pmap->pm_l0[0]));
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SLIST_INIT(&free);
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m = PHYS_TO_VM_PAGE(pmap->pm_ttbr);
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PMAP_LOCK(pmap);
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rv = smmu_pmap_unwire_l3(pmap, 0, m, &free);
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PMAP_UNLOCK(pmap);
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MPASS(rv == TRUE);
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vm_page_free_pages_toq(&free, true);
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}
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KASSERT(pmap->pm_stats.resident_count == 0,
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("pmap_release: pmap resident count %ld != 0",
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pmap->pm_stats.resident_count));
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