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Work around paging bug. Somehow we seem to be ending up with entries in

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the TLB which don't correspond to ptes with PG_V set; prior to this commit
I'm sometimes getting the wrong data when pages are loaded into the buffer
cache (they're being loaded, but the missing TLB invalidation is causing
the wrong data to be visible).
This commit is contained in:
Colin Percival 2010-11-25 15:41:34 +00:00
parent 1a3b2b87de
commit 98702b3990
1 changed files with 12 additions and 0 deletions
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12
sys/i386/xen/pmap.c
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@ -1292,7 +1292,19 @@ pmap_qenter(vm_offset_t sva, vm_page_t *ma, int count)
mclp->args[0] = va;
mclp->args[1] = (uint32_t)(pa & 0xffffffff);
mclp->args[2] = (uint32_t)(pa >> 32);
#if 0
mclp->args[3] = (*pte & PG_V) ? UVMF_INVLPG|UVMF_ALL : 0;
#else
/*
* Somehow we seem to be ending up with pages which are in
* the TLB in spite of not having PG_V set, resulting in
* pages newly loaded into the bufcache not showing up
* immediately (i.e., accessing them provides the old data).
* As a workaround, always perform a TLB flush, even if the
* old page didn't have PG_V.
*/
mclp->args[3] = UVMF_INVLPG|UVMF_ALL;
#endif
va += PAGE_SIZE;
pte++;