Addition of splsoftvm and a VM SWI to handle bus dma related callbacks.
This SWI may be useful for other, defered, VM tasks.
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.38 1997/12/04 19:46:26 smp Exp smp $
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* $Id: apic_vector.s,v 1.24 1997/12/08 22:59:34 fsmp Exp $
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*/
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@ -649,7 +649,7 @@ ihandlers:
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*/
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.long swi_tty, swi_net
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.long dummycamisr, dummycamisr
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.long 0, 0
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.long _swi_vm, 0
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.long _softclock, swi_ast
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imasks: /* masks for interrupt handlers */
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@ -657,7 +657,7 @@ imasks: /* masks for interrupt handlers */
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.long SWI_TTY_MASK, SWI_NET_MASK
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.long SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long 0, 0
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.long SWI_VM_MASK, 0
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.long SWI_CLOCK_MASK, SWI_AST_MASK
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/*
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: icu_vector.s,v 1.5 1997/09/21 21:41:05 gibbs Exp $
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* $Id: icu_vector.s,v 1.6 1997/09/28 19:30:01 gibbs Exp $
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*/
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/*
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@ -203,7 +203,7 @@ ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long swi_tty, swi_net, dummycamisr, dummycamisr
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.long 0, 0, 0, 0
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.long _swi_vm, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, _softclock, swi_ast
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@ -211,7 +211,7 @@ imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long 0, 0, 0, 0
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.long SWI_VM_MASK, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, SWI_AST_MASK
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: icu_vector.s,v 1.5 1997/09/21 21:41:05 gibbs Exp $
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* $Id: icu_vector.s,v 1.6 1997/09/28 19:30:01 gibbs Exp $
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*/
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/*
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@ -203,7 +203,7 @@ ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long swi_tty, swi_net, dummycamisr, dummycamisr
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.long 0, 0, 0, 0
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.long _swi_vm, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, _softclock, swi_ast
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@ -211,7 +211,7 @@ imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long 0, 0, 0, 0
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.long SWI_VM_MASK, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, SWI_AST_MASK
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: icu_vector.s,v 1.5 1997/09/21 21:41:05 gibbs Exp $
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* $Id: icu_vector.s,v 1.6 1997/09/28 19:30:01 gibbs Exp $
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*/
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/*
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@ -203,7 +203,7 @@ ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long swi_tty, swi_net, dummycamisr, dummycamisr
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.long 0, 0, 0, 0
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.long _swi_vm, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, _softclock, swi_ast
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@ -211,7 +211,7 @@ imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long 0, 0, 0, 0
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.long SWI_VM_MASK, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, SWI_AST_MASK
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.38 1997/12/04 19:46:26 smp Exp smp $
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* $Id: apic_vector.s,v 1.24 1997/12/08 22:59:34 fsmp Exp $
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*/
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@ -649,7 +649,7 @@ ihandlers:
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*/
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.long swi_tty, swi_net
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.long dummycamisr, dummycamisr
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.long 0, 0
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.long _swi_vm, 0
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.long _softclock, swi_ast
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imasks: /* masks for interrupt handlers */
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@ -657,7 +657,7 @@ imasks: /* masks for interrupt handlers */
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.long SWI_TTY_MASK, SWI_NET_MASK
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.long SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long 0, 0
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.long SWI_VM_MASK, 0
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.long SWI_CLOCK_MASK, SWI_AST_MASK
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/*
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: apic_vector.s,v 1.38 1997/12/04 19:46:26 smp Exp smp $
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* $Id: apic_vector.s,v 1.24 1997/12/08 22:59:34 fsmp Exp $
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*/
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@ -649,7 +649,7 @@ ihandlers:
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*/
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.long swi_tty, swi_net
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.long dummycamisr, dummycamisr
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.long 0, 0
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.long _swi_vm, 0
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.long _softclock, swi_ast
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imasks: /* masks for interrupt handlers */
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@ -657,7 +657,7 @@ imasks: /* masks for interrupt handlers */
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.long SWI_TTY_MASK, SWI_NET_MASK
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.long SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long 0, 0
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.long SWI_VM_MASK, 0
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.long SWI_CLOCK_MASK, SWI_AST_MASK
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/*
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: icu_vector.s,v 1.5 1997/09/21 21:41:05 gibbs Exp $
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* $Id: icu_vector.s,v 1.6 1997/09/28 19:30:01 gibbs Exp $
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*/
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/*
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@ -203,7 +203,7 @@ ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long swi_tty, swi_net, dummycamisr, dummycamisr
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.long 0, 0, 0, 0
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.long _swi_vm, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, _softclock, swi_ast
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@ -211,7 +211,7 @@ imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long 0, 0, 0, 0
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.long SWI_VM_MASK, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, SWI_AST_MASK
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@ -1,6 +1,6 @@
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/*
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* from: vector.s, 386BSD 0.1 unknown origin
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* $Id: icu_vector.s,v 1.5 1997/09/21 21:41:05 gibbs Exp $
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* $Id: icu_vector.s,v 1.6 1997/09/28 19:30:01 gibbs Exp $
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*/
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/*
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@ -203,7 +203,7 @@ ihandlers: /* addresses of interrupt handlers */
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.long Xresume8, Xresume9, Xresume10, Xresume11
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.long Xresume12, Xresume13, Xresume14, Xresume15
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.long swi_tty, swi_net, dummycamisr, dummycamisr
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.long 0, 0, 0, 0
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.long _swi_vm, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, _softclock, swi_ast
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@ -211,7 +211,7 @@ imasks: /* masks for interrupt handlers */
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.space NHWI*4 /* padding; HWI masks are elsewhere */
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.long SWI_TTY_MASK, SWI_NET_MASK, SWI_CAMNET_MASK, SWI_CAMBIO_MASK
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.long 0, 0, 0, 0
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.long SWI_VM_MASK, 0, 0, 0
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.long 0, 0, 0, 0
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.long 0, 0, SWI_CLOCK_MASK, SWI_AST_MASK
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@ -23,7 +23,7 @@
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: ipl_funcs.c,v 1.9 1997/09/21 21:41:16 gibbs Exp $
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* $Id: ipl_funcs.c,v 1.11 1997/09/28 19:34:48 fsmp Exp $
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*/
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#include <sys/types.h>
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@ -49,11 +49,13 @@ DO_SETBITS(setsoftnet, &ipending, SWI_NET_PENDING)
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DO_SETBITS(setsofttty, &ipending, SWI_TTY_PENDING)
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DO_SETBITS(setsoftcamnet,&ipending, SWI_CAMNET_PENDING)
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DO_SETBITS(setsoftcambio,&ipending, SWI_CAMBIO_PENDING)
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DO_SETBITS(setsoftvm, &ipending, SWI_VM_PENDING)
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DO_SETBITS(schedsoftnet, &idelayed, SWI_NET_PENDING)
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DO_SETBITS(schedsofttty, &idelayed, SWI_TTY_PENDING)
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DO_SETBITS(schedsoftcamnet, &idelayed, SWI_CAMNET_PENDING)
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DO_SETBITS(schedsoftcambio, &idelayed, SWI_CAMBIO_PENDING)
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DO_SETBITS(schedsoftvm, &idelayed, SWI_VM_PENDING)
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unsigned
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softclockpending(void)
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@ -85,6 +87,7 @@ GENSPL(splsofttty, cpl |= SWI_TTY_MASK)
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GENSPL(splstatclock, cpl |= stat_imask)
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GENSPL(spltty, cpl |= tty_imask)
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GENSPL(splvm, cpl |= net_imask | bio_imask)
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GENSPL(splsoftvm, cpl |= SWI_VM_MASK)
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void
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spl0(void)
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@ -137,11 +140,13 @@ DO_SETBITS(setsoftnet, &ipending, SWI_NET_PENDING)
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DO_SETBITS(setsofttty, &ipending, SWI_TTY_PENDING)
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DO_SETBITS(setsoftcamnet,&ipending, SWI_CAMNET_PENDING)
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DO_SETBITS(setsoftcambio,&ipending, SWI_CAMBIO_PENDING)
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DO_SETBITS(setsoftvm, &ipending, SWI_VM_PENDING)
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DO_SETBITS(schedsoftnet, &idelayed, SWI_NET_PENDING)
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DO_SETBITS(schedsofttty, &idelayed, SWI_TTY_PENDING)
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DO_SETBITS(schedsoftcamnet, &idelayed, SWI_CAMNET_PENDING)
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DO_SETBITS(schedsoftcambio, &idelayed, SWI_CAMBIO_PENDING)
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DO_SETBITS(schedsoftvm, &idelayed, SWI_VM_PENDING)
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unsigned
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softclockpending(void)
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@ -243,6 +248,7 @@ GENSPL(splsofttty, |=, SWI_TTY_MASK, 12)
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GENSPL(splstatclock, |=, stat_imask, 13)
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GENSPL(spltty, |=, tty_imask, 14)
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GENSPL(splvm, |=, net_imask | bio_imask, 15)
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GENSPL(splsoftvm, |=, SWI_VM_MASK, 16)
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#else /* INTR_SPL */
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@ -279,6 +285,7 @@ GENSPL(splsofttty, cpl |= SWI_TTY_MASK)
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GENSPL(splstatclock, cpl |= stat_imask)
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GENSPL(spltty, cpl |= tty_imask)
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GENSPL(splvm, cpl |= net_imask | bio_imask)
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GENSPL(splsoftvm, cpl |= SWI_VM_MASK)
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#endif /* INTR_SPL */
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