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Bring in the mpr(4) driver for LSI's MPT3 12Gb SAS controllers.

Browse Source 
This is derived from the mps(4) driver, but it supports only the 12Gb
IT and IR hardware including the SAS 3004, SAS 3008 and SAS 3108.

Some notes about this driver:
 o The 12Gb hardware can do "FastPath" I/O, and that capability is included in
   this driver.

 o WarpDrive functionality has been removed, since it isn't supported in
   the 12Gb driver interface.

 o The Scatter/Gather list handling code is significantly different between
   the 6Gb and 12Gb hardware.  The 12Gb boards support IEEE Scatter/Gather
   lists.

Thanks to LSI for developing and testing this driver for FreeBSD.

share/man/man4/mpr.4:
	mpr(4) man page.

sys/dev/mpr/*:
	mpr(4) driver files.

sys/modules/Makefile,
sys/modules/mpr/Makefile:
	Add a module Makefile for the mpr(4) driver.

sys/conf/files:
	Add the mpr(4) driver.

sys/amd64/conf/GENERIC,
sys/i386/conf/GENERIC,
sys/mips/conf/OCTEON1,
sys/sparc64/conf/GENERIC:
	Add the mpr(4) driver to all config files that currently
	have the mps(4) driver.

sys/ia64/conf/GENERIC:
	Add the mps(4) and mpr(4) drivers to the ia64 GENERIC
	config file.

sys/i386/conf/XEN:
	Exclude the mpr module from building here.

Submitted by:	Steve McConnell <Stephen.McConnell@lsi.com>
MFC after:	3 days
Tested by:	Chris Reeves <chrisr@spectralogic.com>
Sponsored by:	LSI, Spectra Logic
Relnotes:	LSI 12Gb SAS driver mpr(4) added
This commit is contained in:
Kenneth D. Merry 2014-05-02 20:25:09 +00:00
parent f544a74870
commit 991554f2c4
35 changed files with 25831 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

226
share/man/man4/mpr.4 Normal file
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@ -0,0 +1,226 @@
.\"
.\" Copyright (c) 2010 Spectra Logic Corporation
.\" Copyright (c) 2014 LSI Corp
.\" All rights reserved.
.\"
.\" Redistribution and use in source and binary forms, with or without
.\" modification, are permitted provided that the following conditions
.\" are met:
.\" 1. Redistributions of source code must retain the above copyright
.\" notice, this list of conditions, and the following disclaimer,
.\" without modification.
.\" 2. Redistributions in binary form must reproduce at minimum a disclaimer
.\" substantially similar to the "NO WARRANTY" disclaimer below
.\" ("Disclaimer") and any redistribution must be conditioned upon
.\" including a substantially similar Disclaimer requirement for further
.\" binary redistribution.
.\"
.\" NO WARRANTY
.\" THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
.\" "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
.\" LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR
.\" A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
.\" HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
.\" DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
.\" OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
.\" HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
.\" STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
.\" IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
.\" POSSIBILITY OF SUCH DAMAGES.
.\"
.\" mpr driver man page.
.\"
.\" Author: Ken Merry <ken@FreeBSD.org>
.\" Author: Stephen McConnell <stephen.mcconnell@lsi.com>
.\"
.\" $Id$
.\" $FreeBSD$
.\"
.Dd Apr 28, 2014
.Dt MPR 4
.Os
.Sh NAME
.Nm mpr
.Nd "LSI Fusion-MPT 3 IT/IR 12Gb/s Serial Attached SCSI/SATA driver"
.Sh SYNOPSIS
To compile this driver into the kernel, place the following lines in your
kernel configuration file:
.Bd -ragged -offset indent
.Cd "device pci"
.Cd "device scbus"
.Cd "device mpr"
.Ed
.Pp
Or, to load the driver as a module at boot, place the following line in
.Xr loader.conf 5 :
.Bd -literal -offset indent
mpr_load="YES"
.Ed
.Sh DESCRIPTION
The
.Nm
driver provides support for LSI Fusion-MPT 3 IT/IR
.Tn SAS
controllers.
.Sh HARDWARE
The following controllers are supported by the
.Nm
driver
.Pp
.Bl -bullet -compact
.It
LSI SAS 3004 (4 Port SAS)
.It
LSI SAS 3008 (8 Port SAS)
.It
LSI SAS 3108 (8 Port SAS)
.El
.Sh CONFIGURATION
To disable MSI interrupts for all
.Nm
driver instances, set the following tunable value in
.Xr loader.conf 5 :
.Bd -literal -offset indent
hw.mpr.disable_msi=1
.Ed
.Pp
To disable MSI interrupts for a specific
.Nm
driver instance, set the following tunable value in
.Xr loader.conf 5 :
.Bd -literal -offset indent
dev.mpr.X.disable_msi=1
.Ed
.Pp
where X is the adapter number.
.Pp
To disable MSI-X interrupts for all
.Nm
driver instances, set the following tunable value in
.Xr loader.conf 5 :
.Bd -literal -offset indent
hw.mpr.disable_msix=1
.Ed
.Pp
To disable MSI-X interrupts for a specific
.Nm
driver instance, set the following tunable value in
.Xr loader.conf 5 :
.Bd -literal -offset indent
dev.mpr.X.disable_msix=1
.Ed
.Pp
To set the maximum number of DMA chains allocated for all adapters, set
the following variable in
.Xr loader.conf 5 :
.Bd -literal -offset indent
hw.mpr.max_chains=NNNN
.Ed
.Pp
To set the maximum number of DMA chains allocated for a specific adapter,
set the following variable in
.Xr loader.conf 5 :
.Bd -literal -offset indent
dev.mpr.X.max_chains=NNNN
.Ed
.Pp
This variable may also be viewed via
.Xr sysctl 8
to see the maximum set for a given adapter.
.Pp
The current number of free chain frames may be seen via the
dev.mpr.X.chain_free
.Xr sysctl 8
variable.
.Pp
The lowest number of free chain frames may be seen via the
dev.mpr.X.chain_free_lowwater
.Xr sysctl 8
variable.
.Pp
The current number of active I/O commands is shown in the
dev.mpr.X.io_cmds_active
.Xr sysctl 8
variable.
.Pp
The maximum number of active I/O commands seen since boot is shown in the
dev.mpr.X.io_cmds_highwater
.Xr sysctl 8
variable.
.Pp
Devices can be excluded from
.Nm
control for all adapters by setting the following variable in
.Xr loader.conf 5 :
.Bd -literal -offset indent
hw.mpr.exclude_ids=Y
.Ed
.Pp
where Y is the target ID of the device. If more than one device is to be
excluded, target ID's are separated by commas.
.Pp
Devices can be excluded from
.Nm
control for a specific adapter by setting the following variable in
.Xr loader.conf 5 :
.Bd -literal -offset indent
dev.mpr.X.exclude_ids=Y
.Ed
.Pp
where X is the adapter number and Y is the target ID of the device. If more
than one device is to be excluded, target ID's are separated by commas.
.Sh DEBUGGING
To enable debugging prints from the
.Nm
driver, set the
.Bd -literal -offset indent
hw.mpr.X.debug_level
.Ed
.Pp
variable, where X is the adapter number, either in
.Xr loader.conf 5
or via
.Xr sysctl 8 .
The following bits have the described effects:
.Bd -literal -offset indent
0x0001 Enable informational prints.
0x0002 Enable prints for driver faults.
0x0004 Enable prints for controller events.
0x0008 Enable prints for controller logging.
0x0010 Enable prints for tracing recovery operations.
0x0020 Enable prints for parameter errors and programming bugs.
0x0040 Enable prints for system initialization operations.
0x0080 Enable prints for more detailed information.
0x0100 Enable prints for user-generated commands.
0x0200 Enable prints for device mapping.
0x0400 Enable prints for tracing through driver functions.
.Ed
.Sh SEE ALSO
.Xr cam 4 ,
.Xr cd 4 ,
.Xr ch 4 ,
.Xr da 4 ,
.Xr mpt 4 ,
.Xr mps 4 ,
.Xr pci 4 ,
.Xr sa 4 ,
.Xr scsi 4 ,
.Xr targ 4 ,
.Xr loader.conf 5 ,
.Xr sysctl 8
.Sh HISTORY
The
.Nm
driver first appeared in FreeBSD 9.3.
.Sh AUTHORS
The
.Nm
driver was originally written by
.An -nosplit
.An Scott Long Aq scottl@FreeBSD.org .
It has been improved and tested by LSI Corporation.
.Pp
This man page was written by
.An Ken Merry Aq ken@FreeBSD.org
with additional input from
.An Stephen McConnell Aq stephen.mcconnell@lsi.com .

1
sys/amd64/conf/GENERIC
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@ -119,6 +119,7 @@ device isp # Qlogic family
#device ispfw # Firmware for QLogic HBAs- normally a module
device mpt # LSI-Logic MPT-Fusion
device mps # LSI-Logic MPT-Fusion 2
device mpr # LSI-Logic MPT-Fusion 3
#device ncr # NCR/Symbios Logic
device sym # NCR/Symbios Logic (newer chipsets + those of `ncr')
device trm # Tekram DC395U/UW/F DC315U adapters

11
sys/conf/files
View File

@ -1804,6 +1804,17 @@ dev/mmc/mmcbr_if.m standard
dev/mmc/mmcbus_if.m standard
dev/mmc/mmcsd.c optional mmcsd
dev/mn/if_mn.c optional mn pci
dev/mpr/mpr.c optional mpr
dev/mpr/mpr_config.c optional mpr
# XXX Work around clang warning, until maintainer approves fix.
dev/mpr/mpr_mapping.c optional mpr \
compile-with "${NORMAL_C} ${NO_WSOMETIMES_UNINITIALIZED}"
dev/mpr/mpr_pci.c optional mpr pci
dev/mpr/mpr_sas.c optional mpr \
compile-with "${NORMAL_C} ${NO_WUNNEEDED_INTERNAL_DECL}"
dev/mpr/mpr_sas_lsi.c optional mpr
dev/mpr/mpr_table.c optional mpr
dev/mpr/mpr_user.c optional mpr
dev/mps/mps.c optional mps
dev/mps/mps_config.c optional mps
# XXX Work around clang warning, until maintainer approves fix.

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/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
/*
* Copyright (c) 2009-2011 LSI Corporation.
*
*
* Name: mpi2_hbd.h
* Title: MPI Host Based Discovery messages and structures
* Creation Date: October 21, 2009
*
* mpi2_hbd.h Version: 02.00.02
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 10-28-09 02.00.00 Initial version.
* 08-11-10 02.00.01 Removed PortGroups, DmaGroup, and ControlGroup from
* HBD Action request, replaced by AdditionalInfo field.
* 11-18-11 02.00.02 Incorporating additions for MPI v2.5.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_HBD_H
#define MPI2_HBD_H
/****************************************************************************
* Host Based Discovery Action messages
****************************************************************************/
/* Host Based Discovery Action Request Message */
typedef struct _MPI2_HBD_ACTION_REQUEST
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 Reserved4; /* 0x0C */
U64 SASAddress; /* 0x10 */
U32 Reserved5; /* 0x18 */
U32 HbdDeviceInfo; /* 0x1C */
U16 ParentDevHandle; /* 0x20 */
U16 MaxQDepth; /* 0x22 */
U8 FirstPhyIdentifier; /* 0x24 */
U8 Port; /* 0x25 */
U8 MaxConnections; /* 0x26 */
U8 MaxRate; /* 0x27 */
U32 AdditionalInfo; /* 0x28 */
U16 InitialAWT; /* 0x2C */
U16 Reserved7; /* 0x2E */
U32 Reserved8; /* 0x30 */
} MPI2_HBD_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_HBD_ACTION_REQUEST,
Mpi2HbdActionRequest_t, MPI2_POINTER pMpi2HbdActionRequest_t;
/* values for the Operation field */
#define MPI2_HBD_OP_ADD_DEVICE (0x01)
#define MPI2_HBD_OP_REMOVE_DEVICE (0x02)
#define MPI2_HBD_OP_UPDATE_DEVICE (0x03)
/* values for the HbdDeviceInfo field */
#define MPI2_HBD_DEVICE_INFO_VIRTUAL_DEVICE (0x00004000)
#define MPI2_HBD_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI2_HBD_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI2_HBD_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI2_HBD_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI2_HBD_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI2_HBD_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI2_HBD_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI2_HBD_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI2_HBD_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI2_HBD_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI2_HBD_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI2_HBD_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI2_HBD_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI2_HBD_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI2_HBD_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/* values for the MaxRate field */
#define MPI2_HBD_MAX_RATE_MASK (0x0F)
#define MPI2_HBD_MAX_RATE_1_5 (0x08)
#define MPI2_HBD_MAX_RATE_3_0 (0x09)
#define MPI2_HBD_MAX_RATE_6_0 (0x0A)
#define MPI25_HBD_MAX_RATE_12_0 (0x0B)
/* Host Based Discovery Action Reply Message */
typedef struct _MPI2_HBD_ACTION_REPLY
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_HBD_ACTION_REPLY, MPI2_POINTER PTR_MPI2_HBD_ACTION_REPLY,
Mpi2HbdActionReply_t, MPI2_POINTER pMpi2HbdActionReply_t;
#endif

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@ -0,0 +1,619 @@
/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
==============================
Fusion-MPT MPI 2.0 / 2.5 Header File Change History
==============================
Copyright (c) 2000-2013 LSI Corporation.
---------------------------------------
Header Set Release Version: 02.00.33
Header Set Release Date: 12-05-13
---------------------------------------
Filename Current version Prior version
---------- --------------- -------------
mpi2.h 02.00.33 02.00.32
mpi2_cnfg.h 02.00.27 02.00.26
mpi2_init.h 02.00.15 02.00.15
mpi2_ioc.h 02.00.24 02.00.23
mpi2_raid.h 02.00.10 02.00.10
mpi2_sas.h 02.00.08 02.00.08
mpi2_targ.h 02.00.06 02.00.06
mpi2_tool.h 02.00.11 02.00.11
mpi2_type.h 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00
mpi2_hbd.h 02.00.02 02.00.02
mpi2_history.txt 02.00.33 02.00.32
* Date Version Description
* -------- -------- ------------------------------------------------------
mpi2.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 Bumped MPI2_HEADER_VERSION_UNIT.
* 06-26-07 02.00.02 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-31-07 02.00.03 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved ReplyPostHostIndex register to offset 0x6C of the
* MPI2_SYSTEM_INTERFACE_REGS and modified the define for
* MPI2_REPLY_POST_HOST_INDEX_OFFSET.
* Added union of request descriptors.
* Added union of reply descriptors.
* 10-31-07 02.00.04 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_VERSION_02_00.
* Fixed the size of the FunctionDependent5 field in the
* MPI2_DEFAULT_REPLY structure.
* 12-18-07 02.00.05 Bumped MPI2_HEADER_VERSION_UNIT.
* Removed the MPI-defined Fault Codes and extended the
* product specific codes up to 0xEFFF.
* Added a sixth key value for the WriteSequence register
* and changed the flush value to 0x0.
* Added message function codes for Diagnostic Buffer Post
* and Diagnsotic Release.
* New IOCStatus define: MPI2_IOCSTATUS_DIAGNOSTIC_RELEASED
* Moved MPI2_VERSION_UNION from mpi2_ioc.h.
* 02-29-08 02.00.06 Bumped MPI2_HEADER_VERSION_UNIT.
* 03-03-08 02.00.07 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-21-08 02.00.08 Bumped MPI2_HEADER_VERSION_UNIT.
* Added #defines for marking a reply descriptor as unused.
* 06-27-08 02.00.09 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-02-08 02.00.10 Bumped MPI2_HEADER_VERSION_UNIT.
* Moved LUN field defines from mpi2_init.h.
* 01-19-09 02.00.11 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-06-09 02.00.12 Bumped MPI2_HEADER_VERSION_UNIT.
* In all request and reply descriptors, replaced VF_ID
* field with MSIxIndex field.
* Removed DevHandle field from
* MPI2_SCSI_IO_SUCCESS_REPLY_DESCRIPTOR and made those
* bytes reserved.
* Added RAID Accelerator functionality.
* 07-30-09 02.00.13 Bumped MPI2_HEADER_VERSION_UNIT.
* 10-28-09 02.00.14 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MSI-x index mask and shift for Reply Post Host
* Index register.
* Added function code for Host Based Discovery Action.
* 02-10-10 02.00.15 Bumped MPI2_HEADER_VERSION_UNIT.
* Added define for MPI2_FUNCTION_PWR_MGMT_CONTROL.
* Added defines for product-specific range of message
* function codes, 0xF0 to 0xFF.
* 05-12-10 02.00.16 Bumped MPI2_HEADER_VERSION_UNIT.
* Added alternative defines for the SGE Direction bit.
* 08-11-10 02.00.17 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-10-10 02.00.18 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI2_IEEE_SGE_FLAGS_SYSTEMPLBCPI_ADDR define.
* 02-23-11 02.00.19 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI2_FUNCTION_SEND_HOST_MESSAGE.
* 03-09-11 02.00.20 Bumped MPI2_HEADER_VERSION_UNIT.
* 05-25-11 02.00.21 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-24-11 02.00.22 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-18-11 02.00.23 Bumped MPI2_HEADER_VERSION_UNIT.
* Incorporating additions for MPI v2.5.
* 02-06-12 02.00.24 Bumped MPI2_HEADER_VERSION_UNIT.
* 03-29-12 02.00.25 Bumped MPI2_HEADER_VERSION_UNIT.
* Added Hard Reset delay timings.
* 07-10-12 02.00.26 Bumped MPI2_HEADER_VERSION_UNIT.
* 07-26-12 02.00.27 Bumped MPI2_HEADER_VERSION_UNIT.
* 11-27-12 02.00.28 Bumped MPI2_HEADER_VERSION_UNIT.
* 12-20-12 02.00.29 Bumped MPI2_HEADER_VERSION_UNIT.
* Added MPI25_SUP_REPLY_POST_HOST_INDEX_OFFSET.
* 04-09-13 02.00.30 Bumped MPI2_HEADER_VERSION_UNIT.
* 04-17-13 02.00.31 Bumped MPI2_HEADER_VERSION_UNIT.
* 08-19-13 02.00.32 Bumped MPI2_HEADER_VERSION_UNIT.
* 12-05-13 02.00.33 Bumped MPI2_HEADER_VERSION_UNIT.
* --------------------------------------------------------------------------
mpi2_cnfg.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 Added defines for SAS IO Unit Page 2 PhyFlags.
* Added Manufacturing Page 11.
* Added MPI2_SAS_EXPANDER0_FLAGS_CONNECTOR_END_DEVICE
* define.
* 06-26-07 02.00.02 Adding generic structure for product-specific
* Manufacturing pages: MPI2_CONFIG_PAGE_MANUFACTURING_PS.
* Rework of BIOS Page 2 configuration page.
* Fixed MPI2_BIOSPAGE2_BOOT_DEVICE to be a union of the
* forms.
* Added configuration pages IOC Page 8 and Driver
* Persistent Mapping Page 0.
* 08-31-07 02.00.03 Modified configuration pages dealing with Integrated
* RAID (Manufacturing Page 4, RAID Volume Pages 0 and 1,
* RAID Physical Disk Pages 0 and 1, RAID Configuration
* Page 0).
* Added new value for AccessStatus field of SAS Device
* Page 0 (_SATA_NEEDS_INITIALIZATION).
* 10-31-07 02.00.04 Added missing SEPDevHandle field to
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
* 12-18-07 02.00.05 Modified IO Unit Page 0 to use 32-bit version fields for
* NVDATA.
* Modified IOC Page 7 to use masks and added field for
* SASBroadcastPrimitiveMasks.
* Added MPI2_CONFIG_PAGE_BIOS_4.
* Added MPI2_CONFIG_PAGE_LOG_0.
* 02-29-08 02.00.06 Modified various names to make them 32-character unique.
* Added SAS Device IDs.
* Updated Integrated RAID configuration pages including
* Manufacturing Page 4, IOC Page 6, and RAID Configuration
* Page 0.
* 05-21-08 02.00.07 Added define MPI2_MANPAGE4_MIX_SSD_SAS_SATA.
* Added define MPI2_MANPAGE4_PHYSDISK_128MB_COERCION.
* Fixed define MPI2_IOCPAGE8_FLAGS_ENCLOSURE_SLOT_MAPPING.
* Added missing MaxNumRoutedSasAddresses field to
* MPI2_CONFIG_PAGE_EXPANDER_0.
* Added SAS Port Page 0.
* Modified structure layout for
* MPI2_CONFIG_PAGE_DRIVER_MAPPING_0.
* 06-27-08 02.00.08 Changed MPI2_CONFIG_PAGE_RD_PDISK_1 to use
* MPI2_RAID_PHYS_DISK1_PATH_MAX to size the array.
* 10-02-08 02.00.09 Changed MPI2_RAID_PGAD_CONFIGNUM_MASK from 0x0000FFFF
* to 0x000000FF.
* Added two new values for the Physical Disk Coercion Size
* bits in the Flags field of Manufacturing Page 4.
* Added product-specific Manufacturing pages 16 to 31.
* Modified Flags bits for controlling write cache on SATA
* drives in IO Unit Page 1.
* Added new bit to AdditionalControlFlags of SAS IO Unit
* Page 1 to control Invalid Topology Correction.
* Added SupportedPhysDisks field to RAID Volume Page 1 and
* added related defines.
* Added additional defines for RAID Volume Page 0
* VolumeStatusFlags field.
* Modified meaning of RAID Volume Page 0 VolumeSettings
* define for auto-configure of hot-swap drives.
* Added PhysDiskAttributes field (and related defines) to
* RAID Physical Disk Page 0.
* Added MPI2_SAS_PHYINFO_PHY_VACANT define.
* Added three new DiscoveryStatus bits for SAS IO Unit
* Page 0 and SAS Expander Page 0.
* Removed multiplexing information from SAS IO Unit pages.
* Added BootDeviceWaitTime field to SAS IO Unit Page 4.
* Removed Zone Address Resolved bit from PhyInfo and from
* Expander Page 0 Flags field.
* Added two new AccessStatus values to SAS Device Page 0
* for indicating routing problems. Added 3 reserved words
* to this page.
* 01-19-09 02.00.10 Fixed defines for GPIOVal field of IO Unit Page 3.
* Inserted missing reserved field into structure for IOC
* Page 6.
* Added more pending task bits to RAID Volume Page 0
* VolumeStatusFlags defines.
* Added MPI2_PHYSDISK0_STATUS_FLAG_NOT_CERTIFIED define.
* Added a new DiscoveryStatus bit for SAS IO Unit Page 0
* and SAS Expander Page 0 to flag a downstream initiator
* when in simplified routing mode.
* Removed SATA Init Failure defines for DiscoveryStatus
* fields of SAS IO Unit Page 0 and SAS Expander Page 0.
* Added MPI2_SAS_DEVICE0_ASTATUS_DEVICE_BLOCKED define.
* Added PortGroups, DmaGroup, and ControlGroup fields to
* SAS Device Page 0.
* 05-06-09 02.00.11 Added structures and defines for IO Unit Page 5 and IO
* Unit Page 6.
* Added expander reduced functionality data to SAS
* Expander Page 0.
* Added SAS PHY Page 2 and SAS PHY Page 3.
* 07-30-09 02.00.12 Added IO Unit Page 7.
* Added new device ids.
* Added SAS IO Unit Page 5.
* Added partial and slumber power management capable flags
* to SAS Device Page 0 Flags field.
* Added PhyInfo defines for power condition.
* Added Ethernet configuration pages.
* 10-28-09 02.00.13 Added MPI2_IOUNITPAGE1_ENABLE_HOST_BASED_DISCOVERY.
* Added SAS PHY Page 4 structure and defines.
* 02-10-10 02.00.14 Modified the comments for the configuration page
* structures that contain an array of data. The host
* should use the "count" field in the page data (e.g. the
* NumPhys field) to determine the number of valid elements
* in the array.
* Added/modified some MPI2_MFGPAGE_DEVID_SAS defines.
* Added PowerManagementCapabilities to IO Unit Page 7.
* Added PortWidthModGroup field to
* MPI2_SAS_IO_UNIT5_PHY_PM_SETTINGS.
* Added MPI2_CONFIG_PAGE_SASIOUNIT_6 and related defines.
* Added MPI2_CONFIG_PAGE_SASIOUNIT_7 and related defines.
* Added MPI2_CONFIG_PAGE_SASIOUNIT_8 and related defines.
* 05-12-10 02.00.15 Added MPI2_RAIDVOL0_STATUS_FLAG_VOL_NOT_CONSISTENT
* define.
* Added MPI2_PHYSDISK0_INCOMPATIBLE_MEDIA_TYPE define.
* Added MPI2_SAS_NEG_LINK_RATE_UNSUPPORTED_PHY define.
* 08-11-10 02.00.16 Removed IO Unit Page 1 device path (multi-pathing)
* defines.
* 11-10-10 02.00.17 Added ReceptacleID field (replacing Reserved1) to
* MPI2_MANPAGE7_CONNECTOR_INFO and reworked defines for
* the Pinout field.
* Added BoardTemperature and BoardTemperatureUnits fields
* to MPI2_CONFIG_PAGE_IO_UNIT_7.
* Added MPI2_CONFIG_EXTPAGETYPE_EXT_MANUFACTURING define
* and MPI2_CONFIG_PAGE_EXT_MAN_PS structure.
* 02-23-11 02.00.18 Added ProxyVF_ID field to MPI2_CONFIG_REQUEST.
* Added IO Unit Page 8, IO Unit Page 9,
* and IO Unit Page 10.
* Added SASNotifyPrimitiveMasks field to
* MPI2_CONFIG_PAGE_IOC_7.
* 03-09-11 02.00.19 Fixed IO Unit Page 10 (to match the spec).
* 05-25-11 02.00.20 Cleaned up a few comments.
* 08-24-11 02.00.21 Marked the IO Unit Page 7 PowerManagementCapabilities
* for PCIe link as obsolete.
* Added SpinupFlags field containing a Disable Spin-up bit
* to the MPI2_SAS_IOUNIT4_SPINUP_GROUP fields of SAS IO
* Unit Page 4.
* 11-18-11 02.00.22 Added define MPI2_IOCPAGE6_CAP_FLAGS_4K_SECTORS_SUPPORT.
* Added UEFIVersion field to BIOS Page 1 and defined new
* BiosOptions bits.
* Incorporating additions for MPI v2.5.
* 11-27-12 02.00.23 Added MPI2_MANPAGE7_FLAG_EVENTREPLAY_SLOT_ORDER.
* Added MPI2_BIOSPAGE1_OPTIONS_MASK_OEM_ID.
* 12-20-12 02.00.24 Marked MPI2_SASIOUNIT1_CONTROL_CLEAR_AFFILIATION as
* obsolete for MPI v2.5 and later.
* Added some defines for 12G SAS speeds.
* 04-09-13 02.00.25 Added MPI2_IOUNITPAGE1_ATA_SECURITY_FREEZE_LOCK.
* Fixed MPI2_IOUNITPAGE5_DMA_CAP_MASK_MAX_REQUESTS to
* match the specification.
* 08-19-13 02.00.26 Added reserved words to MPI2_CONFIG_PAGE_IO_UNIT_7 for
* future use.
* 12-05-13 02.00.27 Added MPI2_MANPAGE7_FLAG_BASE_ENCLOSURE_LEVEL for
* MPI2_CONFIG_PAGE_MAN_7.
* Added EnclosureLevel and ConnectorName fields to
* MPI2_CONFIG_PAGE_SAS_DEV_0.
* Added MPI2_SAS_DEVICE0_FLAGS_ENCL_LEVEL_VALID for
* MPI2_CONFIG_PAGE_SAS_DEV_0.
* Added EnclosureLevel field to
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
* Added MPI2_SAS_ENCLS0_FLAGS_ENCL_LEVEL_VALID for
* MPI2_CONFIG_PAGE_SAS_ENCLOSURE_0.
* --------------------------------------------------------------------------
mpi2_init.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
* 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
* 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
* 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
* 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
* 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
* Control field Task Attribute flags.
* Moved LUN field defines to mpi2.h becasue they are
* common to many structures.
* 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
* Query Asynchronous Event.
* Defined two new bits in the SlotStatus field of the SCSI
* Enclosure Processor Request and Reply.
* 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
* both SCSI IO Error Reply and SCSI Task Management Reply.
* Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
* Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
* 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it.
* 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request.
* 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
* 11-18-11 02.00.12 Incorporating additions for MPI v2.5.
* 02-06-12 02.00.13 Added alternate defines for Task Priority / Command
* Priority to match SAM-4.
* Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY.
* 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
* --------------------------------------------------------------------------
mpi2_ioc.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-04-07 02.00.01 In IOCFacts Reply structure, renamed MaxDevices to
* MaxTargets.
* Added TotalImageSize field to FWDownload Request.
* Added reserved words to FWUpload Request.
* 06-26-07 02.00.02 Added IR Configuration Change List Event.
* 08-31-07 02.00.03 Removed SystemReplyQueueDepth field from the IOCInit
* request and replaced it with
* ReplyDescriptorPostQueueDepth and ReplyFreeQueueDepth.
* Replaced the MinReplyQueueDepth field of the IOCFacts
* reply with MaxReplyDescriptorPostQueueDepth.
* Added MPI2_RDPQ_DEPTH_MIN define to specify the minimum
* depth for the Reply Descriptor Post Queue.
* Added SASAddress field to Initiator Device Table
* Overflow Event data.
* 10-31-07 02.00.04 Added ReasonCode MPI2_EVENT_SAS_INIT_RC_NOT_RESPONDING
* for SAS Initiator Device Status Change Event data.
* Modified Reason Code defines for SAS Topology Change
* List Event data, including adding a bit for PHY Vacant
* status, and adding a mask for the Reason Code.
* Added define for
* MPI2_EVENT_SAS_TOPO_ES_DELAY_NOT_RESPONDING.
* Added define for MPI2_EXT_IMAGE_TYPE_MEGARAID.
* 12-18-07 02.00.05 Added Boot Status defines for the IOCExceptions field of
* the IOCFacts Reply.
* Removed MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Moved MPI2_VERSION_UNION to mpi2.h.
* Changed MPI2_EVENT_NOTIFICATION_REQUEST to use masks
* instead of enables, and added SASBroadcastPrimitiveMasks
* field.
* Added Log Entry Added Event and related structure.
* 02-29-08 02.00.06 Added define MPI2_IOCFACTS_CAPABILITY_INTEGRATED_RAID.
* Removed define MPI2_IOCFACTS_PROTOCOL_SMP_TARGET.
* Added MaxVolumes and MaxPersistentEntries fields to
* IOCFacts reply.
* Added ProtocalFlags and IOCCapabilities fields to
* MPI2_FW_IMAGE_HEADER.
* Removed MPI2_PORTENABLE_FLAGS_ENABLE_SINGLE_PORT.
* 03-03-08 02.00.07 Fixed MPI2_FW_IMAGE_HEADER by changing Reserved26 to
* a U16 (from a U32).
* Removed extra 's' from EventMasks name.
* 06-27-08 02.00.08 Fixed an offset in a comment.
* 10-02-08 02.00.09 Removed SystemReplyFrameSize from MPI2_IOC_INIT_REQUEST.
* Removed CurReplyFrameSize from MPI2_IOC_FACTS_REPLY and
* renamed MinReplyFrameSize to ReplyFrameSize.
* Added MPI2_IOCFACTS_EXCEPT_IR_FOREIGN_CONFIG_MAX.
* Added two new RAIDOperation values for Integrated RAID
* Operations Status Event data.
* Added four new IR Configuration Change List Event data
* ReasonCode values.
* Added two new ReasonCode defines for SAS Device Status
* Change Event data.
* Added three new DiscoveryStatus bits for the SAS
* Discovery event data.
* Added Multiplexing Status Change bit to the PhyStatus
* field of the SAS Topology Change List event data.
* Removed define for MPI2_INIT_IMAGE_BOOTFLAGS_XMEMCOPY.
* BootFlags are now product-specific.
* Added defines for the indivdual signature bytes
* for MPI2_INIT_IMAGE_FOOTER.
* 01-19-09 02.00.10 Added MPI2_IOCFACTS_CAPABILITY_EVENT_REPLAY define.
* Added MPI2_EVENT_SAS_DISC_DS_DOWNSTREAM_INITIATOR
* define.
* Added MPI2_EVENT_SAS_DEV_STAT_RC_SATA_INIT_FAILURE
* define.
* Removed MPI2_EVENT_SAS_DISC_DS_SATA_INIT_FAILURE define.
* 05-06-09 02.00.11 Added MPI2_IOCFACTS_CAPABILITY_RAID_ACCELERATOR define.
* Added MPI2_IOCFACTS_CAPABILITY_MSI_X_INDEX define.
* Added two new reason codes for SAS Device Status Change
* Event.
* Added new event: SAS PHY Counter.
* 07-30-09 02.00.12 Added GPIO Interrupt event define and structure.
* Added MPI2_IOCFACTS_CAPABILITY_EXTENDED_BUFFER define.
* Added new product id family for 2208.
* 10-28-09 02.00.13 Added HostMSIxVectors field to MPI2_IOC_INIT_REQUEST.
* Added MaxMSIxVectors field to MPI2_IOC_FACTS_REPLY.
* Added MinDevHandle field to MPI2_IOC_FACTS_REPLY.
* Added MPI2_IOCFACTS_CAPABILITY_HOST_BASED_DISCOVERY.
* Added MPI2_EVENT_HOST_BASED_DISCOVERY_PHY define.
* Added MPI2_EVENT_SAS_TOPO_ES_NO_EXPANDER define.
* Added Host Based Discovery Phy Event data.
* Added defines for ProductID Product field
* (MPI2_FW_HEADER_PID_).
* Modified values for SAS ProductID Family
* (MPI2_FW_HEADER_PID_FAMILY_).
* 02-10-10 02.00.14 Added SAS Quiesce Event structure and defines.
* Added PowerManagementControl Request structures and
* defines.
* 05-12-10 02.00.15 Marked Task Set Full Event as obsolete.
* Added MPI2_EVENT_SAS_TOPO_LR_UNSUPPORTED_PHY define.
* 11-10-10 02.00.16 Added MPI2_FW_DOWNLOAD_ITYPE_MIN_PRODUCT_SPECIFIC.
* 02-23-11 02.00.17 Added SAS NOTIFY Primitive event, and added
* SASNotifyPrimitiveMasks field to
* MPI2_EVENT_NOTIFICATION_REQUEST.
* Added Temperature Threshold Event.
* Added Host Message Event.
* Added Send Host Message request and reply.
* 05-25-11 02.00.18 For Extended Image Header, added
* MPI2_EXT_IMAGE_TYPE_MIN_PRODUCT_SPECIFIC and
* MPI2_EXT_IMAGE_TYPE_MAX_PRODUCT_SPECIFIC defines.
* Deprecated MPI2_EXT_IMAGE_TYPE_MAX define.
* 08-24-11 02.00.19 Added PhysicalPort field to
* MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE structure.
* Marked MPI2_PM_CONTROL_FEATURE_PCIE_LINK as obsolete.
* 11-18-11 02.00.20 Incorporating additions for MPI v2.5.
* 03-29-12 02.00.21 Added a product specific range to event values.
* 07-26-12 02.00.22 Added MPI2_IOCFACTS_EXCEPT_PARTIAL_MEMORY_FAILURE.
* Added ElapsedSeconds field to
* MPI2_EVENT_DATA_IR_OPERATION_STATUS.
* 08-19-13 02.00.23 For IOCInit, added MPI2_IOCINIT_MSGFLAG_RDPQ_ARRAY_MODE
* and MPI2_IOC_INIT_RDPQ_ARRAY_ENTRY.
* Added MPI2_IOCFACTS_CAPABILITY_RDPQ_ARRAY_CAPABLE.
* Added MPI2_FW_DOWNLOAD_ITYPE_PUBLIC_KEY.
* Added Encrypted Hash Extended Image.
* 12-05-13 02.00.24 Added MPI25_HASH_IMAGE_TYPE_BIOS.
* --------------------------------------------------------------------------
mpi2_raid.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Modifications to RAID Action request and reply,
* including the Actions and ActionData.
* 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
* 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
* the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
* can be sized by the build environment.
* 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
* VolumeCreationFlags and marked the old one as obsolete.
* 05-12-10 02.00.05 Added MPI2_RAID_VOL_FLAGS_OP_MDC define.
* 08-24-10 02.00.06 Added MPI2_RAID_ACTION_COMPATIBILITY_CHECK along with
* related structures and defines.
* Added product-specific range to RAID Action values.
* 11-18-11 02.00.07 Incorporating additions for MPI v2.5.
* 02-06-12 02.00.08 Added MPI2_RAID_ACTION_PHYSDISK_HIDDEN.
* 07-26-12 02.00.09 Added ElapsedSeconds field to MPI2_RAID_VOL_INDICATOR.
* Added MPI2_RAID_VOL_FLAGS_ELAPSED_SECONDS_VALID define.
* 04-17-13 02.00.10 Added MPI25_RAID_ACTION_ADATA_ALLOW_PI.
* --------------------------------------------------------------------------
mpi2_sas.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
* Control Request.
* 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
* Request.
* 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
* to MPI2_SGE_IO_UNION since it supports chained SGLs.
* 05-12-10 02.00.04 Modified some comments.
* 08-11-10 02.00.05 Added NCQ operations to SAS IO Unit Control.
* 11-18-11 02.00.06 Incorporating additions for MPI v2.5.
* 07-10-12 02.00.07 Added MPI2_SATA_PT_SGE_UNION for use in the SATA
* Passthrough Request message.
* 08-19-13 02.00.08 Made MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL obsolete
* for anything newer than MPI v2.0.
* --------------------------------------------------------------------------
mpi2_targ.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to
* BufferPostFlags field of CommandBufferPostBase Request.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 10-02-08 02.00.03 Removed NextCmdBufferOffset from
* MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
* Target Status Send Request only takes a single SGE for
* response data.
* 02-10-10 02.00.04 Added comment to MPI2_TARGET_SSP_RSP_IU structure.
* 11-18-11 02.00.05 Incorporating additions for MPI v2.5.
* 11-27-12 02.00.06 Added InitiatorDevHandle field to MPI2_TARGET_MODE_ABORT
* request message structure.
* Added AbortType MPI2_TARGET_MODE_ABORT_DEVHANDLE and
* MPI2_TARGET_MODE_ABORT_ALL_COMMANDS.
* --------------------------------------------------------------------------
mpi2_tool.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
* structures and defines.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
* 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
* and reply messages.
* Added MPI2_DIAG_BUF_TYPE_EXTENDED.
* Incremented MPI2_DIAG_BUF_TYPE_COUNT.
* 05-12-10 02.00.05 Added Diagnostic Data Upload tool.
* 08-11-10 02.00.06 Added defines that were missing for Diagnostic Buffer
* Post Request.
* 05-25-11 02.00.07 Added Flags field and related defines to
* MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST.
* 11-18-11 02.00.08 Incorporating additions for MPI v2.5.
* 07-10-12 02.00.09 Add MPI v2.5 Toolbox Diagnostic CLI Tool Request
* message.
* 07-26-12 02.00.10 Modified MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST so that
* it uses MPI Chain SGE as well as MPI Simple SGE.
* 08-19-13 02.00.11 Added MPI2_TOOLBOX_TEXT_DISPLAY_TOOL and related info.
* --------------------------------------------------------------------------
mpi2_type.h
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* --------------------------------------------------------------------------
mpi2_ra.h
* 05-06-09 02.00.00 Initial version.
* --------------------------------------------------------------------------
mpi2_hbd.h
* 10-28-09 02.00.00 Initial version.
* 08-11-10 02.00.01 Removed PortGroups, DmaGroup, and ControlGroup from
* HBD Action request, replaced by AdditionalInfo field.
* 11-18-11 02.00.02 Incorporating additions for MPI v2.5.
* --------------------------------------------------------------------------
mpi2_history.txt Parts list history
Filename 02.00.33 02.00.32 02.00.31 02.00.30
---------- -------- -------- -------- --------
mpi2.h 02.00.33 02.00.32 02.00.31 02.00.30
mpi2_cnfg.h 02.00.27 02.00.26 02.00.25 02.00.25
mpi2_init.h 02.00.15 02.00.15 02.00.15 02.00.15
mpi2_ioc.h 02.00.24 02.00.23 02.00.22 02.00.22
mpi2_raid.h 02.00.10 02.00.10 02.00.10 02.00.09
mpi2_sas.h 02.00.08 02.00.08 02.00.07 02.00.07
mpi2_targ.h 02.00.06 02.00.06 02.00.06 02.00.06
mpi2_tool.h 02.00.11 02.00.11 02.00.10 02.00.10
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_hbd.h 02.00.02 02.00.02 02.00.02 02.00.02
Filename 02.00.29 02.00.28 02.00.27 02.00.26 02.00.25 02.00.24
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.29 02.00.28 02.00.27 02.00.26 02.00.25 02.00.24
mpi2_cnfg.h 02.00.24 02.00.23 02.00.22 02.00.22 02.00.22 02.00.22
mpi2_init.h 02.00.14 02.00.14 02.00.14 02.00.14 02.00.13 02.00.13
mpi2_ioc.h 02.00.22 02.00.22 02.00.22 02.00.21 02.00.21 02.00.20
mpi2_raid.h 02.00.09 02.00.09 02.00.09 02.00.08 02.00.08 02.00.08
mpi2_sas.h 02.00.07 02.00.07 02.00.07 02.00.07 02.00.06 02.00.06
mpi2_targ.h 02.00.06 02.00.06 02.00.05 02.00.05 02.00.05 02.00.05
mpi2_tool.h 02.00.10 02.00.10 02.00.10 02.00.09 02.00.08 02.00.08
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_hbd.h 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02
Filename 02.00.23 02.00.22 02.00.21 02.00.20 02.00.19 02.00.18
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.23 02.00.22 02.00.21 02.00.20 02.00.19 02.00.18
mpi2_cnfg.h 02.00.22 02.00.21 02.00.20 02.00.19 02.00.18 02.00.17
mpi2_init.h 02.00.12 02.00.11 02.00.11 02.00.11 02.00.11 02.00.11
mpi2_ioc.h 02.00.20 02.00.19 02.00.18 02.00.17 02.00.17 02.00.16
mpi2_raid.h 02.00.07 02.00.06 02.00.05 02.00.05 02.00.05 02.00.05
mpi2_sas.h 02.00.06 02.00.05 02.00.05 02.00.05 02.00.05 02.00.05
mpi2_targ.h 02.00.05 02.00.04 02.00.04 02.00.04 02.00.04 02.00.04
mpi2_tool.h 02.00.08 02.00.07 02.00.07 02.00.06 02.00.06 02.00.06
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_hbd.h 02.00.02 02.00.01 02.00.01 02.00.01 02.00.01 02.00.01
Filename 02.00.17 02.00.16 02.00.15 02.00.14 02.00.13 02.00.12
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.17 02.00.16 02.00.15 02.00.14 02.00.13 02.00.12
mpi2_cnfg.h 02.00.16 02.00.15 02.00.14 02.00.13 02.00.12 02.00.11
mpi2_init.h 02.00.10 02.00.10 02.00.09 02.00.08 02.00.07 02.00.07
mpi2_ioc.h 02.00.15 02.00.15 02.00.14 02.00.13 02.00.12 02.00.11
mpi2_raid.h 02.00.05 02.00.05 02.00.04 02.00.04 02.00.04 02.00.03
mpi2_sas.h 02.00.05 02.00.04 02.00.03 02.00.03 02.00.02 02.00.02
mpi2_targ.h 02.00.04 02.00.04 02.00.04 02.00.03 02.00.03 02.00.03
mpi2_tool.h 02.00.06 02.00.05 02.00.04 02.00.04 02.00.04 02.00.03
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_ra.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_hbd.h 02.00.01 02.00.00 02.00.00 02.00.00
Filename 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.11 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06
mpi2_cnfg.h 02.00.10 02.00.09 02.00.08 02.00.07 02.00.06 02.00.06
mpi2_init.h 02.00.06 02.00.06 02.00.05 02.00.05 02.00.04 02.00.03
mpi2_ioc.h 02.00.10 02.00.09 02.00.08 02.00.07 02.00.07 02.00.06
mpi2_raid.h 02.00.03 02.00.03 02.00.03 02.00.03 02.00.02 02.00.02
mpi2_sas.h 02.00.02 02.00.02 02.00.01 02.00.01 02.00.01 02.00.01
mpi2_targ.h 02.00.03 02.00.03 02.00.02 02.00.02 02.00.02 02.00.02
mpi2_tool.h 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02 02.00.02
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
Filename 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
---------- -------- -------- -------- -------- -------- --------
mpi2.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_cnfg.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_init.h 02.00.02 02.00.01 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_ioc.h 02.00.05 02.00.04 02.00.03 02.00.02 02.00.01 02.00.00
mpi2_raid.h 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 02.00.00
mpi2_sas.h 02.00.01 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00
mpi2_targ.h 02.00.01 02.00.01 02.00.01 02.00.00 02.00.00 02.00.00
mpi2_tool.h 02.00.01 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00
mpi2_type.h 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00 02.00.00

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/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
/*
* Copyright (c) 2000-2013 LSI Corporation.
*
*
* Name: mpi2_init.h
* Title: MPI SCSI initiator mode messages and structures
* Creation Date: June 23, 2006
*
* mpi2_init.h Version: 02.00.15
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 10-31-07 02.00.01 Fixed name for pMpi2SCSITaskManagementRequest_t.
* 12-18-07 02.00.02 Modified Task Management Target Reset Method defines.
* 02-29-08 02.00.03 Added Query Task Set and Query Unit Attention.
* 03-03-08 02.00.04 Fixed name of struct _MPI2_SCSI_TASK_MANAGE_REPLY.
* 05-21-08 02.00.05 Fixed typo in name of Mpi2SepRequest_t.
* 10-02-08 02.00.06 Removed Untagged and No Disconnect values from SCSI IO
* Control field Task Attribute flags.
* Moved LUN field defines to mpi2.h becasue they are
* common to many structures.
* 05-06-09 02.00.07 Changed task management type of Query Unit Attention to
* Query Asynchronous Event.
* Defined two new bits in the SlotStatus field of the SCSI
* Enclosure Processor Request and Reply.
* 10-28-09 02.00.08 Added defines for decoding the ResponseInfo bytes for
* both SCSI IO Error Reply and SCSI Task Management Reply.
* Added ResponseInfo field to MPI2_SCSI_TASK_MANAGE_REPLY.
* Added MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG define.
* 02-10-10 02.00.09 Removed unused structure that had "#if 0" around it.
* 05-12-10 02.00.10 Added optional vendor-unique region to SCSI IO Request.
* 11-10-10 02.00.11 Added MPI2_SCSIIO_NUM_SGLOFFSETS define.
* 11-18-11 02.00.12 Incorporating additions for MPI v2.5.
* 02-06-12 02.00.13 Added alternate defines for Task Priority / Command
* Priority to match SAM-4.
* Added EEDPErrorOffset to MPI2_SCSI_IO_REPLY.
* 07-10-12 02.00.14 Added MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION.
* 04-09-13 02.00.15 Added SCSIStatusQualifier field to MPI2_SCSI_IO_REPLY,
* replacing the Reserved4 field.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_INIT_H
#define MPI2_INIT_H
/*****************************************************************************
*
* SCSI Initiator Messages
*
*****************************************************************************/
/****************************************************************************
* SCSI IO messages and associated structures
****************************************************************************/
typedef struct _MPI2_SCSI_IO_CDB_EEDP32
{
U8 CDB[20]; /* 0x00 */
U32 PrimaryReferenceTag; /* 0x14 */
U16 PrimaryApplicationTag; /* 0x18 */
U16 PrimaryApplicationTagMask; /* 0x1A */
U32 TransferLength; /* 0x1C */
} MPI2_SCSI_IO_CDB_EEDP32, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_EEDP32,
Mpi2ScsiIoCdbEedp32_t, MPI2_POINTER pMpi2ScsiIoCdbEedp32_t;
/* MPI v2.0 CDB field */
typedef union _MPI2_SCSI_IO_CDB_UNION
{
U8 CDB32[32];
MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
MPI2_SGE_SIMPLE_UNION SGE;
} MPI2_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI2_SCSI_IO_CDB_UNION,
Mpi2ScsiIoCdb_t, MPI2_POINTER pMpi2ScsiIoCdb_t;
/* MPI v2.0 SCSI IO Request Message */
typedef struct _MPI2_SCSI_IO_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 SenseBufferLowAddress; /* 0x0C */
U16 SGLFlags; /* 0x10 */
U8 SenseBufferLength; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U32 EEDPBlockSize; /* 0x28 */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U8 LUN[8]; /* 0x34 */
U32 Control; /* 0x3C */
MPI2_SCSI_IO_CDB_UNION CDB; /* 0x40 */
#ifdef MPI2_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */
MPI2_SCSI_IO_VENDOR_UNIQUE VendorRegion;
#endif
MPI2_SGE_IO_UNION SGL; /* 0x60 */
} MPI2_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI2_SCSI_IO_REQUEST,
Mpi2SCSIIORequest_t, MPI2_POINTER pMpi2SCSIIORequest_t;
/* SCSI IO MsgFlags bits */
/* MsgFlags for SenseBufferAddressSpace */
#define MPI2_SCSIIO_MSGFLAGS_MASK_SENSE_ADDR (0x0C)
#define MPI2_SCSIIO_MSGFLAGS_SYSTEM_SENSE_ADDR (0x00)
#define MPI2_SCSIIO_MSGFLAGS_IOCDDR_SENSE_ADDR (0x04)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLB_SENSE_ADDR (0x08)
#define MPI2_SCSIIO_MSGFLAGS_IOCPLBNTA_SENSE_ADDR (0x0C)
/* SCSI IO SGLFlags bits */
/* base values for Data Location Address Space */
#define MPI2_SCSIIO_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_SCSIIO_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_SCSIIO_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_SCSIIO_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
/* base values for Type */
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_MPI (0x00)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE32 (0x01)
#define MPI2_SCSIIO_SGLFLAGS_TYPE_IEEE64 (0x02)
/* shift values for each sub-field */
#define MPI2_SCSIIO_SGLFLAGS_SGL3_SHIFT (12)
#define MPI2_SCSIIO_SGLFLAGS_SGL2_SHIFT (8)
#define MPI2_SCSIIO_SGLFLAGS_SGL1_SHIFT (4)
#define MPI2_SCSIIO_SGLFLAGS_SGL0_SHIFT (0)
/* number of SGLOffset fields */
#define MPI2_SCSIIO_NUM_SGLOFFSETS (4)
/* SCSI IO IoFlags bits */
/* Large CDB Address Space */
#define MPI2_SCSIIO_CDB_ADDR_MASK (0x6000)
#define MPI2_SCSIIO_CDB_ADDR_SYSTEM (0x0000)
#define MPI2_SCSIIO_CDB_ADDR_IOCDDR (0x2000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLB (0x4000)
#define MPI2_SCSIIO_CDB_ADDR_IOCPLBNTA (0x6000)
#define MPI2_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI2_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI2_SCSIIO_IOFLAGS_MULTICAST (0x0400)
#define MPI2_SCSIIO_IOFLAGS_CMD_DETERMINES_DATA_DIR (0x0200)
#define MPI2_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/* SCSI IO EEDPFlags bits */
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI2_SCSIIO_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_SCSIIO_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI2_SCSIIO_EEDPFLAGS_MASK_OP (0x0007)
#define MPI2_SCSIIO_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI2_SCSIIO_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_SCSIIO_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_SCSIIO_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI2_SCSIIO_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/* SCSI IO LUN fields: use MPI2_LUN_ from mpi2.h */
/* SCSI IO Control bits */
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_MASK (0xFC000000)
#define MPI2_SCSIIO_CONTROL_ADDCDBLEN_SHIFT (26)
#define MPI2_SCSIIO_CONTROL_DATADIRECTION_MASK (0x03000000)
#define MPI2_SCSIIO_CONTROL_SHIFT_DATADIRECTION (24)
#define MPI2_SCSIIO_CONTROL_NODATATRANSFER (0x00000000)
#define MPI2_SCSIIO_CONTROL_WRITE (0x01000000)
#define MPI2_SCSIIO_CONTROL_READ (0x02000000)
#define MPI2_SCSIIO_CONTROL_BIDIRECTIONAL (0x03000000)
#define MPI2_SCSIIO_CONTROL_TASKPRI_MASK (0x00007800)
#define MPI2_SCSIIO_CONTROL_TASKPRI_SHIFT (11)
/* alternate name for the previous field; called Command Priority in SAM-4 */
#define MPI2_SCSIIO_CONTROL_CMDPRI_MASK (0x00007800)
#define MPI2_SCSIIO_CONTROL_CMDPRI_SHIFT (11)
#define MPI2_SCSIIO_CONTROL_TASKATTRIBUTE_MASK (0x00000700)
#define MPI2_SCSIIO_CONTROL_SIMPLEQ (0x00000000)
#define MPI2_SCSIIO_CONTROL_HEADOFQ (0x00000100)
#define MPI2_SCSIIO_CONTROL_ORDEREDQ (0x00000200)
#define MPI2_SCSIIO_CONTROL_ACAQ (0x00000400)
#define MPI2_SCSIIO_CONTROL_TLR_MASK (0x000000C0)
#define MPI2_SCSIIO_CONTROL_NO_TLR (0x00000000)
#define MPI2_SCSIIO_CONTROL_TLR_ON (0x00000040)
#define MPI2_SCSIIO_CONTROL_TLR_OFF (0x00000080)
/* MPI v2.5 CDB field */
typedef union _MPI25_SCSI_IO_CDB_UNION
{
U8 CDB32[32];
MPI2_SCSI_IO_CDB_EEDP32 EEDP32;
MPI2_IEEE_SGE_SIMPLE64 SGE;
} MPI25_SCSI_IO_CDB_UNION, MPI2_POINTER PTR_MPI25_SCSI_IO_CDB_UNION,
Mpi25ScsiIoCdb_t, MPI2_POINTER pMpi25ScsiIoCdb_t;
/* MPI v2.5 SCSI IO Request Message */
typedef struct _MPI25_SCSI_IO_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U32 SenseBufferLowAddress; /* 0x0C */
U8 DMAFlags; /* 0x10 */
U8 Reserved5; /* 0x11 */
U8 SenseBufferLength; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U16 EEDPBlockSize; /* 0x28 */
U16 Reserved6; /* 0x2A */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U8 LUN[8]; /* 0x34 */
U32 Control; /* 0x3C */
MPI25_SCSI_IO_CDB_UNION CDB; /* 0x40 */
#ifdef MPI25_SCSI_IO_VENDOR_UNIQUE_REGION /* typically this is left undefined */
MPI25_SCSI_IO_VENDOR_UNIQUE VendorRegion;
#endif
MPI25_SGE_IO_UNION SGL; /* 0x60 */
} MPI25_SCSI_IO_REQUEST, MPI2_POINTER PTR_MPI25_SCSI_IO_REQUEST,
Mpi25SCSIIORequest_t, MPI2_POINTER pMpi25SCSIIORequest_t;
/* use MPI2_SCSIIO_MSGFLAGS_ defines for the MsgFlags field */
/* Defines for the DMAFlags field
* Each setting affects 4 SGLS, from SGL0 to SGL3.
* D = Data
* C = Cache DIF
* I = Interleaved
* H = Host DIF
*/
#define MPI25_SCSIIO_DMAFLAGS_OP_MASK (0x0F)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_D (0x00)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_C (0x01)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_D_I (0x02)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_C (0x03)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_C_I (0x04)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_D_I_I (0x05)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_C (0x06)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_C_I (0x07)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_C_I_I (0x08)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_I_I_I (0x09)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_D (0x0A)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_C (0x0B)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_D_I (0x0C)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_C (0x0D)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_C_I (0x0E)
#define MPI25_SCSIIO_DMAFLAGS_OP_D_H_I_I (0x0F)
/* number of SGLOffset fields */
#define MPI25_SCSIIO_NUM_SGLOFFSETS (4)
/* defines for the IoFlags field */
#define MPI25_SCSIIO_IOFLAGS_IO_PATH_MASK (0xC000)
#define MPI25_SCSIIO_IOFLAGS_NORMAL_PATH (0x0000)
#define MPI25_SCSIIO_IOFLAGS_FAST_PATH (0x4000)
#define MPI25_SCSIIO_IOFLAGS_LARGE_CDB (0x1000)
#define MPI25_SCSIIO_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI25_SCSIIO_IOFLAGS_CDBLENGTH_MASK (0x01FF)
/* MPI v2.5 defines for the EEDPFlags bits */
/* use MPI2_SCSIIO_EEDPFLAGS_ defines for the other EEDPFlags bits */
#define MPI25_SCSIIO_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0)
#define MPI25_SCSIIO_EEDPFLAGS_COMPATIBLE_MODE (0x0000)
#define MPI25_SCSIIO_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040)
#define MPI25_SCSIIO_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080)
#define MPI25_SCSIIO_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0)
#define MPI25_SCSIIO_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030)
#define MPI25_SCSIIO_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000)
#define MPI25_SCSIIO_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010)
/* use MPI2_LUN_ defines from mpi2.h for the LUN field */
/* use MPI2_SCSIIO_CONTROL_ defines for the Control field */
/* NOTE: The SCSI IO Reply is nearly the same for MPI 2.0 and MPI 2.5, so
* MPI2_SCSI_IO_REPLY is used for both.
*/
/* SCSI IO Error Reply Message */
typedef struct _MPI2_SCSI_IO_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 SCSIStatus; /* 0x0C */
U8 SCSIState; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TransferCount; /* 0x14 */
U32 SenseCount; /* 0x18 */
U32 ResponseInfo; /* 0x1C */
U16 TaskTag; /* 0x20 */
U16 SCSIStatusQualifier; /* 0x22 */
U32 BidirectionalTransferCount; /* 0x24 */
U32 EEDPErrorOffset; /* 0x28 */ /* MPI 2.5 only; Reserved in MPI 2.0 */
U32 Reserved6; /* 0x2C */
} MPI2_SCSI_IO_REPLY, MPI2_POINTER PTR_MPI2_SCSI_IO_REPLY,
Mpi2SCSIIOReply_t, MPI2_POINTER pMpi2SCSIIOReply_t;
/* SCSI IO Reply SCSIStatus values (SAM-4 status codes) */
#define MPI2_SCSI_STATUS_GOOD (0x00)
#define MPI2_SCSI_STATUS_CHECK_CONDITION (0x02)
#define MPI2_SCSI_STATUS_CONDITION_MET (0x04)
#define MPI2_SCSI_STATUS_BUSY (0x08)
#define MPI2_SCSI_STATUS_INTERMEDIATE (0x10)
#define MPI2_SCSI_STATUS_INTERMEDIATE_CONDMET (0x14)
#define MPI2_SCSI_STATUS_RESERVATION_CONFLICT (0x18)
#define MPI2_SCSI_STATUS_COMMAND_TERMINATED (0x22) /* obsolete */
#define MPI2_SCSI_STATUS_TASK_SET_FULL (0x28)
#define MPI2_SCSI_STATUS_ACA_ACTIVE (0x30)
#define MPI2_SCSI_STATUS_TASK_ABORTED (0x40)
/* SCSI IO Reply SCSIState flags */
#define MPI2_SCSI_STATE_RESPONSE_INFO_VALID (0x10)
#define MPI2_SCSI_STATE_TERMINATED (0x08)
#define MPI2_SCSI_STATE_NO_SCSI_STATUS (0x04)
#define MPI2_SCSI_STATE_AUTOSENSE_FAILED (0x02)
#define MPI2_SCSI_STATE_AUTOSENSE_VALID (0x01)
/* masks and shifts for the ResponseInfo field */
#define MPI2_SCSI_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSI_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSI_TASKTAG_UNKNOWN (0xFFFF)
/****************************************************************************
* SCSI Task Management messages
****************************************************************************/
/* SCSI Task Management Request Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Reserved1; /* 0x04 */
U8 TaskType; /* 0x05 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U8 LUN[8]; /* 0x0C */
U32 Reserved4[7]; /* 0x14 */
U16 TaskMID; /* 0x30 */
U16 Reserved5; /* 0x32 */
} MPI2_SCSI_TASK_MANAGE_REQUEST,
MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REQUEST,
Mpi2SCSITaskManagementRequest_t,
MPI2_POINTER pMpi2SCSITaskManagementRequest_t;
/* TaskType values */
#define MPI2_SCSITASKMGMT_TASKTYPE_ABORT_TASK (0x01)
#define MPI2_SCSITASKMGMT_TASKTYPE_ABRT_TASK_SET (0x02)
#define MPI2_SCSITASKMGMT_TASKTYPE_TARGET_RESET (0x03)
#define MPI2_SCSITASKMGMT_TASKTYPE_LOGICAL_UNIT_RESET (0x05)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLEAR_TASK_SET (0x06)
#define MPI2_SCSITASKMGMT_TASKTYPE_QUERY_TASK (0x07)
#define MPI2_SCSITASKMGMT_TASKTYPE_CLR_ACA (0x08)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_TASK_SET (0x09)
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT (0x0A)
/* obsolete TaskType name */
#define MPI2_SCSITASKMGMT_TASKTYPE_QRY_UNIT_ATTENTION (MPI2_SCSITASKMGMT_TASKTYPE_QRY_ASYNC_EVENT)
/* MsgFlags bits */
#define MPI2_SCSITASKMGMT_MSGFLAGS_MASK_TARGET_RESET (0x18)
#define MPI2_SCSITASKMGMT_MSGFLAGS_LINK_RESET (0x00)
#define MPI2_SCSITASKMGMT_MSGFLAGS_NEXUS_RESET_SRST (0x08)
#define MPI2_SCSITASKMGMT_MSGFLAGS_SAS_HARD_LINK_RESET (0x10)
#define MPI2_SCSITASKMGMT_MSGFLAGS_DO_NOT_SEND_TASK_IU (0x01)
/* SCSI Task Management Reply Message */
typedef struct _MPI2_SCSI_TASK_MANAGE_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 ResponseCode; /* 0x04 */
U8 TaskType; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TerminationCount; /* 0x14 */
U32 ResponseInfo; /* 0x18 */
} MPI2_SCSI_TASK_MANAGE_REPLY,
MPI2_POINTER PTR_MPI2_SCSI_TASK_MANAGE_REPLY,
Mpi2SCSITaskManagementReply_t, MPI2_POINTER pMpi2SCSIManagementReply_t;
/* ResponseCode values */
#define MPI2_SCSITASKMGMT_RSP_TM_COMPLETE (0x00)
#define MPI2_SCSITASKMGMT_RSP_INVALID_FRAME (0x02)
#define MPI2_SCSITASKMGMT_RSP_TM_NOT_SUPPORTED (0x04)
#define MPI2_SCSITASKMGMT_RSP_TM_FAILED (0x05)
#define MPI2_SCSITASKMGMT_RSP_TM_SUCCEEDED (0x08)
#define MPI2_SCSITASKMGMT_RSP_TM_INVALID_LUN (0x09)
#define MPI2_SCSITASKMGMT_RSP_TM_OVERLAPPED_TAG (0x0A)
#define MPI2_SCSITASKMGMT_RSP_IO_QUEUED_ON_IOC (0x80)
/* masks and shifts for the ResponseInfo field */
#define MPI2_SCSITASKMGMT_RI_MASK_REASONCODE (0x000000FF)
#define MPI2_SCSITASKMGMT_RI_SHIFT_REASONCODE (0)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI2 (0x0000FF00)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI2 (8)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI1 (0x00FF0000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI1 (16)
#define MPI2_SCSITASKMGMT_RI_MASK_ARI0 (0xFF000000)
#define MPI2_SCSITASKMGMT_RI_SHIFT_ARI0 (24)
/****************************************************************************
* SCSI Enclosure Processor messages
****************************************************************************/
/* SCSI Enclosure Processor Request Message */
typedef struct _MPI2_SEP_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U8 Action; /* 0x04 */
U8 Flags; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 SlotStatus; /* 0x0C */
U32 Reserved3; /* 0x10 */
U32 Reserved4; /* 0x14 */
U32 Reserved5; /* 0x18 */
U16 Slot; /* 0x1C */
U16 EnclosureHandle; /* 0x1E */
} MPI2_SEP_REQUEST, MPI2_POINTER PTR_MPI2_SEP_REQUEST,
Mpi2SepRequest_t, MPI2_POINTER pMpi2SepRequest_t;
/* Action defines */
#define MPI2_SEP_REQ_ACTION_WRITE_STATUS (0x00)
#define MPI2_SEP_REQ_ACTION_READ_STATUS (0x01)
/* Flags defines */
#define MPI2_SEP_REQ_FLAGS_DEVHANDLE_ADDRESS (0x00)
#define MPI2_SEP_REQ_FLAGS_ENCLOSURE_SLOT_ADDRESS (0x01)
/* SlotStatus defines */
#define MPI2_SEP_REQ_SLOTSTATUS_REQUEST_REMOVE (0x00040000)
#define MPI2_SEP_REQ_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REQ_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REQ_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REQ_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REQ_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REQ_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REQ_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REQ_SLOTSTATUS_NO_ERROR (0x00000001)
/* SCSI Enclosure Processor Reply Message */
typedef struct _MPI2_SEP_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U8 Action; /* 0x04 */
U8 Flags; /* 0x05 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 SlotStatus; /* 0x14 */
U32 Reserved4; /* 0x18 */
U16 Slot; /* 0x1C */
U16 EnclosureHandle; /* 0x1E */
} MPI2_SEP_REPLY, MPI2_POINTER PTR_MPI2_SEP_REPLY,
Mpi2SepReply_t, MPI2_POINTER pMpi2SepReply_t;
/* SlotStatus defines */
#define MPI2_SEP_REPLY_SLOTSTATUS_REMOVE_READY (0x00040000)
#define MPI2_SEP_REPLY_SLOTSTATUS_IDENTIFY_REQUEST (0x00020000)
#define MPI2_SEP_REPLY_SLOTSTATUS_REBUILD_STOPPED (0x00000200)
#define MPI2_SEP_REPLY_SLOTSTATUS_HOT_SPARE (0x00000100)
#define MPI2_SEP_REPLY_SLOTSTATUS_UNCONFIGURED (0x00000080)
#define MPI2_SEP_REPLY_SLOTSTATUS_PREDICTED_FAULT (0x00000040)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_CRITICAL_ARRAY (0x00000010)
#define MPI2_SEP_REPLY_SLOTSTATUS_IN_FAILED_ARRAY (0x00000008)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_REBUILDING (0x00000004)
#define MPI2_SEP_REPLY_SLOTSTATUS_DEV_FAULTY (0x00000002)
#define MPI2_SEP_REPLY_SLOTSTATUS_NO_ERROR (0x00000001)
#endif

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/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
/*
* Copyright (c) 2009 LSI Corporation.
*
*
* Name: mpi2_ra.h
* Title: MPI RAID Accelerator messages and structures
* Creation Date: April 13, 2009
*
* mpi2_ra.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 05-06-09 02.00.00 Initial version.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_RA_H
#define MPI2_RA_H
/* generic structure for RAID Accelerator Control Block */
typedef struct _MPI2_RAID_ACCELERATOR_CONTROL_BLOCK
{
U32 Reserved[8]; /* 0x00 */
U32 RaidAcceleratorCDB[1]; /* 0x20 */
} MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_CONTROL_BLOCK,
Mpi2RAIDAcceleratorControlBlock_t,
MPI2_POINTER pMpi2RAIDAcceleratorControlBlock_t;
/******************************************************************************
*
* RAID Accelerator Messages
*
*******************************************************************************/
/* RAID Accelerator Request Message */
typedef struct _MPI2_RAID_ACCELERATOR_REQUEST
{
U16 Reserved0; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U64 RaidAcceleratorControlBlockAddress; /* 0x0C */
U8 DmaEngineNumber; /* 0x14 */
U8 Reserved4; /* 0x15 */
U16 Reserved5; /* 0x16 */
U32 Reserved6; /* 0x18 */
U32 Reserved7; /* 0x1C */
U32 Reserved8; /* 0x20 */
} MPI2_RAID_ACCELERATOR_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REQUEST,
Mpi2RAIDAcceleratorRequest_t, MPI2_POINTER pMpi2RAIDAcceleratorRequest_t;
/* RAID Accelerator Error Reply Message */
typedef struct _MPI2_RAID_ACCELERATOR_REPLY
{
U16 Reserved0; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 ProductSpecificData[3]; /* 0x14 */
} MPI2_RAID_ACCELERATOR_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACCELERATOR_REPLY,
Mpi2RAIDAcceleratorReply_t, MPI2_POINTER pMpi2RAIDAcceleratorReply_t;
#endif

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/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
/*
* Copyright (c) 2000-2013 LSI Corporation.
*
*
* Name: mpi2_raid.h
* Title: MPI Integrated RAID messages and structures
* Creation Date: April 26, 2007
*
* mpi2_raid.h Version: 02.00.10
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Modifications to RAID Action request and reply,
* including the Actions and ActionData.
* 02-29-08 02.00.02 Added MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD.
* 05-21-08 02.00.03 Added MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS so that
* the PhysDisk array in MPI2_RAID_VOLUME_CREATION_STRUCT
* can be sized by the build environment.
* 07-30-09 02.00.04 Added proper define for the Use Default Settings bit of
* VolumeCreationFlags and marked the old one as obsolete.
* 05-12-10 02.00.05 Added MPI2_RAID_VOL_FLAGS_OP_MDC define.
* 08-24-10 02.00.06 Added MPI2_RAID_ACTION_COMPATIBILITY_CHECK along with
* related structures and defines.
* Added product-specific range to RAID Action values.
* 11-18-11 02.00.07 Incorporating additions for MPI v2.5.
* 02-06-12 02.00.08 Added MPI2_RAID_ACTION_PHYSDISK_HIDDEN.
* 07-26-12 02.00.09 Added ElapsedSeconds field to MPI2_RAID_VOL_INDICATOR.
* Added MPI2_RAID_VOL_FLAGS_ELAPSED_SECONDS_VALID define.
* 04-17-13 02.00.10 Added MPI25_RAID_ACTION_ADATA_ALLOW_PI.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_RAID_H
#define MPI2_RAID_H
/*****************************************************************************
*
* Integrated RAID Messages
*
*****************************************************************************/
/****************************************************************************
* RAID Action messages
****************************************************************************/
/* ActionDataWord defines for use with MPI2_RAID_ACTION_CREATE_VOLUME action */
#define MPI25_RAID_ACTION_ADATA_ALLOW_PI (0x80000000)
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DELETE_VOLUME action */
#define MPI2_RAID_ACTION_ADATA_KEEP_LBA0 (0x00000000)
#define MPI2_RAID_ACTION_ADATA_ZERO_LBA0 (0x00000001)
/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES action */
#define MPI2_RAID_ACTION_ADATA_DISABL_FULL_REBUILD (0x00000001)
/* ActionDataWord for MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE Action */
typedef struct _MPI2_RAID_ACTION_RATE_DATA
{
U8 RateToChange; /* 0x00 */
U8 RateOrMode; /* 0x01 */
U16 DataScrubDuration; /* 0x02 */
} MPI2_RAID_ACTION_RATE_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_RATE_DATA,
Mpi2RaidActionRateData_t, MPI2_POINTER pMpi2RaidActionRateData_t;
#define MPI2_RAID_ACTION_SET_RATE_RESYNC (0x00)
#define MPI2_RAID_ACTION_SET_RATE_DATA_SCRUB (0x01)
#define MPI2_RAID_ACTION_SET_RATE_POWERSAVE_MODE (0x02)
/* ActionDataWord for MPI2_RAID_ACTION_START_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_START_RAID_FUNCTION
{
U8 RAIDFunction; /* 0x00 */
U8 Flags; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_START_RAID_FUNCTION,
MPI2_POINTER PTR_MPI2_RAID_ACTION_START_RAID_FUNCTION,
Mpi2RaidActionStartRaidFunction_t,
MPI2_POINTER pMpi2RaidActionStartRaidFunction_t;
/* defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_START_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_START_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_START_CONSISTENCY_CHECK (0x02)
/* defines for the Flags field */
#define MPI2_RAID_ACTION_START_NEW (0x00)
#define MPI2_RAID_ACTION_START_RESUME (0x01)
/* ActionDataWord for MPI2_RAID_ACTION_STOP_RAID_FUNCTION Action */
typedef struct _MPI2_RAID_ACTION_STOP_RAID_FUNCTION
{
U8 RAIDFunction; /* 0x00 */
U8 Flags; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
MPI2_POINTER PTR_MPI2_RAID_ACTION_STOP_RAID_FUNCTION,
Mpi2RaidActionStopRaidFunction_t,
MPI2_POINTER pMpi2RaidActionStopRaidFunction_t;
/* defines for the RAIDFunction field */
#define MPI2_RAID_ACTION_STOP_BACKGROUND_INIT (0x00)
#define MPI2_RAID_ACTION_STOP_ONLINE_CAP_EXPANSION (0x01)
#define MPI2_RAID_ACTION_STOP_CONSISTENCY_CHECK (0x02)
/* defines for the Flags field */
#define MPI2_RAID_ACTION_STOP_ABORT (0x00)
#define MPI2_RAID_ACTION_STOP_PAUSE (0x01)
/* ActionDataWord for MPI2_RAID_ACTION_CREATE_HOT_SPARE Action */
typedef struct _MPI2_RAID_ACTION_HOT_SPARE
{
U8 HotSparePool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 DevHandle; /* 0x02 */
} MPI2_RAID_ACTION_HOT_SPARE, MPI2_POINTER PTR_MPI2_RAID_ACTION_HOT_SPARE,
Mpi2RaidActionHotSpare_t, MPI2_POINTER pMpi2RaidActionHotSpare_t;
/* ActionDataWord for MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE Action */
typedef struct _MPI2_RAID_ACTION_FW_UPDATE_MODE
{
U8 Flags; /* 0x00 */
U8 DeviceFirmwareUpdateModeTimeout; /* 0x01 */
U16 Reserved1; /* 0x02 */
} MPI2_RAID_ACTION_FW_UPDATE_MODE,
MPI2_POINTER PTR_MPI2_RAID_ACTION_FW_UPDATE_MODE,
Mpi2RaidActionFwUpdateMode_t, MPI2_POINTER pMpi2RaidActionFwUpdateMode_t;
/* ActionDataWord defines for use with MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE action */
#define MPI2_RAID_ACTION_ADATA_DISABLE_FW_UPDATE (0x00)
#define MPI2_RAID_ACTION_ADATA_ENABLE_FW_UPDATE (0x01)
typedef union _MPI2_RAID_ACTION_DATA
{
U32 Word;
MPI2_RAID_ACTION_RATE_DATA Rates;
MPI2_RAID_ACTION_START_RAID_FUNCTION StartRaidFunction;
MPI2_RAID_ACTION_STOP_RAID_FUNCTION StopRaidFunction;
MPI2_RAID_ACTION_HOT_SPARE HotSpare;
MPI2_RAID_ACTION_FW_UPDATE_MODE FwUpdateMode;
} MPI2_RAID_ACTION_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_DATA,
Mpi2RaidActionData_t, MPI2_POINTER pMpi2RaidActionData_t;
/* RAID Action Request Message */
typedef struct _MPI2_RAID_ACTION_REQUEST
{
U8 Action; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 VolDevHandle; /* 0x04 */
U8 PhysDiskNum; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
MPI2_RAID_ACTION_DATA ActionDataWord; /* 0x10 */
MPI2_SGE_SIMPLE_UNION ActionDataSGE; /* 0x14 */
} MPI2_RAID_ACTION_REQUEST, MPI2_POINTER PTR_MPI2_RAID_ACTION_REQUEST,
Mpi2RaidActionRequest_t, MPI2_POINTER pMpi2RaidActionRequest_t;
/* RAID Action request Action values */
#define MPI2_RAID_ACTION_INDICATOR_STRUCT (0x01)
#define MPI2_RAID_ACTION_CREATE_VOLUME (0x02)
#define MPI2_RAID_ACTION_DELETE_VOLUME (0x03)
#define MPI2_RAID_ACTION_DISABLE_ALL_VOLUMES (0x04)
#define MPI2_RAID_ACTION_ENABLE_ALL_VOLUMES (0x05)
#define MPI2_RAID_ACTION_PHYSDISK_OFFLINE (0x0A)
#define MPI2_RAID_ACTION_PHYSDISK_ONLINE (0x0B)
#define MPI2_RAID_ACTION_FAIL_PHYSDISK (0x0F)
#define MPI2_RAID_ACTION_ACTIVATE_VOLUME (0x11)
#define MPI2_RAID_ACTION_DEVICE_FW_UPDATE_MODE (0x15)
#define MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE (0x17)
#define MPI2_RAID_ACTION_SET_VOLUME_NAME (0x18)
#define MPI2_RAID_ACTION_SET_RAID_FUNCTION_RATE (0x19)
#define MPI2_RAID_ACTION_ENABLE_FAILED_VOLUME (0x1C)
#define MPI2_RAID_ACTION_CREATE_HOT_SPARE (0x1D)
#define MPI2_RAID_ACTION_DELETE_HOT_SPARE (0x1E)
#define MPI2_RAID_ACTION_SYSTEM_SHUTDOWN_INITIATED (0x20)
#define MPI2_RAID_ACTION_START_RAID_FUNCTION (0x21)
#define MPI2_RAID_ACTION_STOP_RAID_FUNCTION (0x22)
#define MPI2_RAID_ACTION_COMPATIBILITY_CHECK (0x23)
#define MPI2_RAID_ACTION_PHYSDISK_HIDDEN (0x24)
#define MPI2_RAID_ACTION_MIN_PRODUCT_SPECIFIC (0x80)
#define MPI2_RAID_ACTION_MAX_PRODUCT_SPECIFIC (0xFF)
/* RAID Volume Creation Structure */
/*
* The following define can be customized for the targeted product.
*/
#ifndef MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS
#define MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS (1)
#endif
typedef struct _MPI2_RAID_VOLUME_PHYSDISK
{
U8 RAIDSetNum; /* 0x00 */
U8 PhysDiskMap; /* 0x01 */
U16 PhysDiskDevHandle; /* 0x02 */
} MPI2_RAID_VOLUME_PHYSDISK, MPI2_POINTER PTR_MPI2_RAID_VOLUME_PHYSDISK,
Mpi2RaidVolumePhysDisk_t, MPI2_POINTER pMpi2RaidVolumePhysDisk_t;
/* defines for the PhysDiskMap field */
#define MPI2_RAIDACTION_PHYSDISK_PRIMARY (0x01)
#define MPI2_RAIDACTION_PHYSDISK_SECONDARY (0x02)
typedef struct _MPI2_RAID_VOLUME_CREATION_STRUCT
{
U8 NumPhysDisks; /* 0x00 */
U8 VolumeType; /* 0x01 */
U16 Reserved1; /* 0x02 */
U32 VolumeCreationFlags; /* 0x04 */
U32 VolumeSettings; /* 0x08 */
U8 Reserved2; /* 0x0C */
U8 ResyncRate; /* 0x0D */
U16 DataScrubDuration; /* 0x0E */
U64 VolumeMaxLBA; /* 0x10 */
U32 StripeSize; /* 0x18 */
U8 Name[16]; /* 0x1C */
MPI2_RAID_VOLUME_PHYSDISK PhysDisk[MPI2_RAID_VOL_CREATION_NUM_PHYSDISKS];/* 0x2C */
} MPI2_RAID_VOLUME_CREATION_STRUCT,
MPI2_POINTER PTR_MPI2_RAID_VOLUME_CREATION_STRUCT,
Mpi2RaidVolumeCreationStruct_t, MPI2_POINTER pMpi2RaidVolumeCreationStruct_t;
/* use MPI2_RAID_VOL_TYPE_ defines from mpi2_cnfg.h for VolumeType */
/* defines for the VolumeCreationFlags field */
#define MPI2_RAID_VOL_CREATION_DEFAULT_SETTINGS (0x80000000)
#define MPI2_RAID_VOL_CREATION_BACKGROUND_INIT (0x00000004) /* MPI 2.0 only */
#define MPI2_RAID_VOL_CREATION_LOW_LEVEL_INIT (0x00000002)
#define MPI2_RAID_VOL_CREATION_MIGRATE_DATA (0x00000001)
/* The following is an obsolete define.
* It must be shifted left 24 bits in order to set the proper bit.
*/
#define MPI2_RAID_VOL_CREATION_USE_DEFAULT_SETTINGS (0x80)
/* RAID Online Capacity Expansion Structure */
typedef struct _MPI2_RAID_ONLINE_CAPACITY_EXPANSION
{
U32 Flags; /* 0x00 */
U16 DevHandle0; /* 0x04 */
U16 Reserved1; /* 0x06 */
U16 DevHandle1; /* 0x08 */
U16 Reserved2; /* 0x0A */
} MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
MPI2_POINTER PTR_MPI2_RAID_ONLINE_CAPACITY_EXPANSION,
Mpi2RaidOnlineCapacityExpansion_t,
MPI2_POINTER pMpi2RaidOnlineCapacityExpansion_t;
/* RAID Compatibility Input Structure */
typedef struct _MPI2_RAID_COMPATIBILITY_INPUT_STRUCT
{
U16 SourceDevHandle; /* 0x00 */
U16 CandidateDevHandle; /* 0x02 */
U32 Flags; /* 0x04 */
U32 Reserved1; /* 0x08 */
U32 Reserved2; /* 0x0C */
} MPI2_RAID_COMPATIBILITY_INPUT_STRUCT,
MPI2_POINTER PTR_MPI2_RAID_COMPATIBILITY_INPUT_STRUCT,
Mpi2RaidCompatibilityInputStruct_t,
MPI2_POINTER pMpi2RaidCompatibilityInputStruct_t;
/* defines for RAID Compatibility Structure Flags field */
#define MPI2_RAID_COMPAT_SOURCE_IS_VOLUME_FLAG (0x00000002)
#define MPI2_RAID_COMPAT_REPORT_SOURCE_INFO_FLAG (0x00000001)
/* RAID Volume Indicator Structure */
typedef struct _MPI2_RAID_VOL_INDICATOR
{
U64 TotalBlocks; /* 0x00 */
U64 BlocksRemaining; /* 0x08 */
U32 Flags; /* 0x10 */
U32 ElapsedSeconds; /* 0x14 */
} MPI2_RAID_VOL_INDICATOR, MPI2_POINTER PTR_MPI2_RAID_VOL_INDICATOR,
Mpi2RaidVolIndicator_t, MPI2_POINTER pMpi2RaidVolIndicator_t;
/* defines for RAID Volume Indicator Flags field */
#define MPI2_RAID_VOL_FLAGS_ELAPSED_SECONDS_VALID (0x80000000)
#define MPI2_RAID_VOL_FLAGS_OP_MASK (0x0000000F)
#define MPI2_RAID_VOL_FLAGS_OP_BACKGROUND_INIT (0x00000000)
#define MPI2_RAID_VOL_FLAGS_OP_ONLINE_CAP_EXPANSION (0x00000001)
#define MPI2_RAID_VOL_FLAGS_OP_CONSISTENCY_CHECK (0x00000002)
#define MPI2_RAID_VOL_FLAGS_OP_RESYNC (0x00000003)
#define MPI2_RAID_VOL_FLAGS_OP_MDC (0x00000004)
/* RAID Compatibility Result Structure */
typedef struct _MPI2_RAID_COMPATIBILITY_RESULT_STRUCT
{
U8 State; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 Reserved2; /* 0x02 */
U32 GenericAttributes; /* 0x04 */
U32 OEMSpecificAttributes; /* 0x08 */
U32 Reserved3; /* 0x0C */
U32 Reserved4; /* 0x10 */
} MPI2_RAID_COMPATIBILITY_RESULT_STRUCT,
MPI2_POINTER PTR_MPI2_RAID_COMPATIBILITY_RESULT_STRUCT,
Mpi2RaidCompatibilityResultStruct_t,
MPI2_POINTER pMpi2RaidCompatibilityResultStruct_t;
/* defines for RAID Compatibility Result Structure State field */
#define MPI2_RAID_COMPAT_STATE_COMPATIBLE (0x00)
#define MPI2_RAID_COMPAT_STATE_NOT_COMPATIBLE (0x01)
/* defines for RAID Compatibility Result Structure GenericAttributes field */
#define MPI2_RAID_COMPAT_GENATTRIB_4K_SECTOR (0x00000010)
#define MPI2_RAID_COMPAT_GENATTRIB_MEDIA_MASK (0x0000000C)
#define MPI2_RAID_COMPAT_GENATTRIB_SOLID_STATE_DRIVE (0x00000008)
#define MPI2_RAID_COMPAT_GENATTRIB_HARD_DISK_DRIVE (0x00000004)
#define MPI2_RAID_COMPAT_GENATTRIB_PROTOCOL_MASK (0x00000003)
#define MPI2_RAID_COMPAT_GENATTRIB_SAS_PROTOCOL (0x00000002)
#define MPI2_RAID_COMPAT_GENATTRIB_SATA_PROTOCOL (0x00000001)
/* RAID Action Reply ActionData union */
typedef union _MPI2_RAID_ACTION_REPLY_DATA
{
U32 Word[6];
MPI2_RAID_VOL_INDICATOR RaidVolumeIndicator;
U16 VolDevHandle;
U8 VolumeState;
U8 PhysDiskNum;
MPI2_RAID_COMPATIBILITY_RESULT_STRUCT RaidCompatibilityResult;
} MPI2_RAID_ACTION_REPLY_DATA, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY_DATA,
Mpi2RaidActionReplyData_t, MPI2_POINTER pMpi2RaidActionReplyData_t;
/* use MPI2_RAIDVOL0_SETTING_ defines from mpi2_cnfg.h for MPI2_RAID_ACTION_CHANGE_VOL_WRITE_CACHE action */
/* RAID Action Reply Message */
typedef struct _MPI2_RAID_ACTION_REPLY
{
U8 Action; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 VolDevHandle; /* 0x04 */
U8 PhysDiskNum; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U16 Reserved3; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
MPI2_RAID_ACTION_REPLY_DATA ActionData; /* 0x14 */
} MPI2_RAID_ACTION_REPLY, MPI2_POINTER PTR_MPI2_RAID_ACTION_REPLY,
Mpi2RaidActionReply_t, MPI2_POINTER pMpi2RaidActionReply_t;
#endif

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/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
/*
* Copyright (c) 2000-2013 LSI Corporation.
*
*
* Name: mpi2_sas.h
* Title: MPI Serial Attached SCSI structures and definitions
* Creation Date: February 9, 2007
*
* mpi2_sas.h Version: 02.00.08
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 06-26-07 02.00.01 Added Clear All Persistent Operation to SAS IO Unit
* Control Request.
* 10-02-08 02.00.02 Added Set IOC Parameter Operation to SAS IO Unit Control
* Request.
* 10-28-09 02.00.03 Changed the type of SGL in MPI2_SATA_PASSTHROUGH_REQUEST
* to MPI2_SGE_IO_UNION since it supports chained SGLs.
* 05-12-10 02.00.04 Modified some comments.
* 08-11-10 02.00.05 Added NCQ operations to SAS IO Unit Control.
* 11-18-11 02.00.06 Incorporating additions for MPI v2.5.
* 07-10-12 02.00.07 Added MPI2_SATA_PT_SGE_UNION for use in the SATA
* Passthrough Request message.
* 08-19-13 02.00.08 Made MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL obsolete
* for anything newer than MPI v2.0.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_SAS_H
#define MPI2_SAS_H
/*
* Values for SASStatus.
*/
#define MPI2_SASSTATUS_SUCCESS (0x00)
#define MPI2_SASSTATUS_UNKNOWN_ERROR (0x01)
#define MPI2_SASSTATUS_INVALID_FRAME (0x02)
#define MPI2_SASSTATUS_UTC_BAD_DEST (0x03)
#define MPI2_SASSTATUS_UTC_BREAK_RECEIVED (0x04)
#define MPI2_SASSTATUS_UTC_CONNECT_RATE_NOT_SUPPORTED (0x05)
#define MPI2_SASSTATUS_UTC_PORT_LAYER_REQUEST (0x06)
#define MPI2_SASSTATUS_UTC_PROTOCOL_NOT_SUPPORTED (0x07)
#define MPI2_SASSTATUS_UTC_STP_RESOURCES_BUSY (0x08)
#define MPI2_SASSTATUS_UTC_WRONG_DESTINATION (0x09)
#define MPI2_SASSTATUS_SHORT_INFORMATION_UNIT (0x0A)
#define MPI2_SASSTATUS_LONG_INFORMATION_UNIT (0x0B)
#define MPI2_SASSTATUS_XFER_RDY_INCORRECT_WRITE_DATA (0x0C)
#define MPI2_SASSTATUS_XFER_RDY_REQUEST_OFFSET_ERROR (0x0D)
#define MPI2_SASSTATUS_XFER_RDY_NOT_EXPECTED (0x0E)
#define MPI2_SASSTATUS_DATA_INCORRECT_DATA_LENGTH (0x0F)
#define MPI2_SASSTATUS_DATA_TOO_MUCH_READ_DATA (0x10)
#define MPI2_SASSTATUS_DATA_OFFSET_ERROR (0x11)
#define MPI2_SASSTATUS_SDSF_NAK_RECEIVED (0x12)
#define MPI2_SASSTATUS_SDSF_CONNECTION_FAILED (0x13)
#define MPI2_SASSTATUS_INITIATOR_RESPONSE_TIMEOUT (0x14)
/*
* Values for the SAS DeviceInfo field used in SAS Device Status Change Event
* data and SAS Configuration pages.
*/
#define MPI2_SAS_DEVICE_INFO_SEP (0x00004000)
#define MPI2_SAS_DEVICE_INFO_ATAPI_DEVICE (0x00002000)
#define MPI2_SAS_DEVICE_INFO_LSI_DEVICE (0x00001000)
#define MPI2_SAS_DEVICE_INFO_DIRECT_ATTACH (0x00000800)
#define MPI2_SAS_DEVICE_INFO_SSP_TARGET (0x00000400)
#define MPI2_SAS_DEVICE_INFO_STP_TARGET (0x00000200)
#define MPI2_SAS_DEVICE_INFO_SMP_TARGET (0x00000100)
#define MPI2_SAS_DEVICE_INFO_SATA_DEVICE (0x00000080)
#define MPI2_SAS_DEVICE_INFO_SSP_INITIATOR (0x00000040)
#define MPI2_SAS_DEVICE_INFO_STP_INITIATOR (0x00000020)
#define MPI2_SAS_DEVICE_INFO_SMP_INITIATOR (0x00000010)
#define MPI2_SAS_DEVICE_INFO_SATA_HOST (0x00000008)
#define MPI2_SAS_DEVICE_INFO_MASK_DEVICE_TYPE (0x00000007)
#define MPI2_SAS_DEVICE_INFO_NO_DEVICE (0x00000000)
#define MPI2_SAS_DEVICE_INFO_END_DEVICE (0x00000001)
#define MPI2_SAS_DEVICE_INFO_EDGE_EXPANDER (0x00000002)
#define MPI2_SAS_DEVICE_INFO_FANOUT_EXPANDER (0x00000003)
/*****************************************************************************
*
* SAS Messages
*
*****************************************************************************/
/****************************************************************************
* SMP Passthrough messages
****************************************************************************/
/* SMP Passthrough Request Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REQUEST
{
U8 PassthroughFlags; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 RequestDataLength; /* 0x04 */
U8 SGLFlags; /* 0x06 */ /* MPI v2.0 only. Reserved on MPI v2.5. */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U32 Reserved2; /* 0x0C */
U64 SASAddress; /* 0x10 */
U32 Reserved3; /* 0x18 */
U32 Reserved4; /* 0x1C */
MPI2_SIMPLE_SGE_UNION SGL; /* 0x20 */ /* MPI v2.5: IEEE Simple 64 elements only */
} MPI2_SMP_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REQUEST,
Mpi2SmpPassthroughRequest_t, MPI2_POINTER pMpi2SmpPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI2_SMP_PT_REQ_PT_FLAGS_IMMEDIATE (0x80)
/* MPI v2.0: use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* SMP Passthrough Reply Message */
typedef struct _MPI2_SMP_PASSTHROUGH_REPLY
{
U8 PassthroughFlags; /* 0x00 */
U8 PhysicalPort; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 ResponseDataLength; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U8 Reserved2; /* 0x0C */
U8 SASStatus; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 Reserved3; /* 0x14 */
U8 ResponseData[4]; /* 0x18 */
} MPI2_SMP_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SMP_PASSTHROUGH_REPLY,
Mpi2SmpPassthroughReply_t, MPI2_POINTER pMpi2SmpPassthroughReply_t;
/* values for PassthroughFlags field */
#define MPI2_SMP_PT_REPLY_PT_FLAGS_IMMEDIATE (0x80)
/* values for SASStatus field are at the top of this file */
/****************************************************************************
* SATA Passthrough messages
****************************************************************************/
typedef union _MPI2_SATA_PT_SGE_UNION
{
MPI2_SGE_SIMPLE_UNION MpiSimple; /* MPI v2.0 only */
MPI2_SGE_CHAIN_UNION MpiChain; /* MPI v2.0 only */
MPI2_IEEE_SGE_SIMPLE_UNION IeeeSimple;
MPI2_IEEE_SGE_CHAIN_UNION IeeeChain; /* MPI v2.0 only */
MPI25_IEEE_SGE_CHAIN64 IeeeChain64; /* MPI v2.5 only */
} MPI2_SATA_PT_SGE_UNION, MPI2_POINTER PTR_MPI2_SATA_PT_SGE_UNION,
Mpi2SataPTSGEUnion_t, MPI2_POINTER pMpi2SataPTSGEUnion_t;
/* SATA Passthrough Request Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REQUEST
{
U16 DevHandle; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 PassthroughFlags; /* 0x04 */
U8 SGLFlags; /* 0x06 */ /* MPI v2.0 only. Reserved on MPI v2.5. */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U32 Reserved2; /* 0x0C */
U32 Reserved3; /* 0x10 */
U32 Reserved4; /* 0x14 */
U32 DataLength; /* 0x18 */
U8 CommandFIS[20]; /* 0x1C */
MPI2_SATA_PT_SGE_UNION SGL; /* 0x30 */ /* MPI v2.5: IEEE 64 elements only */
} MPI2_SATA_PASSTHROUGH_REQUEST, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REQUEST,
Mpi2SataPassthroughRequest_t, MPI2_POINTER pMpi2SataPassthroughRequest_t;
/* values for PassthroughFlags field */
#define MPI2_SATA_PT_REQ_PT_FLAGS_EXECUTE_DIAG (0x0100)
#define MPI2_SATA_PT_REQ_PT_FLAGS_DMA (0x0020)
#define MPI2_SATA_PT_REQ_PT_FLAGS_PIO (0x0010)
#define MPI2_SATA_PT_REQ_PT_FLAGS_UNSPECIFIED_VU (0x0004)
#define MPI2_SATA_PT_REQ_PT_FLAGS_WRITE (0x0002)
#define MPI2_SATA_PT_REQ_PT_FLAGS_READ (0x0001)
/* MPI v2.0: use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* SATA Passthrough Reply Message */
typedef struct _MPI2_SATA_PASSTHROUGH_REPLY
{
U16 DevHandle; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 PassthroughFlags; /* 0x04 */
U8 SGLFlags; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved1; /* 0x0A */
U8 Reserved2; /* 0x0C */
U8 SASStatus; /* 0x0D */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 StatusFIS[20]; /* 0x14 */
U32 StatusControlRegisters; /* 0x28 */
U32 TransferCount; /* 0x2C */
} MPI2_SATA_PASSTHROUGH_REPLY, MPI2_POINTER PTR_MPI2_SATA_PASSTHROUGH_REPLY,
Mpi2SataPassthroughReply_t, MPI2_POINTER pMpi2SataPassthroughReply_t;
/* values for SASStatus field are at the top of this file */
/****************************************************************************
* SAS IO Unit Control messages
****************************************************************************/
/* SAS IO Unit Control Request Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REQUEST
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U8 PhyNum; /* 0x0E */
U8 PrimFlags; /* 0x0F */
U32 Primitive; /* 0x10 */
U8 LookupMethod; /* 0x14 */
U8 Reserved5; /* 0x15 */
U16 SlotNumber; /* 0x16 */
U64 LookupAddress; /* 0x18 */
U32 IOCParameterValue; /* 0x20 */
U32 Reserved7; /* 0x24 */
U32 Reserved8; /* 0x28 */
} MPI2_SAS_IOUNIT_CONTROL_REQUEST,
MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REQUEST,
Mpi2SasIoUnitControlRequest_t, MPI2_POINTER pMpi2SasIoUnitControlRequest_t;
/* values for the Operation field */
#define MPI2_SAS_OP_CLEAR_ALL_PERSISTENT (0x02)
#define MPI2_SAS_OP_PHY_LINK_RESET (0x06)
#define MPI2_SAS_OP_PHY_HARD_RESET (0x07)
#define MPI2_SAS_OP_PHY_CLEAR_ERROR_LOG (0x08)
#define MPI2_SAS_OP_SEND_PRIMITIVE (0x0A)
#define MPI2_SAS_OP_FORCE_FULL_DISCOVERY (0x0B)
#define MPI2_SAS_OP_TRANSMIT_PORT_SELECT_SIGNAL (0x0C) /* MPI v2.0 only */
#define MPI2_SAS_OP_REMOVE_DEVICE (0x0D)
#define MPI2_SAS_OP_LOOKUP_MAPPING (0x0E)
#define MPI2_SAS_OP_SET_IOC_PARAMETER (0x0F)
#define MPI25_SAS_OP_ENABLE_FP_DEVICE (0x10)
#define MPI25_SAS_OP_DISABLE_FP_DEVICE (0x11)
#define MPI25_SAS_OP_ENABLE_FP_ALL (0x12)
#define MPI25_SAS_OP_DISABLE_FP_ALL (0x13)
#define MPI2_SAS_OP_DEV_ENABLE_NCQ (0x14)
#define MPI2_SAS_OP_DEV_DISABLE_NCQ (0x15)
#define MPI2_SAS_OP_PRODUCT_SPECIFIC_MIN (0x80)
/* values for the PrimFlags field */
#define MPI2_SAS_PRIMFLAGS_SINGLE (0x08)
#define MPI2_SAS_PRIMFLAGS_TRIPLE (0x02)
#define MPI2_SAS_PRIMFLAGS_REDUNDANT (0x01)
/* values for the LookupMethod field */
#define MPI2_SAS_LOOKUP_METHOD_SAS_ADDRESS (0x01)
#define MPI2_SAS_LOOKUP_METHOD_SAS_ENCLOSURE_SLOT (0x02)
#define MPI2_SAS_LOOKUP_METHOD_SAS_DEVICE_NAME (0x03)
/* SAS IO Unit Control Reply Message */
typedef struct _MPI2_SAS_IOUNIT_CONTROL_REPLY
{
U8 Operation; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 DevHandle; /* 0x04 */
U8 IOCParameter; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_SAS_IOUNIT_CONTROL_REPLY,
MPI2_POINTER PTR_MPI2_SAS_IOUNIT_CONTROL_REPLY,
Mpi2SasIoUnitControlReply_t, MPI2_POINTER pMpi2SasIoUnitControlReply_t;
#endif

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/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
/*
* Copyright (c) 2000-2012 LSI Corporation.
*
*
* Name: mpi2_targ.h
* Title: MPI Target mode messages and structures
* Creation Date: September 8, 2006
*
* mpi2_targ.h Version: 02.00.06
*
* NOTE: Names (typedefs, defines, etc.) beginning with an MPI25 or Mpi25
* prefix are for use only on MPI v2.5 products, and must not be used
* with MPI v2.0 products. Unless otherwise noted, names beginning with
* MPI2 or Mpi2 are for use with both MPI v2.0 and MPI v2.5 products.
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 08-31-07 02.00.01 Added Command Buffer Data Location Address Space bits to
* BufferPostFlags field of CommandBufferPostBase Request.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 10-02-08 02.00.03 Removed NextCmdBufferOffset from
* MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST.
* Target Status Send Request only takes a single SGE for
* response data.
* 02-10-10 02.00.04 Added comment to MPI2_TARGET_SSP_RSP_IU structure.
* 11-18-11 02.00.05 Incorporating additions for MPI v2.5.
* 11-27-12 02.00.06 Added InitiatorDevHandle field to MPI2_TARGET_MODE_ABORT
* request message structure.
* Added AbortType MPI2_TARGET_MODE_ABORT_DEVHANDLE and
* MPI2_TARGET_MODE_ABORT_ALL_COMMANDS.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TARG_H
#define MPI2_TARG_H
/******************************************************************************
*
* SCSI Target Messages
*
*******************************************************************************/
/****************************************************************************
* Target Command Buffer Post Base Request
****************************************************************************/
typedef struct _MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST
{
U8 BufferPostFlags; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 TotalCmdBuffers; /* 0x04 */
U8 Reserved; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 CmdBufferLength; /* 0x10 */
U16 Reserved4; /* 0x12 */
U32 BaseAddressLow; /* 0x14 */
U32 BaseAddressHigh; /* 0x18 */
} MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_BASE_REQUEST,
Mpi2TargetCmdBufferPostBaseRequest_t,
MPI2_POINTER pMpi2TargetCmdBufferPostBaseRequest_t;
/* values for the BufferPostflags field */
#define MPI2_CMD_BUF_POST_BASE_ADDRESS_SPACE_MASK (0x0C)
#define MPI2_CMD_BUF_POST_BASE_SYSTEM_ADDRESS_SPACE (0x00)
#define MPI2_CMD_BUF_POST_BASE_IOCDDR_ADDRESS_SPACE (0x04)
#define MPI2_CMD_BUF_POST_BASE_IOCPLB_ADDRESS_SPACE (0x08)
#define MPI2_CMD_BUF_POST_BASE_IOCPLBNTA_ADDRESS_SPACE (0x0C)
#define MPI2_CMD_BUF_POST_BASE_FLAGS_AUTO_POST_ALL (0x01)
/****************************************************************************
* Target Command Buffer Post List Request
****************************************************************************/
typedef struct _MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST
{
U16 Reserved; /* 0x00 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 CmdBufferCount; /* 0x04 */
U8 Reserved1; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved2; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 IoIndex[2]; /* 0x10 */
} MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_CMD_BUF_POST_LIST_REQUEST,
Mpi2TargetCmdBufferPostListRequest_t,
MPI2_POINTER pMpi2TargetCmdBufferPostListRequest_t;
/****************************************************************************
* Target Command Buffer Post Base List Reply
****************************************************************************/
typedef struct _MPI2_TARGET_BUF_POST_BASE_LIST_REPLY
{
U8 Flags; /* 0x00 */
U8 Reserved; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U16 IoIndex; /* 0x14 */
U16 Reserved5; /* 0x16 */
U32 Reserved6; /* 0x18 */
} MPI2_TARGET_BUF_POST_BASE_LIST_REPLY,
MPI2_POINTER PTR_MPI2_TARGET_BUF_POST_BASE_LIST_REPLY,
Mpi2TargetCmdBufferPostBaseListReply_t,
MPI2_POINTER pMpi2TargetCmdBufferPostBaseListReply_t;
/* Flags defines */
#define MPI2_CMD_BUF_POST_REPLY_IOINDEX_VALID (0x01)
/****************************************************************************
* Command Buffer Formats (with 16 byte CDB)
****************************************************************************/
typedef struct _MPI2_TARGET_SSP_CMD_BUFFER
{
U8 FrameType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 InitiatorConnectionTag; /* 0x02 */
U32 HashedSourceSASAddress; /* 0x04 */
U16 Reserved2; /* 0x08 */
U16 Flags; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 Tag; /* 0x10 */
U16 TargetPortTransferTag; /* 0x12 */
U32 DataOffset; /* 0x14 */
/* COMMAND information unit starts here */
U8 LogicalUnitNumber[8]; /* 0x18 */
U8 Reserved4; /* 0x20 */
U8 TaskAttribute; /* lower 3 bits */ /* 0x21 */
U8 Reserved5; /* 0x22 */
U8 AdditionalCDBLength; /* upper 5 bits */ /* 0x23 */
U8 CDB[16]; /* 0x24 */
/* Additional CDB bytes extend past the CDB field */
} MPI2_TARGET_SSP_CMD_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_CMD_BUFFER,
Mpi2TargetSspCmdBuffer, MPI2_POINTER pMp2iTargetSspCmdBuffer;
typedef struct _MPI2_TARGET_SSP_TASK_BUFFER
{
U8 FrameType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U16 InitiatorConnectionTag; /* 0x02 */
U32 HashedSourceSASAddress; /* 0x04 */
U16 Reserved2; /* 0x08 */
U16 Flags; /* 0x0A */
U32 Reserved3; /* 0x0C */
U16 Tag; /* 0x10 */
U16 TargetPortTransferTag; /* 0x12 */
U32 DataOffset; /* 0x14 */
/* TASK information unit starts here */
U8 LogicalUnitNumber[8]; /* 0x18 */
U16 Reserved4; /* 0x20 */
U8 TaskManagementFunction; /* 0x22 */
U8 Reserved5; /* 0x23 */
U16 ManagedTaskTag; /* 0x24 */
U16 Reserved6; /* 0x26 */
U32 Reserved7; /* 0x28 */
U32 Reserved8; /* 0x2C */
U32 Reserved9; /* 0x30 */
} MPI2_TARGET_SSP_TASK_BUFFER, MPI2_POINTER PTR_MPI2_TARGET_SSP_TASK_BUFFER,
Mpi2TargetSspTaskBuffer, MPI2_POINTER pMpi2TargetSspTaskBuffer;
/* mask and shift for HashedSourceSASAddress field */
#define MPI2_TARGET_HASHED_SAS_ADDRESS_MASK (0xFFFFFF00)
#define MPI2_TARGET_HASHED_SAS_ADDRESS_SHIFT (8)
/****************************************************************************
* MPI v2.0 Target Assist Request
****************************************************************************/
typedef struct _MPI2_TARGET_ASSIST_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 TargetAssistFlags; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 QueueTag; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 IoIndex; /* 0x0C */
U16 InitiatorConnectionTag; /* 0x0E */
U16 SGLFlags; /* 0x10 */
U8 SequenceNumber; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U32 EEDPBlockSize; /* 0x28 */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U32 PrimaryReferenceTag; /* 0x34 */
U16 PrimaryApplicationTag; /* 0x38 */
U16 PrimaryApplicationTagMask; /* 0x3A */
U32 RelativeOffset; /* 0x3C */
U32 Reserved5; /* 0x40 */
U32 Reserved6; /* 0x44 */
U32 Reserved7; /* 0x48 */
U32 Reserved8; /* 0x4C */
MPI2_SGE_IO_UNION SGL[1]; /* 0x50 */
} MPI2_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI2_TARGET_ASSIST_REQUEST,
Mpi2TargetAssistRequest_t, MPI2_POINTER pMpi2TargetAssistRequest_t;
/* Target Assist TargetAssistFlags bits */
#define MPI2_TARGET_ASSIST_FLAGS_REPOST_CMD_BUFFER (0x80)
#define MPI2_TARGET_ASSIST_FLAGS_TLR (0x10)
#define MPI2_TARGET_ASSIST_FLAGS_RETRANSMIT (0x04)
#define MPI2_TARGET_ASSIST_FLAGS_AUTO_STATUS (0x02)
#define MPI2_TARGET_ASSIST_FLAGS_DATA_DIRECTION (0x01)
/* Target Assist SGLFlags bits */
/* base values for Data Location Address Space */
#define MPI2_TARGET_ASSIST_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_TARGET_ASSIST_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_TARGET_ASSIST_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_TARGET_ASSIST_SGLFLAGS_PLBNTA_ADDR (0x0C)
/* base values for Type */
#define MPI2_TARGET_ASSIST_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_TARGET_ASSIST_SGLFLAGS_MPI_TYPE (0x00)
#define MPI2_TARGET_ASSIST_SGLFLAGS_32IEEE_TYPE (0x01)
#define MPI2_TARGET_ASSIST_SGLFLAGS_64IEEE_TYPE (0x02)
/* shift values for each sub-field */
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL3_SHIFT (12)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL2_SHIFT (8)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL1_SHIFT (4)
#define MPI2_TARGET_ASSIST_SGLFLAGS_SGL0_SHIFT (0)
/* Target Assist IoFlags bits */
#define MPI2_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI2_TARGET_ASSIST_IOFLAGS_MULTICAST (0x0400)
#define MPI2_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200)
/* Target Assist EEDPFlags bits */
#define MPI2_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI2_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI2_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI2_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI2_TA_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI2_TA_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI2_TA_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI2_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI2_TA_EEDPFLAGS_MASK_OP (0x0007)
#define MPI2_TA_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI2_TA_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI2_TA_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI2_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI2_TA_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI2_TA_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI2_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/****************************************************************************
* MPI v2.5 Target Assist Request
****************************************************************************/
typedef struct _MPI25_TARGET_ASSIST_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 TargetAssistFlags; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 QueueTag; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 IoIndex; /* 0x0C */
U16 InitiatorConnectionTag; /* 0x0E */
U8 DMAFlags; /* 0x10 */
U8 Reserved9; /* 0x11 */
U8 SequenceNumber; /* 0x12 */
U8 Reserved4; /* 0x13 */
U8 SGLOffset0; /* 0x14 */
U8 SGLOffset1; /* 0x15 */
U8 SGLOffset2; /* 0x16 */
U8 SGLOffset3; /* 0x17 */
U32 SkipCount; /* 0x18 */
U32 DataLength; /* 0x1C */
U32 BidirectionalDataLength; /* 0x20 */
U16 IoFlags; /* 0x24 */
U16 EEDPFlags; /* 0x26 */
U16 EEDPBlockSize; /* 0x28 */
U16 Reserved10; /* 0x2A */
U32 SecondaryReferenceTag; /* 0x2C */
U16 SecondaryApplicationTag; /* 0x30 */
U16 ApplicationTagTranslationMask; /* 0x32 */
U32 PrimaryReferenceTag; /* 0x34 */
U16 PrimaryApplicationTag; /* 0x38 */
U16 PrimaryApplicationTagMask; /* 0x3A */
U32 RelativeOffset; /* 0x3C */
U32 Reserved5; /* 0x40 */
U32 Reserved6; /* 0x44 */
U32 Reserved7; /* 0x48 */
U32 Reserved8; /* 0x4C */
MPI25_SGE_IO_UNION SGL; /* 0x50 */
} MPI25_TARGET_ASSIST_REQUEST, MPI2_POINTER PTR_MPI25_TARGET_ASSIST_REQUEST,
Mpi25TargetAssistRequest_t, MPI2_POINTER pMpi25TargetAssistRequest_t;
/* use MPI2_TARGET_ASSIST_FLAGS_ defines for the Flags field */
/* Defines for the DMAFlags field
* Each setting affects 4 SGLS, from SGL0 to SGL3.
* D = Data
* C = Cache DIF
* I = Interleaved
* H = Host DIF
*/
#define MPI25_TA_DMAFLAGS_OP_MASK (0x0F)
#define MPI25_TA_DMAFLAGS_OP_D_D_D_D (0x00)
#define MPI25_TA_DMAFLAGS_OP_D_D_D_C (0x01)
#define MPI25_TA_DMAFLAGS_OP_D_D_D_I (0x02)
#define MPI25_TA_DMAFLAGS_OP_D_D_C_C (0x03)
#define MPI25_TA_DMAFLAGS_OP_D_D_C_I (0x04)
#define MPI25_TA_DMAFLAGS_OP_D_D_I_I (0x05)
#define MPI25_TA_DMAFLAGS_OP_D_C_C_C (0x06)
#define MPI25_TA_DMAFLAGS_OP_D_C_C_I (0x07)
#define MPI25_TA_DMAFLAGS_OP_D_C_I_I (0x08)
#define MPI25_TA_DMAFLAGS_OP_D_I_I_I (0x09)
#define MPI25_TA_DMAFLAGS_OP_D_H_D_D (0x0A)
#define MPI25_TA_DMAFLAGS_OP_D_H_D_C (0x0B)
#define MPI25_TA_DMAFLAGS_OP_D_H_D_I (0x0C)
#define MPI25_TA_DMAFLAGS_OP_D_H_C_C (0x0D)
#define MPI25_TA_DMAFLAGS_OP_D_H_C_I (0x0E)
#define MPI25_TA_DMAFLAGS_OP_D_H_I_I (0x0F)
/* defines for the IoFlags field */
#define MPI25_TARGET_ASSIST_IOFLAGS_BIDIRECTIONAL (0x0800)
#define MPI25_TARGET_ASSIST_IOFLAGS_RECEIVE_FIRST (0x0200)
/* defines for the EEDPFlags field */
#define MPI25_TA_EEDPFLAGS_INC_PRI_REFTAG (0x8000)
#define MPI25_TA_EEDPFLAGS_INC_SEC_REFTAG (0x4000)
#define MPI25_TA_EEDPFLAGS_INC_PRI_APPTAG (0x2000)
#define MPI25_TA_EEDPFLAGS_INC_SEC_APPTAG (0x1000)
#define MPI25_TA_EEDPFLAGS_CHECK_REFTAG (0x0400)
#define MPI25_TA_EEDPFLAGS_CHECK_APPTAG (0x0200)
#define MPI25_TA_EEDPFLAGS_CHECK_GUARD (0x0100)
#define MPI25_TA_EEDPFLAGS_ESCAPE_MODE_MASK (0x00C0)
#define MPI25_TA_EEDPFLAGS_COMPATIBLE_MODE (0x0000)
#define MPI25_TA_EEDPFLAGS_DO_NOT_DISABLE_MODE (0x0040)
#define MPI25_TA_EEDPFLAGS_APPTAG_DISABLE_MODE (0x0080)
#define MPI25_TA_EEDPFLAGS_APPTAG_REFTAG_DISABLE_MODE (0x00C0)
#define MPI25_TA_EEDPFLAGS_HOST_GUARD_METHOD_MASK (0x0030)
#define MPI25_TA_EEDPFLAGS_T10_CRC_HOST_GUARD (0x0000)
#define MPI25_TA_EEDPFLAGS_IP_CHKSUM_HOST_GUARD (0x0010)
#define MPI25_TA_EEDPFLAGS_PASSTHRU_REFTAG (0x0008)
#define MPI25_TA_EEDPFLAGS_MASK_OP (0x0007)
#define MPI25_TA_EEDPFLAGS_NOOP_OP (0x0000)
#define MPI25_TA_EEDPFLAGS_CHECK_OP (0x0001)
#define MPI25_TA_EEDPFLAGS_STRIP_OP (0x0002)
#define MPI25_TA_EEDPFLAGS_CHECK_REMOVE_OP (0x0003)
#define MPI25_TA_EEDPFLAGS_INSERT_OP (0x0004)
#define MPI25_TA_EEDPFLAGS_REPLACE_OP (0x0006)
#define MPI25_TA_EEDPFLAGS_CHECK_REGEN_OP (0x0007)
/****************************************************************************
* Target Status Send Request
****************************************************************************/
typedef struct _MPI2_TARGET_STATUS_SEND_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 StatusFlags; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 QueueTag; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 IoIndex; /* 0x0C */
U16 InitiatorConnectionTag; /* 0x0E */
U16 SGLFlags; /* 0x10 */ /* MPI v2.0 only. Reserved on MPI v2.5. */
U16 Reserved4; /* 0x12 */
U8 SGLOffset0; /* 0x14 */
U8 Reserved5; /* 0x15 */
U16 Reserved6; /* 0x16 */
U32 Reserved7; /* 0x18 */
U32 Reserved8; /* 0x1C */
MPI2_SIMPLE_SGE_UNION StatusDataSGE; /* 0x20 */ /* MPI v2.5: This must be an IEEE Simple Element 64. */
} MPI2_TARGET_STATUS_SEND_REQUEST,
MPI2_POINTER PTR_MPI2_TARGET_STATUS_SEND_REQUEST,
Mpi2TargetStatusSendRequest_t, MPI2_POINTER pMpi2TargetStatusSendRequest_t;
/* Target Status Send StatusFlags bits */
#define MPI2_TSS_FLAGS_REPOST_CMD_BUFFER (0x80)
#define MPI2_TSS_FLAGS_RETRANSMIT (0x04)
#define MPI2_TSS_FLAGS_AUTO_GOOD_STATUS (0x01)
/* Target Status Send SGLFlags bits - MPI v2.0 only */
/* Data Location Address Space */
#define MPI2_TSS_SGLFLAGS_ADDR_MASK (0x0C)
#define MPI2_TSS_SGLFLAGS_SYSTEM_ADDR (0x00)
#define MPI2_TSS_SGLFLAGS_IOCDDR_ADDR (0x04)
#define MPI2_TSS_SGLFLAGS_IOCPLB_ADDR (0x08)
#define MPI2_TSS_SGLFLAGS_IOCPLBNTA_ADDR (0x0C)
/* Type */
#define MPI2_TSS_SGLFLAGS_TYPE_MASK (0x03)
#define MPI2_TSS_SGLFLAGS_MPI_TYPE (0x00)
#define MPI2_TSS_SGLFLAGS_IEEE32_TYPE (0x01)
#define MPI2_TSS_SGLFLAGS_IEEE64_TYPE (0x02)
/*
* NOTE: The SSP status IU is big-endian. When used on a little-endian system,
* this structure properly orders the bytes.
*/
typedef struct _MPI2_TARGET_SSP_RSP_IU
{
U32 Reserved0[6]; /* reserved for SSP header */ /* 0x00 */
/* start of RESPONSE information unit */
U32 Reserved1; /* 0x18 */
U32 Reserved2; /* 0x1C */
U16 Reserved3; /* 0x20 */
U8 DataPres; /* lower 2 bits */ /* 0x22 */
U8 Status; /* 0x23 */
U32 Reserved4; /* 0x24 */
U32 SenseDataLength; /* 0x28 */
U32 ResponseDataLength; /* 0x2C */
/* start of Response or Sense Data (size may vary dynamically) */
U8 ResponseSenseData[4]; /* 0x30 */
} MPI2_TARGET_SSP_RSP_IU, MPI2_POINTER PTR_MPI2_TARGET_SSP_RSP_IU,
Mpi2TargetSspRspIu_t, MPI2_POINTER pMpi2TargetSspRspIu_t;
/****************************************************************************
* Target Standard Reply - used with Target Assist or Target Status Send
****************************************************************************/
typedef struct _MPI2_TARGET_STANDARD_REPLY
{
U16 Reserved; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U16 IoIndex; /* 0x14 */
U16 Reserved5; /* 0x16 */
U32 TransferCount; /* 0x18 */
U32 BidirectionalTransferCount; /* 0x1C */
} MPI2_TARGET_STANDARD_REPLY, MPI2_POINTER PTR_MPI2_TARGET_STANDARD_REPLY,
Mpi2TargetErrorReply_t, MPI2_POINTER pMpi2TargetErrorReply_t;
/****************************************************************************
* Target Mode Abort Request
****************************************************************************/
typedef struct _MPI2_TARGET_MODE_ABORT_REQUEST
{
U8 AbortType; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 IoIndexToAbort; /* 0x0C */
U16 InitiatorDevHandle; /* 0x0E */
U32 MidToAbort; /* 0x10 */
} MPI2_TARGET_MODE_ABORT, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT,
Mpi2TargetModeAbort_t, MPI2_POINTER pMpi2TargetModeAbort_t;
/* Target Mode Abort AbortType values */
#define MPI2_TARGET_MODE_ABORT_ALL_CMD_BUFFERS (0x00)
#define MPI2_TARGET_MODE_ABORT_ALL_IO (0x01)
#define MPI2_TARGET_MODE_ABORT_EXACT_IO (0x02)
#define MPI2_TARGET_MODE_ABORT_EXACT_IO_REQUEST (0x03)
#define MPI2_TARGET_MODE_ABORT_IO_REQUEST_AND_IO (0x04)
#define MPI2_TARGET_MODE_ABORT_DEVHANDLE (0x05)
#define MPI2_TARGET_MODE_ABORT_ALL_COMMANDS (0x06)
/****************************************************************************
* Target Mode Abort Reply
****************************************************************************/
typedef struct _MPI2_TARGET_MODE_ABORT_REPLY
{
U16 Reserved; /* 0x00 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved1; /* 0x04 */
U8 Reserved2; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved3; /* 0x0A */
U16 Reserved4; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 AbortCount; /* 0x14 */
} MPI2_TARGET_MODE_ABORT_REPLY, MPI2_POINTER PTR_MPI2_TARGET_MODE_ABORT_REPLY,
Mpi2TargetModeAbortReply_t, MPI2_POINTER pMpi2TargetModeAbortReply_t;
#endif

546
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@ -0,0 +1,546 @@
/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
/*
* Copyright (c) 2000-2013 LSI Corporation.
*
*
* Name: mpi2_tool.h
* Title: MPI diagnostic tool structures and definitions
* Creation Date: March 26, 2007
*
* mpi2_tool.h Version: 02.00.11
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* 12-18-07 02.00.01 Added Diagnostic Buffer Post and Diagnostic Release
* structures and defines.
* 02-29-08 02.00.02 Modified various names to make them 32-character unique.
* 05-06-09 02.00.03 Added ISTWI Read Write Tool and Diagnostic CLI Tool.
* 07-30-09 02.00.04 Added ExtendedType field to DiagnosticBufferPost request
* and reply messages.
* Added MPI2_DIAG_BUF_TYPE_EXTENDED.
* Incremented MPI2_DIAG_BUF_TYPE_COUNT.
* 05-12-10 02.00.05 Added Diagnostic Data Upload tool.
* 08-11-10 02.00.06 Added defines that were missing for Diagnostic Buffer
* Post Request.
* 05-25-11 02.00.07 Added Flags field and related defines to
* MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST.
* 11-18-11 02.00.08 Incorporating additions for MPI v2.5.
* 07-10-12 02.00.09 Add MPI v2.5 Toolbox Diagnostic CLI Tool Request
* message.
* 07-26-12 02.00.10 Modified MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST so that
* it uses MPI Chain SGE as well as MPI Simple SGE.
* 08-19-13 02.00.11 Added MPI2_TOOLBOX_TEXT_DISPLAY_TOOL and related info.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TOOL_H
#define MPI2_TOOL_H
/*****************************************************************************
*
* Toolbox Messages
*
*****************************************************************************/
/* defines for the Tools */
#define MPI2_TOOLBOX_CLEAN_TOOL (0x00)
#define MPI2_TOOLBOX_MEMORY_MOVE_TOOL (0x01)
#define MPI2_TOOLBOX_DIAG_DATA_UPLOAD_TOOL (0x02)
#define MPI2_TOOLBOX_ISTWI_READ_WRITE_TOOL (0x03)
#define MPI2_TOOLBOX_BEACON_TOOL (0x05)
#define MPI2_TOOLBOX_DIAGNOSTIC_CLI_TOOL (0x06)
#define MPI2_TOOLBOX_TEXT_DISPLAY_TOOL (0x07)
/****************************************************************************
* Toolbox reply
****************************************************************************/
typedef struct _MPI2_TOOLBOX_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_TOOLBOX_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_REPLY,
Mpi2ToolboxReply_t, MPI2_POINTER pMpi2ToolboxReply_t;
/****************************************************************************
* Toolbox Clean Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_CLEAN_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Flags; /* 0x0C */
} MPI2_TOOLBOX_CLEAN_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_CLEAN_REQUEST,
Mpi2ToolboxCleanRequest_t, MPI2_POINTER pMpi2ToolboxCleanRequest_t;
/* values for the Flags field */
#define MPI2_TOOLBOX_CLEAN_BOOT_SERVICES (0x80000000)
#define MPI2_TOOLBOX_CLEAN_PERSIST_MANUFACT_PAGES (0x40000000)
#define MPI2_TOOLBOX_CLEAN_OTHER_PERSIST_PAGES (0x20000000)
#define MPI2_TOOLBOX_CLEAN_FW_CURRENT (0x10000000)
#define MPI2_TOOLBOX_CLEAN_FW_BACKUP (0x08000000)
#define MPI2_TOOLBOX_CLEAN_MEGARAID (0x02000000)
#define MPI2_TOOLBOX_CLEAN_INITIALIZATION (0x01000000)
#define MPI2_TOOLBOX_CLEAN_FLASH (0x00000004)
#define MPI2_TOOLBOX_CLEAN_SEEPROM (0x00000002)
#define MPI2_TOOLBOX_CLEAN_NVSRAM (0x00000001)
/****************************************************************************
* Toolbox Memory Move request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_MEM_MOVE_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x0C */
} MPI2_TOOLBOX_MEM_MOVE_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_MEM_MOVE_REQUEST,
Mpi2ToolboxMemMoveRequest_t, MPI2_POINTER pMpi2ToolboxMemMoveRequest_t;
/****************************************************************************
* Toolbox Diagnostic Data Upload request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 SGLFlags; /* 0x0C */
U8 Reserved5; /* 0x0D */
U16 Reserved6; /* 0x0E */
U32 Flags; /* 0x10 */
U32 DataLength; /* 0x14 */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x18 */
} MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAG_DATA_UPLOAD_REQUEST,
Mpi2ToolboxDiagDataUploadRequest_t,
MPI2_POINTER pMpi2ToolboxDiagDataUploadRequest_t;
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
typedef struct _MPI2_DIAG_DATA_UPLOAD_HEADER
{
U32 DiagDataLength; /* 00h */
U8 FormatCode; /* 04h */
U8 Reserved1; /* 05h */
U16 Reserved2; /* 06h */
} MPI2_DIAG_DATA_UPLOAD_HEADER, MPI2_POINTER PTR_MPI2_DIAG_DATA_UPLOAD_HEADER,
Mpi2DiagDataUploadHeader_t, MPI2_POINTER pMpi2DiagDataUploadHeader_t;
/****************************************************************************
* Toolbox ISTWI Read Write Tool
****************************************************************************/
/* Toolbox ISTWI Read Write Tool request message */
typedef struct _MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Reserved5; /* 0x0C */
U32 Reserved6; /* 0x10 */
U8 DevIndex; /* 0x14 */
U8 Action; /* 0x15 */
U8 SGLFlags; /* 0x16 */
U8 Flags; /* 0x17 */
U16 TxDataLength; /* 0x18 */
U16 RxDataLength; /* 0x1A */
U32 Reserved8; /* 0x1C */
U32 Reserved9; /* 0x20 */
U32 Reserved10; /* 0x24 */
U32 Reserved11; /* 0x28 */
U32 Reserved12; /* 0x2C */
MPI2_SGE_SIMPLE_UNION SGL; /* 0x30 */
} MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_READ_WRITE_REQUEST,
Mpi2ToolboxIstwiReadWriteRequest_t,
MPI2_POINTER pMpi2ToolboxIstwiReadWriteRequest_t;
/* values for the Action field */
#define MPI2_TOOL_ISTWI_ACTION_READ_DATA (0x01)
#define MPI2_TOOL_ISTWI_ACTION_WRITE_DATA (0x02)
#define MPI2_TOOL_ISTWI_ACTION_SEQUENCE (0x03)
#define MPI2_TOOL_ISTWI_ACTION_RESERVE_BUS (0x10)
#define MPI2_TOOL_ISTWI_ACTION_RELEASE_BUS (0x11)
#define MPI2_TOOL_ISTWI_ACTION_RESET (0x12)
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* values for the Flags field */
#define MPI2_TOOL_ISTWI_FLAG_AUTO_RESERVE_RELEASE (0x80)
#define MPI2_TOOL_ISTWI_FLAG_PAGE_ADDR_MASK (0x07)
/* Toolbox ISTWI Read Write Tool reply message */
typedef struct _MPI2_TOOLBOX_ISTWI_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U8 DevIndex; /* 0x14 */
U8 Action; /* 0x15 */
U8 IstwiStatus; /* 0x16 */
U8 Reserved6; /* 0x17 */
U16 TxDataCount; /* 0x18 */
U16 RxDataCount; /* 0x1A */
} MPI2_TOOLBOX_ISTWI_REPLY, MPI2_POINTER PTR_MPI2_TOOLBOX_ISTWI_REPLY,
Mpi2ToolboxIstwiReply_t, MPI2_POINTER pMpi2ToolboxIstwiReply_t;
/****************************************************************************
* Toolbox Beacon Tool request
****************************************************************************/
typedef struct _MPI2_TOOLBOX_BEACON_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 Reserved5; /* 0x0C */
U8 PhysicalPort; /* 0x0D */
U8 Reserved6; /* 0x0E */
U8 Flags; /* 0x0F */
} MPI2_TOOLBOX_BEACON_REQUEST, MPI2_POINTER PTR_MPI2_TOOLBOX_BEACON_REQUEST,
Mpi2ToolboxBeaconRequest_t, MPI2_POINTER pMpi2ToolboxBeaconRequest_t;
/* values for the Flags field */
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_OFF (0x00)
#define MPI2_TOOLBOX_FLAGS_BEACONMODE_ON (0x01)
/****************************************************************************
* Toolbox Diagnostic CLI Tool
****************************************************************************/
#define MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH (0x5C)
/* MPI v2.0 Toolbox Diagnostic CLI Tool request message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 SGLFlags; /* 0x0C */
U8 Reserved5; /* 0x0D */
U16 Reserved6; /* 0x0E */
U32 DataLength; /* 0x10 */
U8 DiagnosticCliCommand[MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH]; /* 0x14 */
MPI2_MPI_SGE_IO_UNION SGL; /* 0x70 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
Mpi2ToolboxDiagnosticCliRequest_t,
MPI2_POINTER pMpi2ToolboxDiagnosticCliRequest_t;
/* use MPI2_SGLFLAGS_ defines from mpi2.h for the SGLFlags field */
/* MPI v2.5 Toolbox Diagnostic CLI Tool request message */
typedef struct _MPI25_TOOLBOX_DIAGNOSTIC_CLI_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U32 Reserved5; /* 0x0C */
U32 DataLength; /* 0x10 */
U8 DiagnosticCliCommand[MPI2_TOOLBOX_DIAG_CLI_CMD_LENGTH]; /* 0x14 */
MPI25_SGE_IO_UNION SGL; /* 0x70 */
} MPI25_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
MPI2_POINTER PTR_MPI25_TOOLBOX_DIAGNOSTIC_CLI_REQUEST,
Mpi25ToolboxDiagnosticCliRequest_t,
MPI2_POINTER pMpi25ToolboxDiagnosticCliRequest_t;
/* Toolbox Diagnostic CLI Tool reply message */
typedef struct _MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 ReturnedDataLength; /* 0x14 */
} MPI2_TOOLBOX_DIAGNOSTIC_CLI_REPLY,
MPI2_POINTER PTR_MPI2_TOOLBOX_DIAG_CLI_REPLY,
Mpi2ToolboxDiagnosticCliReply_t,
MPI2_POINTER pMpi2ToolboxDiagnosticCliReply_t;
/****************************************************************************
* Toolbox Console Text Display Tool
****************************************************************************/
/* Toolbox Console Text Display Tool request message */
typedef struct _MPI2_TOOLBOX_TEXT_DISPLAY_REQUEST
{
U8 Tool; /* 0x00 */
U8 Reserved1; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U8 Console; /* 0x0C */
U8 Flags; /* 0x0D */
U16 Reserved6; /* 0x0E */
U8 TextToDisplay[4]; /* 0x10 */ /* actual length determined at runtime based on frame size */
} MPI2_TOOLBOX_TEXT_DISPLAY_REQUEST,
MPI2_POINTER PTR_MPI2_TOOLBOX_TEXT_DISPLAY_REQUEST,
Mpi2ToolboxTextDisplayRequest_t,
MPI2_POINTER pMpi2ToolboxTextDisplayRequest_t;
/* defines for the Console field */
#define MPI2_TOOLBOX_CONSOLE_TYPE_MASK (0xF0)
#define MPI2_TOOLBOX_CONSOLE_TYPE_DEFAULT (0x00)
#define MPI2_TOOLBOX_CONSOLE_TYPE_UART (0x10)
#define MPI2_TOOLBOX_CONSOLE_TYPE_ETHERNET (0x20)
#define MPI2_TOOLBOX_CONSOLE_NUMBER_MASK (0x0F)
/* defines for the Flags field */
#define MPI2_TOOLBOX_CONSOLE_FLAG_TIMESTAMP (0x01)
/*****************************************************************************
*
* Diagnostic Buffer Messages
*
*****************************************************************************/
/****************************************************************************
* Diagnostic Buffer Post request
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REQUEST
{
U8 ExtendedType; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U64 BufferAddress; /* 0x0C */
U32 BufferLength; /* 0x14 */
U32 Reserved5; /* 0x18 */
U32 Reserved6; /* 0x1C */
U32 Flags; /* 0x20 */
U32 ProductSpecific[23]; /* 0x24 */
} MPI2_DIAG_BUFFER_POST_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REQUEST,
Mpi2DiagBufferPostRequest_t, MPI2_POINTER pMpi2DiagBufferPostRequest_t;
/* values for the ExtendedType field */
#define MPI2_DIAG_EXTENDED_TYPE_UTILIZATION (0x02)
/* values for the BufferType field */
#define MPI2_DIAG_BUF_TYPE_TRACE (0x00)
#define MPI2_DIAG_BUF_TYPE_SNAPSHOT (0x01)
#define MPI2_DIAG_BUF_TYPE_EXTENDED (0x02)
/* count of the number of buffer types */
#define MPI2_DIAG_BUF_TYPE_COUNT (0x03)
/* values for the Flags field */
#define MPI2_DIAG_BUF_FLAG_RELEASE_ON_FULL (0x00000002) /* for MPI v2.0 products only */
#define MPI2_DIAG_BUF_FLAG_IMMEDIATE_RELEASE (0x00000001)
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_BUFFER_POST_REPLY
{
U8 ExtendedType; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
U32 TransferLength; /* 0x14 */
} MPI2_DIAG_BUFFER_POST_REPLY, MPI2_POINTER PTR_MPI2_DIAG_BUFFER_POST_REPLY,
Mpi2DiagBufferPostReply_t, MPI2_POINTER pMpi2DiagBufferPostReply_t;
/****************************************************************************
* Diagnostic Release request
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REQUEST
{
U8 Reserved1; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 ChainOffset; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
} MPI2_DIAG_RELEASE_REQUEST, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REQUEST,
Mpi2DiagReleaseRequest_t, MPI2_POINTER pMpi2DiagReleaseRequest_t;
/****************************************************************************
* Diagnostic Buffer Post reply
****************************************************************************/
typedef struct _MPI2_DIAG_RELEASE_REPLY
{
U8 Reserved1; /* 0x00 */
U8 BufferType; /* 0x01 */
U8 MsgLength; /* 0x02 */
U8 Function; /* 0x03 */
U16 Reserved2; /* 0x04 */
U8 Reserved3; /* 0x06 */
U8 MsgFlags; /* 0x07 */
U8 VP_ID; /* 0x08 */
U8 VF_ID; /* 0x09 */
U16 Reserved4; /* 0x0A */
U16 Reserved5; /* 0x0C */
U16 IOCStatus; /* 0x0E */
U32 IOCLogInfo; /* 0x10 */
} MPI2_DIAG_RELEASE_REPLY, MPI2_POINTER PTR_MPI2_DIAG_RELEASE_REPLY,
Mpi2DiagReleaseReply_t, MPI2_POINTER pMpi2DiagReleaseReply_t;
#endif

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/*-
* Copyright (c) 2013 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
/*
* Copyright (c) 2000-2007 LSI Corporation.
*
*
* Name: mpi2_type.h
* Title: MPI basic type definitions
* Creation Date: August 16, 2006
*
* mpi2_type.h Version: 02.00.00
*
* Version History
* ---------------
*
* Date Version Description
* -------- -------- ------------------------------------------------------
* 04-30-07 02.00.00 Corresponds to Fusion-MPT MPI Specification Rev A.
* --------------------------------------------------------------------------
*/
#ifndef MPI2_TYPE_H
#define MPI2_TYPE_H
/*******************************************************************************
* Define MPI2_POINTER if it hasn't already been defined. By default
* MPI2_POINTER is defined to be a near pointer. MPI2_POINTER can be defined as
* a far pointer by defining MPI2_POINTER as "far *" before this header file is
* included.
*/
#ifndef MPI2_POINTER
#define MPI2_POINTER *
#endif
/* the basic types may have already been included by mpi_type.h */
#ifndef MPI_TYPE_H
/*****************************************************************************
*
* Basic Types
*
*****************************************************************************/
typedef signed char S8;
typedef unsigned char U8;
typedef signed short S16;
typedef unsigned short U16;
#ifdef __FreeBSD__
typedef int32_t S32;
typedef uint32_t U32;
#else
#if defined(unix) || defined(__arm) || defined(ALPHA) || defined(__PPC__) || defined(__ppc)
typedef signed int S32;
typedef unsigned int U32;
#else
typedef signed long S32;
typedef unsigned long U32;
#endif
#endif
typedef struct _S64
{
U32 Low;
S32 High;
} S64;
typedef struct _U64
{
U32 Low;
U32 High;
} U64;
/*****************************************************************************
*
* Pointer Types
*
*****************************************************************************/
typedef S8 *PS8;
typedef U8 *PU8;
typedef S16 *PS16;
typedef U16 *PU16;
typedef S32 *PS32;
typedef U32 *PU32;
typedef S64 *PS64;
typedef U64 *PU64;
#endif
#endif

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/*-
* Copyright (c) 2008 Yahoo!, Inc.
* All rights reserved.
* Written by: John Baldwin <jhb@FreeBSD.org>
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of the author nor the names of any co-contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD userland interface
*
* $FreeBSD$
*/
/*-
* Copyright (c) 2011-2014 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
#ifndef _MPR_IOCTL_H_
#define _MPR_IOCTL_H_
#include <dev/mpr/mpi/mpi2_type.h>
#include <dev/mpr/mpi/mpi2.h>
#include <dev/mpr/mpi/mpi2_cnfg.h>
#include <dev/mpr/mpi/mpi2_sas.h>
/*
* For the read header requests, the header should include the page
* type or extended page type, page number, and page version. The
* buffer and length are unused. The completed header is returned in
* the 'header' member.
*
* For the read page and write page requests, 'buf' should point to a
* buffer of 'len' bytes which holds the entire page (including the
* header).
*
* All requests specify the page address in 'page_address'.
*/
struct mpr_cfg_page_req {
MPI2_CONFIG_PAGE_HEADER header;
uint32_t page_address;
void *buf;
int len;
uint16_t ioc_status;
};
struct mpr_ext_cfg_page_req {
MPI2_CONFIG_EXTENDED_PAGE_HEADER header;
uint32_t page_address;
void *buf;
int len;
uint16_t ioc_status;
};
struct mpr_raid_action {
uint8_t action;
uint8_t volume_bus;
uint8_t volume_id;
uint8_t phys_disk_num;
uint32_t action_data_word;
void *buf;
int len;
uint32_t volume_status;
uint32_t action_data[4];
uint16_t action_status;
uint16_t ioc_status;
uint8_t write;
};
struct mpr_usr_command {
void *req;
uint32_t req_len;
void *rpl;
uint32_t rpl_len;
void *buf;
int len;
uint32_t flags;
};
typedef struct mpr_pci_bits
{
union {
struct {
uint32_t DeviceNumber :5;
uint32_t FunctionNumber :3;
uint32_t BusNumber :24;
} bits;
uint32_t AsDWORD;
} u;
uint32_t PciSegmentId;
} mpr_pci_bits_t;
/*
* The following is the MPRIOCTL_GET_ADAPTER_DATA data structure. This data
* structure is setup so that we hopefully are properly aligned for both
* 32-bit and 64-bit mode applications.
*
* Adapter Type - Value = 6 = SCSI Protocol through SAS-3 adapter
*
* MPI Port Number - The PCI Function number for this device
*
* PCI Device HW Id - The PCI device number for this device
*
*/
#define MPRIOCTL_ADAPTER_TYPE_SAS3 6
typedef struct mpr_adapter_data
{
uint32_t StructureLength;
uint32_t AdapterType;
uint32_t MpiPortNumber;
uint32_t PCIDeviceHwId;
uint32_t PCIDeviceHwRev;
uint32_t SubSystemId;
uint32_t SubsystemVendorId;
uint32_t Reserved1;
uint32_t MpiFirmwareVersion;
uint32_t BiosVersion;
uint8_t DriverVersion[32];
uint8_t Reserved2;
uint8_t ScsiId;
uint16_t Reserved3;
mpr_pci_bits_t PciInformation;
} mpr_adapter_data_t;
typedef struct mpr_update_flash
{
uint64_t PtrBuffer;
uint32_t ImageChecksum;
uint32_t ImageOffset;
uint32_t ImageSize;
uint32_t ImageType;
} mpr_update_flash_t;
#define MPR_PASS_THRU_DIRECTION_NONE 0
#define MPR_PASS_THRU_DIRECTION_READ 1
#define MPR_PASS_THRU_DIRECTION_WRITE 2
#define MPR_PASS_THRU_DIRECTION_BOTH 3
typedef struct mpr_pass_thru
{
uint64_t PtrRequest;
uint64_t PtrReply;
uint64_t PtrData;
uint32_t RequestSize;
uint32_t ReplySize;
uint32_t DataSize;
uint32_t DataDirection;
uint64_t PtrDataOut;
uint32_t DataOutSize;
uint32_t Timeout;
} mpr_pass_thru_t;
/*
* Event queue defines
*/
#define MPR_EVENT_QUEUE_SIZE (50) /* Max Events stored in driver */
#define MPR_MAX_EVENT_DATA_LENGTH (48) /* Size of each event in Dwords */
typedef struct mpr_event_query
{
uint16_t Entries;
uint16_t Reserved;
uint32_t Types[4];
} mpr_event_query_t;
typedef struct mpr_event_enable
{
uint32_t Types[4];
} mpr_event_enable_t;
/*
* Event record entry for ioctl.
*/
typedef struct mpr_event_entry
{
uint32_t Type;
uint32_t Number;
uint32_t Data[MPR_MAX_EVENT_DATA_LENGTH];
} mpr_event_entry_t;
typedef struct mpr_event_report
{
uint32_t Size;
uint64_t PtrEvents;
} mpr_event_report_t;
typedef struct mpr_pci_info
{
uint32_t BusNumber;
uint8_t DeviceNumber;
uint8_t FunctionNumber;
uint16_t InterruptVector;
uint8_t PciHeader[256];
} mpr_pci_info_t;
typedef struct mpr_diag_action
{
uint32_t Action;
uint32_t Length;
uint64_t PtrDiagAction;
uint32_t ReturnCode;
} mpr_diag_action_t;
#define MPR_FW_DIAGNOSTIC_UID_NOT_FOUND (0xFF)
#define MPR_FW_DIAG_NEW (0x806E6577)
#define MPR_FW_DIAG_TYPE_REGISTER (0x00000001)
#define MPR_FW_DIAG_TYPE_UNREGISTER (0x00000002)
#define MPR_FW_DIAG_TYPE_QUERY (0x00000003)
#define MPR_FW_DIAG_TYPE_READ_BUFFER (0x00000004)
#define MPR_FW_DIAG_TYPE_RELEASE (0x00000005)
#define MPR_FW_DIAG_INVALID_UID (0x00000000)
#define MPR_DIAG_SUCCESS 0
#define MPR_DIAG_FAILURE 1
#define MPR_FW_DIAG_ERROR_SUCCESS (0x00000000)
#define MPR_FW_DIAG_ERROR_FAILURE (0x00000001)
#define MPR_FW_DIAG_ERROR_INVALID_PARAMETER (0x00000002)
#define MPR_FW_DIAG_ERROR_POST_FAILED (0x00000010)
#define MPR_FW_DIAG_ERROR_INVALID_UID (0x00000011)
#define MPR_FW_DIAG_ERROR_RELEASE_FAILED (0x00000012)
#define MPR_FW_DIAG_ERROR_NO_BUFFER (0x00000013)
#define MPR_FW_DIAG_ERROR_ALREADY_RELEASED (0x00000014)
typedef struct mpr_fw_diag_register
{
uint8_t ExtendedType;
uint8_t BufferType;
uint16_t ApplicationFlags;
uint32_t DiagnosticFlags;
uint32_t ProductSpecific[23];
uint32_t RequestedBufferSize;
uint32_t UniqueId;
} mpr_fw_diag_register_t;
typedef struct mpr_fw_diag_unregister
{
uint32_t UniqueId;
} mpr_fw_diag_unregister_t;
#define MPR_FW_DIAG_FLAG_APP_OWNED (0x0001)
#define MPR_FW_DIAG_FLAG_BUFFER_VALID (0x0002)
#define MPR_FW_DIAG_FLAG_FW_BUFFER_ACCESS (0x0004)
typedef struct mpr_fw_diag_query
{
uint8_t ExtendedType;
uint8_t BufferType;
uint16_t ApplicationFlags;
uint32_t DiagnosticFlags;
uint32_t ProductSpecific[23];
uint32_t TotalBufferSize;
uint32_t DriverAddedBufferSize;
uint32_t UniqueId;
} mpr_fw_diag_query_t;
typedef struct mpr_fw_diag_release
{
uint32_t UniqueId;
} mpr_fw_diag_release_t;
#define MPR_FW_DIAG_FLAG_REREGISTER (0x0001)
#define MPR_FW_DIAG_FLAG_FORCE_RELEASE (0x0002)
typedef struct mpr_diag_read_buffer
{
uint8_t Status;
uint8_t Reserved;
uint16_t Flags;
uint32_t StartingOffset;
uint32_t BytesToRead;
uint32_t UniqueId;
uint64_t PtrDataBuffer;
} mpr_diag_read_buffer_t;
/*
* Register Access
*/
#define REG_IO_READ 1
#define REG_IO_WRITE 2
#define REG_MEM_READ 3
#define REG_MEM_WRITE 4
typedef struct mpr_reg_access
{
uint32_t Command;
uint32_t RegOffset;
uint32_t RegData;
} mpr_reg_access_t;
typedef struct mpr_btdh_mapping
{
uint16_t TargetID;
uint16_t Bus;
uint16_t DevHandle;
uint16_t Reserved;
} mpr_btdh_mapping_t;
#define MPRIO_MPR_COMMAND_FLAG_VERBOSE 0x01
#define MPRIO_MPR_COMMAND_FLAG_DEBUG 0x02
#define MPRIO_READ_CFG_HEADER _IOWR('M', 200, struct mpr_cfg_page_req)
#define MPRIO_READ_CFG_PAGE _IOWR('M', 201, struct mpr_cfg_page_req)
#define MPRIO_READ_EXT_CFG_HEADER _IOWR('M', 202, struct mpr_ext_cfg_page_req)
#define MPRIO_READ_EXT_CFG_PAGE _IOWR('M', 203, struct mpr_ext_cfg_page_req)
#define MPRIO_WRITE_CFG_PAGE _IOWR('M', 204, struct mpr_cfg_page_req)
#define MPRIO_RAID_ACTION _IOWR('M', 205, struct mpr_raid_action)
#define MPRIO_MPR_COMMAND _IOWR('M', 210, struct mpr_usr_command)
#define MPTIOCTL ('I')
#define MPTIOCTL_GET_ADAPTER_DATA _IOWR(MPTIOCTL, 1,\
struct mpr_adapter_data)
#define MPTIOCTL_UPDATE_FLASH _IOWR(MPTIOCTL, 2,\
struct mpr_update_flash)
#define MPTIOCTL_RESET_ADAPTER _IO(MPTIOCTL, 3)
#define MPTIOCTL_PASS_THRU _IOWR(MPTIOCTL, 4,\
struct mpr_pass_thru)
#define MPTIOCTL_EVENT_QUERY _IOWR(MPTIOCTL, 5,\
struct mpr_event_query)
#define MPTIOCTL_EVENT_ENABLE _IOWR(MPTIOCTL, 6,\
struct mpr_event_enable)
#define MPTIOCTL_EVENT_REPORT _IOWR(MPTIOCTL, 7,\
struct mpr_event_report)
#define MPTIOCTL_GET_PCI_INFO _IOWR(MPTIOCTL, 8,\
struct mpr_pci_info)
#define MPTIOCTL_DIAG_ACTION _IOWR(MPTIOCTL, 9,\
struct mpr_diag_action)
#define MPTIOCTL_REG_ACCESS _IOWR(MPTIOCTL, 10,\
struct mpr_reg_access)
#define MPTIOCTL_BTDH_MAPPING _IOWR(MPTIOCTL, 11,\
struct mpr_btdh_mapping)
#endif /* !_MPR_IOCTL_H_ */

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/*-
* Copyright (c) 2011-2014 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
#ifndef _MPR_MAPPING_H
#define _MPR_MAPPING_H
/**
* struct _map_phy_change - PHY entries recieved in Topology change list
* @physical_id: SAS address of the device attached with the associate PHY
* @device_info: bitfield provides detailed info about the device
* @dev_handle: device handle for the device pointed by this entry
* @slot: slot ID
* @is_processed: Flag to indicate whether this entry is processed or not
*/
struct _map_phy_change {
uint64_t physical_id;
uint32_t device_info;
uint16_t dev_handle;
uint16_t slot;
uint8_t reason;
uint8_t is_processed;
};
/**
* struct _map_topology_change - entries to be removed from mapping table
* @dpm_entry_num: index of this device in device persistent map table
* @dev_handle: device handle for the device pointed by this entry
*/
struct _map_topology_change {
uint16_t enc_handle;
uint16_t exp_handle;
uint8_t num_entries;
uint8_t start_phy_num;
uint8_t num_phys;
uint8_t exp_status;
struct _map_phy_change *phy_details;
};
extern int
mprsas_get_sas_address_for_sata_disk(struct mpr_softc *ioc,
u64 *sas_address, u16 handle, u32 device_info);
#endif

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/*-
* Copyright (c) 2009 Yahoo! Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/* PCI/PCI-X/PCIe bus interface for the LSI MPT2 controllers */
/* TODO Move headers to mprvar */
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/malloc.h>
#include <sys/sysctl.h>
#include <sys/uio.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <dev/pci/pcireg.h>
#include <dev/pci/pcivar.h>
#include <dev/pci/pci_private.h>
#include <dev/mpr/mpi/mpi2_type.h>
#include <dev/mpr/mpi/mpi2.h>
#include <dev/mpr/mpi/mpi2_ioc.h>
#include <dev/mpr/mpi/mpi2_cnfg.h>
#include <dev/mpr/mpi/mpi2_tool.h>
#include <sys/queue.h>
#include <sys/kthread.h>
#include <dev/mpr/mpr_ioctl.h>
#include <dev/mpr/mprvar.h>
static int mpr_pci_probe(device_t);
static int mpr_pci_attach(device_t);
static int mpr_pci_detach(device_t);
static int mpr_pci_suspend(device_t);
static int mpr_pci_resume(device_t);
static void mpr_pci_free(struct mpr_softc *);
static int mpr_alloc_msix(struct mpr_softc *sc, int msgs);
static int mpr_alloc_msi(struct mpr_softc *sc, int msgs);
static device_method_t mpr_methods[] = {
DEVMETHOD(device_probe, mpr_pci_probe),
DEVMETHOD(device_attach, mpr_pci_attach),
DEVMETHOD(device_detach, mpr_pci_detach),
DEVMETHOD(device_suspend, mpr_pci_suspend),
DEVMETHOD(device_resume, mpr_pci_resume),
DEVMETHOD(bus_print_child, bus_generic_print_child),
DEVMETHOD(bus_driver_added, bus_generic_driver_added),
{ 0, 0 }
};
static driver_t mpr_pci_driver = {
"mpr",
mpr_methods,
sizeof(struct mpr_softc)
};
static devclass_t mpr_devclass;
DRIVER_MODULE(mpr, pci, mpr_pci_driver, mpr_devclass, 0, 0);
MODULE_DEPEND(mpr, cam, 1, 1, 1);
struct mpr_ident {
uint16_t vendor;
uint16_t device;
uint16_t subvendor;
uint16_t subdevice;
u_int flags;
const char *desc;
} mpr_identifiers[] = {
{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3004,
0xffff, 0xffff, 0, "LSI SAS3004" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3008,
0xffff, 0xffff, 0, "LSI SAS3008" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_1,
0xffff, 0xffff, 0, "LSI SAS3108_1" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_2,
0xffff, 0xffff, 0, "LSI SAS3108_2" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_5,
0xffff, 0xffff, 0, "LSI SAS3108_5" },
{ MPI2_MFGPAGE_VENDORID_LSI, MPI25_MFGPAGE_DEVID_SAS3108_6,
0xffff, 0xffff, 0, "LSI SAS3108_6" },
{ 0, 0, 0, 0, 0, NULL }
};
static struct mpr_ident *
mpr_find_ident(device_t dev)
{
struct mpr_ident *m;
for (m = mpr_identifiers; m->vendor != 0; m++) {
if (m->vendor != pci_get_vendor(dev))
continue;
if (m->device != pci_get_device(dev))
continue;
if ((m->subvendor != 0xffff) &&
(m->subvendor != pci_get_subvendor(dev)))
continue;
if ((m->subdevice != 0xffff) &&
(m->subdevice != pci_get_subdevice(dev)))
continue;
return (m);
}
return (NULL);
}
static int
mpr_pci_probe(device_t dev)
{
struct mpr_ident *id;
if ((id = mpr_find_ident(dev)) != NULL) {
device_set_desc(dev, id->desc);
return (BUS_PROBE_DEFAULT);
}
return (ENXIO);
}
static int
mpr_pci_attach(device_t dev)
{
struct mpr_softc *sc;
struct mpr_ident *m;
int error;
sc = device_get_softc(dev);
bzero(sc, sizeof(*sc));
sc->mpr_dev = dev;
m = mpr_find_ident(dev);
sc->mpr_flags = m->flags;
/* Twiddle basic PCI config bits for a sanity check */
pci_enable_busmaster(dev);
/* Allocate the System Interface Register Set */
sc->mpr_regs_rid = PCIR_BAR(1);
if ((sc->mpr_regs_resource = bus_alloc_resource_any(dev,
SYS_RES_MEMORY, &sc->mpr_regs_rid, RF_ACTIVE)) == NULL) {
mpr_printf(sc, "Cannot allocate PCI registers\n");
return (ENXIO);
}
sc->mpr_btag = rman_get_bustag(sc->mpr_regs_resource);
sc->mpr_bhandle = rman_get_bushandle(sc->mpr_regs_resource);
/* Allocate the parent DMA tag */
if (bus_dma_tag_create( bus_get_dma_tag(dev), /* parent */
1, 0, /* algnmnt, boundary */
BUS_SPACE_MAXADDR, /* lowaddr */
BUS_SPACE_MAXADDR, /* highaddr */
NULL, NULL, /* filter, filterarg */
BUS_SPACE_MAXSIZE_32BIT,/* maxsize */
BUS_SPACE_UNRESTRICTED, /* nsegments */
BUS_SPACE_MAXSIZE_32BIT,/* maxsegsize */
0, /* flags */
NULL, NULL, /* lockfunc, lockarg */
&sc->mpr_parent_dmat)) {
mpr_printf(sc, "Cannot allocate parent DMA tag\n");
mpr_pci_free(sc);
return (ENOMEM);
}
if ((error = mpr_attach(sc)) != 0)
mpr_pci_free(sc);
return (error);
}
int
mpr_pci_setup_interrupts(struct mpr_softc *sc)
{
device_t dev;
int i, error, msgs;
dev = sc->mpr_dev;
error = ENXIO;
if ((sc->disable_msix == 0) &&
((msgs = pci_msix_count(dev)) >= MPR_MSI_COUNT))
error = mpr_alloc_msix(sc, MPR_MSI_COUNT);
if ((error != 0) && (sc->disable_msi == 0) &&
((msgs = pci_msi_count(dev)) >= MPR_MSI_COUNT))
error = mpr_alloc_msi(sc, MPR_MSI_COUNT);
if (error != 0) {
sc->mpr_flags |= MPR_FLAGS_INTX;
sc->mpr_irq_rid[0] = 0;
sc->mpr_irq[0] = bus_alloc_resource_any(dev, SYS_RES_IRQ,
&sc->mpr_irq_rid[0], RF_SHAREABLE | RF_ACTIVE);
if (sc->mpr_irq[0] == NULL) {
mpr_printf(sc, "Cannot allocate INTx interrupt\n");
return (ENXIO);
}
error = bus_setup_intr(dev, sc->mpr_irq[0],
INTR_TYPE_BIO | INTR_MPSAFE, NULL, mpr_intr, sc,
&sc->mpr_intrhand[0]);
if (error)
mpr_printf(sc, "Cannot setup INTx interrupt\n");
} else {
sc->mpr_flags |= MPR_FLAGS_MSI;
for (i = 0; i < MPR_MSI_COUNT; i++) {
sc->mpr_irq_rid[i] = i + 1;
sc->mpr_irq[i] = bus_alloc_resource_any(dev,
SYS_RES_IRQ, &sc->mpr_irq_rid[i], RF_ACTIVE);
if (sc->mpr_irq[i] == NULL) {
mpr_printf(sc,
"Cannot allocate MSI interrupt\n");
return (ENXIO);
}
error = bus_setup_intr(dev, sc->mpr_irq[i],
INTR_TYPE_BIO | INTR_MPSAFE, NULL, mpr_intr_msi,
sc, &sc->mpr_intrhand[i]);
if (error) {
mpr_printf(sc,
"Cannot setup MSI interrupt %d\n", i);
break;
}
}
}
return (error);
}
static int
mpr_pci_detach(device_t dev)
{
struct mpr_softc *sc;
int error;
sc = device_get_softc(dev);
if ((error = mpr_free(sc)) != 0)
return (error);
mpr_pci_free(sc);
return (0);
}
static void
mpr_pci_free(struct mpr_softc *sc)
{
int i;
if (sc->mpr_parent_dmat != NULL) {
bus_dma_tag_destroy(sc->mpr_parent_dmat);
}
if (sc->mpr_flags & MPR_FLAGS_MSI) {
for (i = 0; i < MPR_MSI_COUNT; i++) {
if (sc->mpr_irq[i] != NULL) {
bus_teardown_intr(sc->mpr_dev, sc->mpr_irq[i],
sc->mpr_intrhand[i]);
bus_release_resource(sc->mpr_dev, SYS_RES_IRQ,
sc->mpr_irq_rid[i], sc->mpr_irq[i]);
}
}
pci_release_msi(sc->mpr_dev);
}
if (sc->mpr_flags & MPR_FLAGS_INTX) {
bus_teardown_intr(sc->mpr_dev, sc->mpr_irq[0],
sc->mpr_intrhand[0]);
bus_release_resource(sc->mpr_dev, SYS_RES_IRQ,
sc->mpr_irq_rid[0], sc->mpr_irq[0]);
}
if (sc->mpr_regs_resource != NULL) {
bus_release_resource(sc->mpr_dev, SYS_RES_MEMORY,
sc->mpr_regs_rid, sc->mpr_regs_resource);
}
return;
}
static int
mpr_pci_suspend(device_t dev)
{
return (EINVAL);
}
static int
mpr_pci_resume(device_t dev)
{
return (EINVAL);
}
static int
mpr_alloc_msix(struct mpr_softc *sc, int msgs)
{
int error;
error = pci_alloc_msix(sc->mpr_dev, &msgs);
return (error);
}
static int
mpr_alloc_msi(struct mpr_softc *sc, int msgs)
{
int error;
error = pci_alloc_msi(sc->mpr_dev, &msgs);
return (error);
}
int
mpr_pci_restore(struct mpr_softc *sc)
{
struct pci_devinfo *dinfo;
mpr_dprint(sc, MPR_TRACE, "%s\n", __func__);
dinfo = device_get_ivars(sc->mpr_dev);
if (dinfo == NULL) {
mpr_dprint(sc, MPR_FAULT, "%s: NULL dinfo\n", __func__);
return (EINVAL);
}
pci_cfg_restore(sc->mpr_dev, dinfo);
return (0);
}

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/*-
* Copyright (c) 2011-2014 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* LSI MPT-Fusion Host Adapter FreeBSD
*
* $FreeBSD$
*/
struct mpr_fw_event_work;
struct mprsas_lun {
SLIST_ENTRY(mprsas_lun) lun_link;
lun_id_t lun_id;
uint8_t eedp_formatted;
uint32_t eedp_block_size;
uint8_t stop_at_shutdown;
};
struct mprsas_target {
uint16_t handle;
uint8_t linkrate;
uint8_t encl_level_valid;
uint8_t encl_level;
char connector_name[4];
uint64_t devname;
uint32_t devinfo;
uint16_t encl_handle;
uint16_t encl_slot;
uint8_t flags;
#define MPRSAS_TARGET_INABORT (1 << 0)
#define MPRSAS_TARGET_INRESET (1 << 1)
#define MPRSAS_TARGET_INDIAGRESET (1 << 2)
#define MPRSAS_TARGET_INREMOVAL (1 << 3)
#define MPR_TARGET_FLAGS_RAID_COMPONENT (1 << 4)
#define MPR_TARGET_FLAGS_VOLUME (1 << 5)
#define MPRSAS_TARGET_INRECOVERY (MPRSAS_TARGET_INABORT | \
MPRSAS_TARGET_INRESET | MPRSAS_TARGET_INCHIPRESET)
#define MPRSAS_TARGET_ADD (1 << 29)
#define MPRSAS_TARGET_REMOVE (1 << 30)
uint16_t tid;
SLIST_HEAD(, mprsas_lun) luns;
TAILQ_HEAD(, mpr_command) commands;
struct mpr_command *tm;
TAILQ_HEAD(, mpr_command) timedout_commands;
uint16_t exp_dev_handle;
uint16_t phy_num;
uint64_t sasaddr;
uint16_t parent_handle;
uint64_t parent_sasaddr;
uint32_t parent_devinfo;
struct sysctl_ctx_list sysctl_ctx;
struct sysctl_oid *sysctl_tree;
TAILQ_ENTRY(mprsas_target) sysctl_link;
uint64_t issued;
uint64_t completed;
unsigned int outstanding;
unsigned int timeouts;
unsigned int aborts;
unsigned int logical_unit_resets;
unsigned int target_resets;
uint8_t scsi_req_desc_type;
};
struct mprsas_softc {
struct mpr_softc *sc;
u_int flags;
#define MPRSAS_IN_DISCOVERY (1 << 0)
#define MPRSAS_IN_STARTUP (1 << 1)
#define MPRSAS_DISCOVERY_TIMEOUT_PENDING (1 << 2)
#define MPRSAS_QUEUE_FROZEN (1 << 3)
#define MPRSAS_SHUTDOWN (1 << 4)
#define MPRSAS_SCANTHREAD (1 << 5)
u_int maxtargets;
struct mprsas_target *targets;
struct cam_devq *devq;
struct cam_sim *sim;
struct cam_path *path;
struct intr_config_hook sas_ich;
struct callout discovery_callout;
struct mpr_event_handle *mprsas_eh;
u_int startup_refcount;
u_int tm_count;
struct proc *sysctl_proc;
struct taskqueue *ev_tq;
struct task ev_task;
TAILQ_HEAD(, mpr_fw_event_work) ev_queue;
};
MALLOC_DECLARE(M_MPRSAS);
/*
* Abstracted so that the driver can be backwards and forwards compatible
* with future versions of CAM that will provide this functionality.
*/
#define MPR_SET_LUN(lun, ccblun) \
mprsas_set_lun(lun, ccblun)
static __inline int
mprsas_set_lun(uint8_t *lun, u_int ccblun)
{
uint64_t *newlun;
newlun = (uint64_t *)lun;
*newlun = 0;
if (ccblun <= 0xff) {
/* Peripheral device address method, LUN is 0 to 255 */
lun[1] = ccblun;
} else if (ccblun <= 0x3fff) {
/* Flat space address method, LUN is <= 16383 */
scsi_ulto2b(ccblun, lun);
lun[0] |= 0x40;
} else if (ccblun <= 0xffffff) {
/* Extended flat space address method, LUN is <= 16777215 */
scsi_ulto3b(ccblun, &lun[1]);
/* Extended Flat space address method */
lun[0] = 0xc0;
/* Length = 1, i.e. LUN is 3 bytes long */
lun[0] |= 0x10;
/* Extended Address Method */
lun[0] |= 0x02;
} else {
return (EINVAL);
}
return (0);
}
#define MPR_SET_SINGLE_LUN(req, lun) \
do { \
bzero((req)->LUN, 8); \
(req)->LUN[1] = lun; \
} while(0)
void mprsas_rescan_target(struct mpr_softc *sc, struct mprsas_target *targ);
void mprsas_discovery_end(struct mprsas_softc *sassc);
void mprsas_startup_increment(struct mprsas_softc *sassc);
void mprsas_startup_decrement(struct mprsas_softc *sassc);
void mprsas_release_simq_reinit(struct mprsas_softc *sassc);
struct mpr_command * mprsas_alloc_tm(struct mpr_softc *sc);
void mprsas_free_tm(struct mpr_softc *sc, struct mpr_command *tm);
void mprsas_firmware_event_work(void *arg, int pending);
int mprsas_check_id(struct mprsas_softc *sassc, int id);

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/*-
* Copyright (c) 2009 Yahoo! Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*/
#include <sys/cdefs.h>
__FBSDID("$FreeBSD$");
/* Debugging tables for MPT2 */
/* TODO Move headers to mprvar */
#include <sys/types.h>
#include <sys/param.h>
#include <sys/systm.h>
#include <sys/kernel.h>
#include <sys/selinfo.h>
#include <sys/module.h>
#include <sys/bus.h>
#include <sys/conf.h>
#include <sys/bio.h>
#include <sys/malloc.h>
#include <sys/uio.h>
#include <sys/sysctl.h>
#include <sys/queue.h>
#include <sys/kthread.h>
#include <sys/taskqueue.h>
#include <machine/bus.h>
#include <machine/resource.h>
#include <sys/rman.h>
#include <cam/scsi/scsi_all.h>
#include <dev/mpr/mpi/mpi2_type.h>
#include <dev/mpr/mpi/mpi2.h>
#include <dev/mpr/mpi/mpi2_ioc.h>
#include <dev/mpr/mpi/mpi2_cnfg.h>
#include <dev/mpr/mpi/mpi2_init.h>
#include <dev/mpr/mpi/mpi2_tool.h>
#include <dev/mpr/mpr_ioctl.h>
#include <dev/mpr/mprvar.h>
#include <dev/mpr/mpr_table.h>
char *
mpr_describe_table(struct mpr_table_lookup *table, u_int code)
{
int i;
for (i = 0; table[i].string != NULL; i++) {
if (table[i].code == code)
return(table[i].string);
}
return(table[i+1].string);
}
struct mpr_table_lookup mpr_event_names[] = {
{"LogData", 0x01},
{"StateChange", 0x02},
{"HardResetReceived", 0x05},
{"EventChange", 0x0a},
{"TaskSetFull", 0x0e},
{"SasDeviceStatusChange", 0x0f},
{"IrOperationStatus", 0x14},
{"SasDiscovery", 0x16},
{"SasBroadcastPrimitive", 0x17},
{"SasInitDeviceStatusChange", 0x18},
{"SasInitTableOverflow", 0x19},
{"SasTopologyChangeList", 0x1c},
{"SasEnclDeviceStatusChange", 0x1d},
{"IrVolume", 0x1e},
{"IrPhysicalDisk", 0x1f},
{"IrConfigurationChangeList", 0x20},
{"LogEntryAdded", 0x21},
{"SasPhyCounter", 0x22},
{"GpioInterrupt", 0x23},
{"HbdPhyEvent", 0x24},
{NULL, 0},
{"Unknown Event", 0}
};
struct mpr_table_lookup mpr_phystatus_names[] = {
{"NewTargetAdded", 0x01},
{"TargetGone", 0x02},
{"PHYLinkStatusChange", 0x03},
{"PHYLinkStatusUnchanged", 0x04},
{"TargetMissing", 0x05},
{NULL, 0},
{"Unknown Status", 0}
};
struct mpr_table_lookup mpr_linkrate_names[] = {
{"PHY disabled", 0x01},
{"Speed Negotiation Failed", 0x02},
{"SATA OOB Complete", 0x03},
{"SATA Port Selector", 0x04},
{"SMP Reset in Progress", 0x05},
{"1.5Gbps", 0x08},
{"3.0Gbps", 0x09},
{"6.0Gbps", 0x0a},
{NULL, 0},
{"LinkRate Unknown", 0x00}
};
struct mpr_table_lookup mpr_sasdev0_devtype[] = {
{"End Device", 0x01},
{"Edge Expander", 0x02},
{"Fanout Expander", 0x03},
{NULL, 0},
{"No Device", 0x00}
};
struct mpr_table_lookup mpr_phyinfo_reason_names[] = {
{"Power On", 0x01},
{"Hard Reset", 0x02},
{"SMP Phy Control Link Reset", 0x03},
{"Loss DWORD Sync", 0x04},
{"Multiplex Sequence", 0x05},
{"I-T Nexus Loss Timer", 0x06},
{"Break Timeout Timer", 0x07},
{"PHY Test Function", 0x08},
{NULL, 0},
{"Unknown Reason", 0x00}
};
struct mpr_table_lookup mpr_whoinit_names[] = {
{"System BIOS", 0x01},
{"ROM BIOS", 0x02},
{"PCI Peer", 0x03},
{"Host Driver", 0x04},
{"Manufacturing", 0x05},
{NULL, 0},
{"Not Initialized", 0x00}
};
struct mpr_table_lookup mpr_sasdisc_reason[] = {
{"Discovery Started", 0x01},
{"Discovery Complete", 0x02},
{NULL, 0},
{"Unknown", 0x00}
};
struct mpr_table_lookup mpr_sastopo_exp[] = {
{"Added", 0x01},
{"Not Responding", 0x02},
{"Responding", 0x03},
{"Delay Not Responding", 0x04},
{NULL, 0},
{"Unknown", 0x00}
};
struct mpr_table_lookup mpr_sasdev_reason[] = {
{"SMART Data", 0x05},
{"Unsupported", 0x07},
{"Internal Device Reset", 0x08},
{"Task Abort Internal", 0x09},
{"Abort Task Set Internal", 0x0a},
{"Clear Task Set Internal", 0x0b},
{"Query Task Internal", 0x0c},
{"Async Notification", 0x0d},
{"Cmp Internal Device Reset", 0x0e},
{"Cmp Task Abort Internal", 0x0f},
{"Sata Init Failure", 0x10},
{NULL, 0},
{"Unknown", 0x00}
};
void
mpr_describe_devinfo(uint32_t devinfo, char *string, int len)
{
snprintf(string, len, "%b,%s", devinfo,
"\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit"
"\10SataDev" "\11SmpTarg" "\12StpTarg" "\13SspTarg" "\14Direct"
"\15LsiDev" "\16AtapiDev" "\17SepDev",
mpr_describe_table(mpr_sasdev0_devtype, devinfo & 0x03));
}
void
mpr_print_iocfacts(struct mpr_softc *sc, MPI2_IOC_FACTS_REPLY *facts)
{
MPR_PRINTFIELD_START(sc, "IOCFacts");
MPR_PRINTFIELD(sc, facts, MsgVersion, 0x%x);
MPR_PRINTFIELD(sc, facts, HeaderVersion, 0x%x);
MPR_PRINTFIELD(sc, facts, IOCNumber, %d);
MPR_PRINTFIELD(sc, facts, IOCExceptions, 0x%x);
MPR_PRINTFIELD(sc, facts, MaxChainDepth, %d);
mpr_dprint_field(sc, MPR_XINFO, "WhoInit: %s\n",
mpr_describe_table(mpr_whoinit_names, facts->WhoInit));
MPR_PRINTFIELD(sc, facts, NumberOfPorts, %d);
MPR_PRINTFIELD(sc, facts, RequestCredit, %d);
MPR_PRINTFIELD(sc, facts, ProductID, 0x%x);
mpr_dprint_field(sc, MPR_XINFO, "IOCCapabilities: %b\n",
facts->IOCCapabilities, "\20" "\3ScsiTaskFull" "\4DiagTrace"
"\5SnapBuf" "\6ExtBuf" "\7EEDP" "\10BiDirTarg" "\11Multicast"
"\14TransRetry" "\15IR" "\16EventReplay" "\17RaidAccel"
"\20MSIXIndex" "\21HostDisc");
mpr_dprint_field(sc, MPR_XINFO, "FWVersion= %d-%d-%d-%d\n",
facts->FWVersion.Struct.Major,
facts->FWVersion.Struct.Minor,
facts->FWVersion.Struct.Unit,
facts->FWVersion.Struct.Dev);
MPR_PRINTFIELD(sc, facts, IOCRequestFrameSize, %d);
MPR_PRINTFIELD(sc, facts, MaxInitiators, %d);
MPR_PRINTFIELD(sc, facts, MaxTargets, %d);
MPR_PRINTFIELD(sc, facts, MaxSasExpanders, %d);
MPR_PRINTFIELD(sc, facts, MaxEnclosures, %d);
mpr_dprint_field(sc, MPR_XINFO, "ProtocolFlags: %b\n",
facts->ProtocolFlags, "\20" "\1ScsiTarg" "\2ScsiInit");
MPR_PRINTFIELD(sc, facts, HighPriorityCredit, %d);
MPR_PRINTFIELD(sc, facts, MaxReplyDescriptorPostQueueDepth, %d);
MPR_PRINTFIELD(sc, facts, ReplyFrameSize, %d);
MPR_PRINTFIELD(sc, facts, MaxVolumes, %d);
MPR_PRINTFIELD(sc, facts, MaxDevHandle, %d);
MPR_PRINTFIELD(sc, facts, MaxPersistentEntries, %d);
}
void
mpr_print_portfacts(struct mpr_softc *sc, MPI2_PORT_FACTS_REPLY *facts)
{
MPR_PRINTFIELD_START(sc, "PortFacts");
MPR_PRINTFIELD(sc, facts, PortNumber, %d);
MPR_PRINTFIELD(sc, facts, PortType, 0x%x);
MPR_PRINTFIELD(sc, facts, MaxPostedCmdBuffers, %d);
}
void
mpr_print_event(struct mpr_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event)
{
MPR_EVENTFIELD_START(sc, "EventReply");
MPR_EVENTFIELD(sc, event, EventDataLength, %d);
MPR_EVENTFIELD(sc, event, AckRequired, %d);
mpr_dprint_field(sc, MPR_EVENT, "Event: %s (0x%x)\n",
mpr_describe_table(mpr_event_names, event->Event), event->Event);
MPR_EVENTFIELD(sc, event, EventContext, 0x%x);
}
void
mpr_print_sasdev0(struct mpr_softc *sc, MPI2_CONFIG_PAGE_SAS_DEV_0 *buf)
{
MPR_PRINTFIELD_START(sc, "SAS Device Page 0");
MPR_PRINTFIELD(sc, buf, Slot, %d);
MPR_PRINTFIELD(sc, buf, EnclosureHandle, 0x%x);
mpr_dprint_field(sc, MPR_XINFO, "SASAddress: 0x%jx\n",
mpr_to_u64(&buf->SASAddress));
MPR_PRINTFIELD(sc, buf, ParentDevHandle, 0x%x);
MPR_PRINTFIELD(sc, buf, PhyNum, %d);
MPR_PRINTFIELD(sc, buf, AccessStatus, 0x%x);
MPR_PRINTFIELD(sc, buf, DevHandle, 0x%x);
MPR_PRINTFIELD(sc, buf, AttachedPhyIdentifier, 0x%x);
MPR_PRINTFIELD(sc, buf, ZoneGroup, %d);
mpr_dprint_field(sc, MPR_XINFO, "DeviceInfo: %b,%s\n", buf->DeviceInfo,
"\20" "\4SataHost" "\5SmpInit" "\6StpInit" "\7SspInit"
"\10SataDev" "\11SmpTarg" "\12StpTarg" "\13SspTarg" "\14Direct"
"\15LsiDev" "\16AtapiDev" "\17SepDev",
mpr_describe_table(mpr_sasdev0_devtype, buf->DeviceInfo & 0x03));
MPR_PRINTFIELD(sc, buf, Flags, 0x%x);
MPR_PRINTFIELD(sc, buf, PhysicalPort, %d);
MPR_PRINTFIELD(sc, buf, MaxPortConnections, %d);
mpr_dprint_field(sc, MPR_XINFO, "DeviceName: 0x%jx\n",
mpr_to_u64(&buf->DeviceName));
MPR_PRINTFIELD(sc, buf, PortGroups, %d);
MPR_PRINTFIELD(sc, buf, DmaGroup, %d);
MPR_PRINTFIELD(sc, buf, ControlGroup, %d);
}
void
mpr_print_evt_sas(struct mpr_softc *sc, MPI2_EVENT_NOTIFICATION_REPLY *event)
{
mpr_print_event(sc, event);
switch(event->Event) {
case MPI2_EVENT_SAS_DISCOVERY:
{
MPI2_EVENT_DATA_SAS_DISCOVERY *data;
data = (MPI2_EVENT_DATA_SAS_DISCOVERY *)&event->EventData;
mpr_dprint_field(sc, MPR_EVENT, "Flags: %b\n", data->Flags,
"\20" "\1InProgress" "\2DeviceChange");
mpr_dprint_field(sc, MPR_EVENT, "ReasonCode: %s\n",
mpr_describe_table(mpr_sasdisc_reason, data->ReasonCode));
MPR_EVENTFIELD(sc, data, PhysicalPort, %d);
mpr_dprint_field(sc, MPR_EVENT, "DiscoveryStatus: %b\n",
data->DiscoveryStatus, "\20"
"\1Loop" "\2UnaddressableDev" "\3DupSasAddr" "\5SmpTimeout"
"\6ExpRouteFull" "\7RouteIndexError" "\10SmpFailed"
"\11SmpCrcError" "\12SubSubLink" "\13TableTableLink"
"\14UnsupDevice" "\15TableSubLink" "\16MultiDomain"
"\17MultiSub" "\20MultiSubSub" "\34DownstreamInit"
"\35MaxPhys" "\36MaxTargs" "\37MaxExpanders"
"\40MaxEnclosures");
break;
}
case MPI2_EVENT_SAS_TOPOLOGY_CHANGE_LIST:
{
MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *data;
MPI2_EVENT_SAS_TOPO_PHY_ENTRY *phy;
int i, phynum;
data = (MPI2_EVENT_DATA_SAS_TOPOLOGY_CHANGE_LIST *)
&event->EventData;
MPR_EVENTFIELD(sc, data, EnclosureHandle, 0x%x);
MPR_EVENTFIELD(sc, data, ExpanderDevHandle, 0x%x);
MPR_EVENTFIELD(sc, data, NumPhys, %d);
MPR_EVENTFIELD(sc, data, NumEntries, %d);
MPR_EVENTFIELD(sc, data, StartPhyNum, %d);
mpr_dprint_field(sc, MPR_EVENT, "ExpStatus: %s (0x%x)\n",
mpr_describe_table(mpr_sastopo_exp, data->ExpStatus),
data->ExpStatus);
MPR_EVENTFIELD(sc, data, PhysicalPort, %d);
for (i = 0; i < data->NumEntries; i++) {
phy = &data->PHY[i];
phynum = data->StartPhyNum + i;
mpr_dprint_field(sc, MPR_EVENT,
"PHY[%d].AttachedDevHandle: 0x%04x\n", phynum,
phy->AttachedDevHandle);
mpr_dprint_field(sc, MPR_EVENT,
"PHY[%d].LinkRate: %s (0x%x)\n", phynum,
mpr_describe_table(mpr_linkrate_names,
(phy->LinkRate >> 4) & 0xf), phy->LinkRate);
mpr_dprint_field(sc,MPR_EVENT,"PHY[%d].PhyStatus: "
"%s\n", phynum,
mpr_describe_table(mpr_phystatus_names,
phy->PhyStatus));
}
break;
}
case MPI2_EVENT_SAS_ENCL_DEVICE_STATUS_CHANGE:
{
MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE *data;
data = (MPI2_EVENT_DATA_SAS_ENCL_DEV_STATUS_CHANGE *)
&event->EventData;
MPR_EVENTFIELD(sc, data, EnclosureHandle, 0x%x);
mpr_dprint_field(sc, MPR_EVENT, "ReasonCode: %s\n",
mpr_describe_table(mpr_sastopo_exp, data->ReasonCode));
MPR_EVENTFIELD(sc, data, PhysicalPort, %d);
MPR_EVENTFIELD(sc, data, NumSlots, %d);
MPR_EVENTFIELD(sc, data, StartSlot, %d);
MPR_EVENTFIELD(sc, data, PhyBits, 0x%x);
break;
}
case MPI2_EVENT_SAS_DEVICE_STATUS_CHANGE:
{
MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *data;
data = (MPI2_EVENT_DATA_SAS_DEVICE_STATUS_CHANGE *)
&event->EventData;
MPR_EVENTFIELD(sc, data, TaskTag, 0x%x);
mpr_dprint_field(sc, MPR_EVENT, "ReasonCode: %s\n",
mpr_describe_table(mpr_sasdev_reason, data->ReasonCode));
MPR_EVENTFIELD(sc, data, ASC, 0x%x);
MPR_EVENTFIELD(sc, data, ASCQ, 0x%x);
MPR_EVENTFIELD(sc, data, DevHandle, 0x%x);
mpr_dprint_field(sc, MPR_EVENT, "SASAddress: 0x%jx\n",
mpr_to_u64(&data->SASAddress));
}
default:
break;
}
}
void
mpr_print_expander1(struct mpr_softc *sc, MPI2_CONFIG_PAGE_EXPANDER_1 *buf)
{
MPR_PRINTFIELD_START(sc, "SAS Expander Page 1 #%d", buf->Phy);
MPR_PRINTFIELD(sc, buf, PhysicalPort, %d);
MPR_PRINTFIELD(sc, buf, NumPhys, %d);
MPR_PRINTFIELD(sc, buf, Phy, %d);
MPR_PRINTFIELD(sc, buf, NumTableEntriesProgrammed, %d);
mpr_dprint_field(sc, MPR_XINFO, "ProgrammedLinkRate: %s (0x%x)\n",
mpr_describe_table(mpr_linkrate_names,
(buf->ProgrammedLinkRate >> 4) & 0xf), buf->ProgrammedLinkRate);
mpr_dprint_field(sc, MPR_XINFO, "HwLinkRate: %s (0x%x)\n",
mpr_describe_table(mpr_linkrate_names,
(buf->HwLinkRate >> 4) & 0xf), buf->HwLinkRate);
MPR_PRINTFIELD(sc, buf, AttachedDevHandle, 0x%04x);
mpr_dprint_field(sc, MPR_XINFO, "PhyInfo Reason: %s (0x%x)\n",
mpr_describe_table(mpr_phyinfo_reason_names,
(buf->PhyInfo >> 16) & 0xf), buf->PhyInfo);
mpr_dprint_field(sc, MPR_XINFO, "AttachedDeviceInfo: %b,%s\n",
buf->AttachedDeviceInfo, "\20" "\4SATAhost" "\5SMPinit" "\6STPinit"
"\7SSPinit" "\10SATAdev" "\11SMPtarg" "\12STPtarg" "\13SSPtarg"
"\14Direct" "\15LSIdev" "\16ATAPIdev" "\17SEPdev",
mpr_describe_table(mpr_sasdev0_devtype,
buf->AttachedDeviceInfo & 0x03));
MPR_PRINTFIELD(sc, buf, ExpanderDevHandle, 0x%04x);
MPR_PRINTFIELD(sc, buf, ChangeCount, %d);
mpr_dprint_field(sc, MPR_XINFO, "NegotiatedLinkRate: %s (0x%x)\n",
mpr_describe_table(mpr_linkrate_names,
buf->NegotiatedLinkRate & 0xf), buf->NegotiatedLinkRate);
MPR_PRINTFIELD(sc, buf, PhyIdentifier, %d);
MPR_PRINTFIELD(sc, buf, AttachedPhyIdentifier, %d);
MPR_PRINTFIELD(sc, buf, DiscoveryInfo, 0x%x);
MPR_PRINTFIELD(sc, buf, AttachedPhyInfo, 0x%x);
mpr_dprint_field(sc, MPR_XINFO, "AttachedPhyInfo Reason: %s (0x%x)\n",
mpr_describe_table(mpr_phyinfo_reason_names,
buf->AttachedPhyInfo & 0xf), buf->AttachedPhyInfo);
MPR_PRINTFIELD(sc, buf, ZoneGroup, %d);
MPR_PRINTFIELD(sc, buf, SelfConfigStatus, 0x%x);
}
void
mpr_print_sasphy0(struct mpr_softc *sc, MPI2_CONFIG_PAGE_SAS_PHY_0 *buf)
{
MPR_PRINTFIELD_START(sc, "SAS PHY Page 0");
MPR_PRINTFIELD(sc, buf, OwnerDevHandle, 0x%04x);
MPR_PRINTFIELD(sc, buf, AttachedDevHandle, 0x%04x);
MPR_PRINTFIELD(sc, buf, AttachedPhyIdentifier, %d);
mpr_dprint_field(sc, MPR_XINFO, "AttachedPhyInfo Reason: %s (0x%x)\n",
mpr_describe_table(mpr_phyinfo_reason_names,
buf->AttachedPhyInfo & 0xf), buf->AttachedPhyInfo);
mpr_dprint_field(sc, MPR_XINFO, "ProgrammedLinkRate: %s (0x%x)\n",
mpr_describe_table(mpr_linkrate_names,
(buf->ProgrammedLinkRate >> 4) & 0xf), buf->ProgrammedLinkRate);
mpr_dprint_field(sc, MPR_XINFO, "HwLinkRate: %s (0x%x)\n",
mpr_describe_table(mpr_linkrate_names,
(buf->HwLinkRate >> 4) & 0xf), buf->HwLinkRate);
MPR_PRINTFIELD(sc, buf, ChangeCount, %d);
MPR_PRINTFIELD(sc, buf, Flags, 0x%x);
mpr_dprint_field(sc, MPR_XINFO, "PhyInfo Reason: %s (0x%x)\n",
mpr_describe_table(mpr_phyinfo_reason_names,
(buf->PhyInfo >> 16) & 0xf), buf->PhyInfo);
mpr_dprint_field(sc, MPR_XINFO, "NegotiatedLinkRate: %s (0x%x)\n",
mpr_describe_table(mpr_linkrate_names,
buf->NegotiatedLinkRate & 0xf), buf->NegotiatedLinkRate);
}
void
mpr_print_sgl(struct mpr_softc *sc, struct mpr_command *cm, int offset)
{
MPI2_IEEE_SGE_SIMPLE64 *ieee_sge;
MPI25_IEEE_SGE_CHAIN64 *ieee_sgc;
MPI2_SGE_SIMPLE64 *sge;
MPI2_REQUEST_HEADER *req;
struct mpr_chain *chain = NULL;
char *frame;
u_int i = 0, flags, length;
req = (MPI2_REQUEST_HEADER *)cm->cm_req;
frame = (char *)cm->cm_req;
ieee_sge = (MPI2_IEEE_SGE_SIMPLE64 *)&frame[offset * 4];
sge = (MPI2_SGE_SIMPLE64 *)&frame[offset * 4];
printf("SGL for command %p\n", cm);
hexdump(frame, 128, NULL, 0);
while ((frame != NULL) && (!(cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE))) {
flags = ieee_sge->Flags;
length = le32toh(ieee_sge->Length);
printf("IEEE seg%d flags=0x%02x len=0x%08x addr=0x%016jx\n", i,
flags, length, mpr_to_u64(&ieee_sge->Address));
if (flags & MPI25_IEEE_SGE_FLAGS_END_OF_LIST)
break;
ieee_sge++;
i++;
if (flags & MPI2_IEEE_SGE_FLAGS_CHAIN_ELEMENT) {
ieee_sgc = (MPI25_IEEE_SGE_CHAIN64 *)ieee_sge;
printf("IEEE chain flags=0x%x len=0x%x Offset=0x%x "
"Address=0x%016jx\n", ieee_sgc->Flags,
le32toh(ieee_sgc->Length),
ieee_sgc->NextChainOffset,
mpr_to_u64(&ieee_sgc->Address));
if (chain == NULL)
chain = TAILQ_FIRST(&cm->cm_chain_list);
else
chain = TAILQ_NEXT(chain, chain_link);
frame = (char *)chain->chain;
ieee_sge = (MPI2_IEEE_SGE_SIMPLE64 *)frame;
hexdump(frame, 128, NULL, 0);
}
}
while ((frame != NULL) && (cm->cm_flags & MPR_CM_FLAGS_SGE_SIMPLE)) {
flags = le32toh(sge->FlagsLength) >> MPI2_SGE_FLAGS_SHIFT;
printf("seg%d flags=0x%02x len=0x%06x addr=0x%016jx\n", i,
flags, le32toh(sge->FlagsLength) & 0xffffff,
mpr_to_u64(&sge->Address));
if (flags & (MPI2_SGE_FLAGS_END_OF_LIST |
MPI2_SGE_FLAGS_END_OF_BUFFER))
break;
sge++;
i++;
}
}
void
mpr_print_scsiio_cmd(struct mpr_softc *sc, struct mpr_command *cm)
{
MPI2_SCSI_IO_REQUEST *req;
req = (MPI2_SCSI_IO_REQUEST *)cm->cm_req;
mpr_print_sgl(sc, cm, req->SGLOffset0);
}

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/*-
* Copyright (c) 2009 Yahoo! Inc.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MPR_TABLE_H
#define _MPR_TABLE_H
struct mpr_table_lookup {
char *string;
u_int code;
};
char * mpr_describe_table(struct mpr_table_lookup *table, u_int code);
void mpr_describe_devinfo(uint32_t devinfo, char *string, int len);
extern struct mpr_table_lookup mpr_event_names[];
extern struct mpr_table_lookup mpr_phystatus_names[];
extern struct mpr_table_lookup mpr_linkrate_names[];
void mpr_print_iocfacts(struct mpr_softc *, MPI2_IOC_FACTS_REPLY *);
void mpr_print_portfacts(struct mpr_softc *, MPI2_PORT_FACTS_REPLY *);
void mpr_print_event(struct mpr_softc *, MPI2_EVENT_NOTIFICATION_REPLY *);
void mpr_print_sasdev0(struct mpr_softc *, MPI2_CONFIG_PAGE_SAS_DEV_0 *);
void mpr_print_evt_sas(struct mpr_softc *, MPI2_EVENT_NOTIFICATION_REPLY *);
void mpr_print_expander1(struct mpr_softc *, MPI2_CONFIG_PAGE_EXPANDER_1 *);
void mpr_print_sasphy0(struct mpr_softc *, MPI2_CONFIG_PAGE_SAS_PHY_0 *);
void mpr_print_sgl(struct mpr_softc *, struct mpr_command *, int);
void mpr_print_scsiio_cmd(struct mpr_softc *, struct mpr_command *);
#endif

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/*-
* Copyright (c) 2009 Yahoo! Inc.
* Copyright (c) 2011-2014 LSI Corp.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* $FreeBSD$
*/
#ifndef _MPRVAR_H
#define _MPRVAR_H
#define MPR_DRIVER_VERSION "05.255.05.00-fbsd"
#define MPR_DB_MAX_WAIT 2500
#define MPR_REQ_FRAMES 1024
#define MPR_EVT_REPLY_FRAMES 32
#define MPR_REPLY_FRAMES MPR_REQ_FRAMES
#define MPR_CHAIN_FRAMES 2048
#define MPR_SENSE_LEN SSD_FULL_SIZE
#define MPR_MSI_COUNT 1
#define MPR_SGE64_SIZE 12
#define MPR_SGE32_SIZE 8
#define MPR_SGC_SIZE 8
#define MPR_FUNCTRACE(sc) \
mpr_dprint((sc), MPR_TRACE, "%s\n", __func__)
#define CAN_SLEEP 1
#define NO_SLEEP 0
#define MPR_PERIODIC_DELAY 1 /* 1 second heartbeat/watchdog check */
#define IFAULT_IOP_OVER_TEMP_THRESHOLD_EXCEEDED 0x2810
#define MPR_SCSI_RI_INVALID_FRAME (0x00000002)
#define MPR_STRING_LENGTH 64
#include <sys/endian.h>
/*
* host mapping related macro definitions
*/
#define MPR_MAPTABLE_BAD_IDX 0xFFFFFFFF
#define MPR_DPM_BAD_IDX 0xFFFF
#define MPR_ENCTABLE_BAD_IDX 0xFF
#define MPR_MAX_MISSING_COUNT 0x0F
#define MPR_DEV_RESERVED 0x20000000
#define MPR_MAP_IN_USE 0x10000000
#define MPR_RAID_CHANNEL 1
#define MPR_MAP_BAD_ID 0xFFFFFFFF
typedef uint8_t u8;
typedef uint16_t u16;
typedef uint32_t u32;
typedef uint64_t u64;
/**
* struct dev_mapping_table - device mapping information
* @physical_id: SAS address for drives or WWID for RAID volumes
* @device_info: bitfield provides detailed info about the device
* @phy_bits: bitfields indicating controller phys
* @dpm_entry_num: index of this device in device persistent map table
* @dev_handle: device handle for the device pointed by this entry
* @channel: target channel
* @id: target id
* @missing_count: number of times the device not detected by driver
* @hide_flag: Hide this physical disk/not (foreign configuration)
* @init_complete: Whether the start of the day checks completed or not
* @TLR_bits: Turn TLR support on or off
*/
struct dev_mapping_table {
u64 physical_id;
u32 device_info;
u32 phy_bits;
u16 dpm_entry_num;
u16 dev_handle;
u8 reserved1;
u8 channel;
u16 id;
u8 missing_count;
u8 init_complete;
u8 TLR_bits;
u8 reserved2;
};
/**
* struct enc_mapping_table - mapping information about an enclosure
* @enclosure_id: Logical ID of this enclosure
* @start_index: index to the entry in dev_mapping_table
* @phy_bits: bitfields indicating controller phys
* @dpm_entry_num: index of this enclosure in device persistent map table
* @enc_handle: device handle for the enclosure pointed by this entry
* @num_slots: number of slots in the enclosure
* @start_slot: Starting slot id
* @missing_count: number of times the device not detected by driver
* @removal_flag: used to mark the device for removal
* @skip_search: used as a flag to include/exclude enclosure for search
* @init_complete: Whether the start of the day checks completed or not
*/
struct enc_mapping_table {
u64 enclosure_id;
u32 start_index;
u32 phy_bits;
u16 dpm_entry_num;
u16 enc_handle;
u16 num_slots;
u16 start_slot;
u8 missing_count;
u8 removal_flag;
u8 skip_search;
u8 init_complete;
};
/**
* struct map_removal_table - entries to be removed from mapping table
* @dpm_entry_num: index of this device in device persistent map table
* @dev_handle: device handle for the device pointed by this entry
*/
struct map_removal_table{
u16 dpm_entry_num;
u16 dev_handle;
};
typedef struct mpr_fw_diagnostic_buffer {
size_t size;
uint8_t extended_type;
uint8_t buffer_type;
uint8_t force_release;
uint32_t product_specific[23];
uint8_t immediate;
uint8_t enabled;
uint8_t valid_data;
uint8_t owned_by_firmware;
uint32_t unique_id;
} mpr_fw_diagnostic_buffer_t;
struct mpr_softc;
struct mpr_command;
struct mprsas_softc;
union ccb;
struct mprsas_target;
struct mpr_column_map;
MALLOC_DECLARE(M_MPR);
typedef void mpr_evt_callback_t(struct mpr_softc *, uintptr_t,
MPI2_EVENT_NOTIFICATION_REPLY *reply);
typedef void mpr_command_callback_t(struct mpr_softc *, struct mpr_command *cm);
struct mpr_chain {
TAILQ_ENTRY(mpr_chain) chain_link;
void *chain;
uint64_t chain_busaddr;
};
/*
* This needs to be at least 2 to support SMP passthrough.
*/
#define MPR_IOVEC_COUNT 2
struct mpr_command {
TAILQ_ENTRY(mpr_command) cm_link;
TAILQ_ENTRY(mpr_command) cm_recovery;
struct mpr_softc *cm_sc;
union ccb *cm_ccb;
void *cm_data;
u_int cm_length;
u_int cm_out_len;
struct uio cm_uio;
struct iovec cm_iovec[MPR_IOVEC_COUNT];
u_int cm_max_segs;
u_int cm_sglsize;
void *cm_sge;
uint8_t *cm_req;
uint8_t *cm_reply;
uint32_t cm_reply_data;
mpr_command_callback_t *cm_complete;
void *cm_complete_data;
struct mprsas_target *cm_targ;
MPI2_REQUEST_DESCRIPTOR_UNION cm_desc;
u_int cm_lun;
u_int cm_flags;
#define MPR_CM_FLAGS_POLLED (1 << 0)
#define MPR_CM_FLAGS_COMPLETE (1 << 1)
#define MPR_CM_FLAGS_SGE_SIMPLE (1 << 2)
#define MPR_CM_FLAGS_DATAOUT (1 << 3)
#define MPR_CM_FLAGS_DATAIN (1 << 4)
#define MPR_CM_FLAGS_WAKEUP (1 << 5)
#define MPR_CM_FLAGS_USE_UIO (1 << 6)
#define MPR_CM_FLAGS_SMP_PASS (1 << 7)
#define MPR_CM_FLAGS_CHAIN_FAILED (1 << 8)
#define MPR_CM_FLAGS_ERROR_MASK MPR_CM_FLAGS_CHAIN_FAILED
#define MPR_CM_FLAGS_USE_CCB (1 << 9)
u_int cm_state;
#define MPR_CM_STATE_FREE 0
#define MPR_CM_STATE_BUSY 1
#define MPR_CM_STATE_TIMEDOUT 2
bus_dmamap_t cm_dmamap;
struct scsi_sense_data *cm_sense;
TAILQ_HEAD(, mpr_chain) cm_chain_list;
uint32_t cm_req_busaddr;
uint32_t cm_sense_busaddr;
struct callout cm_callout;
};
struct mpr_column_map {
uint16_t dev_handle;
uint8_t phys_disk_num;
};
struct mpr_event_handle {
TAILQ_ENTRY(mpr_event_handle) eh_list;
mpr_evt_callback_t *callback;
void *data;
uint8_t mask[16];
};
struct mpr_softc {
device_t mpr_dev;
struct cdev *mpr_cdev;
u_int mpr_flags;
#define MPR_FLAGS_INTX (1 << 0)
#define MPR_FLAGS_MSI (1 << 1)
#define MPR_FLAGS_BUSY (1 << 2)
#define MPR_FLAGS_SHUTDOWN (1 << 3)
#define MPR_FLAGS_DIAGRESET (1 << 4)
#define MPR_FLAGS_ATTACH_DONE (1 << 5)
u_int mpr_debug;
u_int disable_msix;
u_int disable_msi;
int tm_cmds_active;
int io_cmds_active;
int io_cmds_highwater;
int chain_free;
int max_chains;
int chain_free_lowwater;
#if __FreeBSD_version >= 900030
uint64_t chain_alloc_fail;
#endif
struct sysctl_ctx_list sysctl_ctx;
struct sysctl_oid *sysctl_tree;
char fw_version[16];
struct mpr_command *commands;
struct mpr_chain *chains;
struct callout periodic;
struct mprsas_softc *sassc;
char tmp_string[MPR_STRING_LENGTH];
TAILQ_HEAD(, mpr_command) req_list;
TAILQ_HEAD(, mpr_command) high_priority_req_list;
TAILQ_HEAD(, mpr_chain) chain_list;
TAILQ_HEAD(, mpr_command) tm_list;
int replypostindex;
int replyfreeindex;
struct resource *mpr_regs_resource;
bus_space_handle_t mpr_bhandle;
bus_space_tag_t mpr_btag;
int mpr_regs_rid;
bus_dma_tag_t mpr_parent_dmat;
bus_dma_tag_t buffer_dmat;
MPI2_IOC_FACTS_REPLY *facts;
int num_reqs;
int num_replies;
int fqdepth; /* Free queue */
int pqdepth; /* Post queue */
uint8_t event_mask[16];
TAILQ_HEAD(, mpr_event_handle) event_list;
struct mpr_event_handle *mpr_log_eh;
struct mtx mpr_mtx;
struct intr_config_hook mpr_ich;
struct resource *mpr_irq[MPR_MSI_COUNT];
void *mpr_intrhand[MPR_MSI_COUNT];
int mpr_irq_rid[MPR_MSI_COUNT];
uint8_t *req_frames;
bus_addr_t req_busaddr;
bus_dma_tag_t req_dmat;
bus_dmamap_t req_map;
uint8_t *reply_frames;
bus_addr_t reply_busaddr;
bus_dma_tag_t reply_dmat;
bus_dmamap_t reply_map;
struct scsi_sense_data *sense_frames;
bus_addr_t sense_busaddr;
bus_dma_tag_t sense_dmat;
bus_dmamap_t sense_map;
uint8_t *chain_frames;
bus_addr_t chain_busaddr;
bus_dma_tag_t chain_dmat;
bus_dmamap_t chain_map;
MPI2_REPLY_DESCRIPTORS_UNION *post_queue;
bus_addr_t post_busaddr;
uint32_t *free_queue;
bus_addr_t free_busaddr;
bus_dma_tag_t queues_dmat;
bus_dmamap_t queues_map;
uint8_t *fw_diag_buffer;
bus_addr_t fw_diag_busaddr;
bus_dma_tag_t fw_diag_dmat;
bus_dmamap_t fw_diag_map;
uint8_t ir_firmware;
/* static config pages */
Mpi2IOCPage8_t ioc_pg8;
Mpi2IOUnitPage8_t iounit_pg8;
/* host mapping support */
struct dev_mapping_table *mapping_table;
struct enc_mapping_table *enclosure_table;
struct map_removal_table *removal_table;
uint8_t *dpm_entry_used;
uint8_t *dpm_flush_entry;
Mpi2DriverMappingPage0_t *dpm_pg0;
uint16_t max_devices;
uint16_t max_enclosures;
uint16_t max_expanders;
uint8_t max_volumes;
uint8_t num_enc_table_entries;
uint8_t num_rsvd_entries;
uint8_t num_channels;
uint16_t max_dpm_entries;
uint8_t is_dpm_enable;
uint8_t track_mapping_events;
uint32_t pending_map_events;
uint8_t mt_full_retry;
uint8_t mt_add_device_failed;
/* FW diag Buffer List */
mpr_fw_diagnostic_buffer_t
fw_diag_buffer_list[MPI2_DIAG_BUF_TYPE_COUNT];
/* Event Recording IOCTL support */
uint32_t events_to_record[4];
mpr_event_entry_t recorded_events[MPR_EVENT_QUEUE_SIZE];
uint8_t event_index;
uint32_t event_number;
/* EEDP and TLR support */
uint8_t eedp_enabled;
uint8_t control_TLR;
/* Shutdown Event Handler */
eventhandler_tag shutdown_eh;
/* To track topo events during reset */
#define MPR_DIAG_RESET_TIMEOUT 300000
uint8_t wait_for_port_enable;
uint8_t port_enable_complete;
uint8_t msleep_fake_chan;
/* StartStopUnit command handling at shutdown */
uint32_t SSU_refcount;
uint8_t SSU_started;
char exclude_ids[80];
struct timeval lastfail;
};
struct mpr_config_params {
MPI2_CONFIG_EXT_PAGE_HEADER_UNION hdr;
u_int action;
u_int page_address; /* Attributes, not a phys address */
u_int status;
void *buffer;
u_int length;
int timeout;
void (*callback)(struct mpr_softc *, struct mpr_config_params *);
void *cbdata;
};
struct scsi_read_capacity_eedp
{
uint8_t addr[8];
uint8_t length[4];
uint8_t protect;
};
static __inline uint32_t
mpr_regread(struct mpr_softc *sc, uint32_t offset)
{
return (bus_space_read_4(sc->mpr_btag, sc->mpr_bhandle, offset));
}
static __inline void
mpr_regwrite(struct mpr_softc *sc, uint32_t offset, uint32_t val)
{
bus_space_write_4(sc->mpr_btag, sc->mpr_bhandle, offset, val);
}
/* free_queue must have Little Endian address
* TODO- cm_reply_data is unwanted. We can remove it.
* */
static __inline void
mpr_free_reply(struct mpr_softc *sc, uint32_t busaddr)
{
if (++sc->replyfreeindex >= sc->fqdepth)
sc->replyfreeindex = 0;
sc->free_queue[sc->replyfreeindex] = htole32(busaddr);
mpr_regwrite(sc, MPI2_REPLY_FREE_HOST_INDEX_OFFSET, sc->replyfreeindex);
}
static __inline struct mpr_chain *
mpr_alloc_chain(struct mpr_softc *sc)
{
struct mpr_chain *chain;
if ((chain = TAILQ_FIRST(&sc->chain_list)) != NULL) {
TAILQ_REMOVE(&sc->chain_list, chain, chain_link);
sc->chain_free--;
if (sc->chain_free < sc->chain_free_lowwater)
sc->chain_free_lowwater = sc->chain_free;
}
#if __FreeBSD_version >= 900030
else
sc->chain_alloc_fail++;
#endif
return (chain);
}
static __inline void
mpr_free_chain(struct mpr_softc *sc, struct mpr_chain *chain)
{
#if 0
bzero(chain->chain, 128);
#endif
sc->chain_free++;
TAILQ_INSERT_TAIL(&sc->chain_list, chain, chain_link);
}
static __inline void
mpr_free_command(struct mpr_softc *sc, struct mpr_command *cm)
{
struct mpr_chain *chain, *chain_temp;
if (cm->cm_reply != NULL)
mpr_free_reply(sc, cm->cm_reply_data);
cm->cm_reply = NULL;
cm->cm_flags = 0;
cm->cm_complete = NULL;
cm->cm_complete_data = NULL;
cm->cm_ccb = NULL;
cm->cm_targ = NULL;
cm->cm_max_segs = 0;
cm->cm_lun = 0;
cm->cm_state = MPR_CM_STATE_FREE;
cm->cm_data = NULL;
cm->cm_length = 0;
cm->cm_out_len = 0;
cm->cm_sglsize = 0;
cm->cm_sge = NULL;
TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
mpr_free_chain(sc, chain);
}
TAILQ_INSERT_TAIL(&sc->req_list, cm, cm_link);
}
static __inline struct mpr_command *
mpr_alloc_command(struct mpr_softc *sc)
{
struct mpr_command *cm;
cm = TAILQ_FIRST(&sc->req_list);
if (cm == NULL)
return (NULL);
TAILQ_REMOVE(&sc->req_list, cm, cm_link);
KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy command\n"));
cm->cm_state = MPR_CM_STATE_BUSY;
return (cm);
}
static __inline void
mpr_free_high_priority_command(struct mpr_softc *sc, struct mpr_command *cm)
{
struct mpr_chain *chain, *chain_temp;
if (cm->cm_reply != NULL)
mpr_free_reply(sc, cm->cm_reply_data);
cm->cm_reply = NULL;
cm->cm_flags = 0;
cm->cm_complete = NULL;
cm->cm_complete_data = NULL;
cm->cm_ccb = NULL;
cm->cm_targ = NULL;
cm->cm_lun = 0;
cm->cm_state = MPR_CM_STATE_FREE;
TAILQ_FOREACH_SAFE(chain, &cm->cm_chain_list, chain_link, chain_temp) {
TAILQ_REMOVE(&cm->cm_chain_list, chain, chain_link);
mpr_free_chain(sc, chain);
}
TAILQ_INSERT_TAIL(&sc->high_priority_req_list, cm, cm_link);
}
static __inline struct mpr_command *
mpr_alloc_high_priority_command(struct mpr_softc *sc)
{
struct mpr_command *cm;
cm = TAILQ_FIRST(&sc->high_priority_req_list);
if (cm == NULL)
return (NULL);
TAILQ_REMOVE(&sc->high_priority_req_list, cm, cm_link);
KASSERT(cm->cm_state == MPR_CM_STATE_FREE, ("mpr: Allocating busy command\n"));
cm->cm_state = MPR_CM_STATE_BUSY;
return (cm);
}
static __inline void
mpr_lock(struct mpr_softc *sc)
{
mtx_lock(&sc->mpr_mtx);
}
static __inline void
mpr_unlock(struct mpr_softc *sc)
{
mtx_unlock(&sc->mpr_mtx);
}
#define MPR_INFO (1 << 0) /* Basic info */
#define MPR_FAULT (1 << 1) /* Hardware faults */
#define MPR_EVENT (1 << 2) /* Event data from the controller */
#define MPR_LOG (1 << 3) /* Log data from the controller */
#define MPR_RECOVERY (1 << 4) /* Command error recovery tracing */
#define MPR_ERROR (1 << 5) /* Parameter errors, programming bugs */
#define MPR_INIT (1 << 6) /* Things related to system init */
#define MPR_XINFO (1 << 7) /* More detailed/noisy info */
#define MPR_USER (1 << 8) /* Trace user-generated commands */
#define MPR_MAPPING (1 << 9) /* Trace device mappings */
#define MPR_TRACE (1 << 10) /* Function-by-function trace */
#define mpr_printf(sc, args...) \
device_printf((sc)->mpr_dev, ##args)
#define mpr_vprintf(sc, args...) \
do { \
if (bootverbose) \
mpr_printf(sc, ##args); \
} while (0)
#define mpr_dprint(sc, level, msg, args...) \
do { \
if ((sc)->mpr_debug & level) \
device_printf((sc)->mpr_dev, msg, ##args); \
} while (0)
#define mpr_dprint_field(sc, level, msg, args...) \
do { \
if ((sc)->mpr_debug & level) \
printf("\t" msg, ##args); \
} while (0)
#define MPR_PRINTFIELD_START(sc, tag...) \
mpr_dprint((sc), MPR_INFO, ##tag); \
mpr_dprint_field((sc), MPR_INFO, ":\n")
#define MPR_PRINTFIELD_END(sc, tag) \
mpr_dprint((sc), MPR_INFO, tag "\n")
#define MPR_PRINTFIELD(sc, facts, attr, fmt) \
mpr_dprint_field((sc), MPR_INFO, #attr ": " #fmt "\n", (facts)->attr)
#define MPR_EVENTFIELD_START(sc, tag...) \
mpr_dprint((sc), MPR_EVENT, ##tag); \
mpr_dprint_field((sc), MPR_EVENT, ":\n")
#define MPR_EVENTFIELD(sc, facts, attr, fmt) \
mpr_dprint_field((sc), MPR_EVENT, #attr ": " #fmt "\n", (facts)->attr)
#define CAN_SLEEP 1
#define NO_SLEEP 0
static __inline void
mpr_from_u64(uint64_t data, U64 *mpr)
{
(mpr)->High = htole32((uint32_t)((data) >> 32));
(mpr)->Low = htole32((uint32_t)((data) & 0xffffffff));
}
static __inline uint64_t
mpr_to_u64(U64 *data)
{
return (((uint64_t)le32toh(data->High) << 32) | le32toh(data->Low));
}
static __inline void
mpr_mask_intr(struct mpr_softc *sc)
{
uint32_t mask;
mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
mask |= MPI2_HIM_REPLY_INT_MASK;
mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
}
static __inline void
mpr_unmask_intr(struct mpr_softc *sc)
{
uint32_t mask;
mask = mpr_regread(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET);
mask &= ~MPI2_HIM_REPLY_INT_MASK;
mpr_regwrite(sc, MPI2_HOST_INTERRUPT_MASK_OFFSET, mask);
}
int mpr_pci_setup_interrupts(struct mpr_softc *sc);
int mpr_pci_restore(struct mpr_softc *sc);
int mpr_attach(struct mpr_softc *sc);
int mpr_free(struct mpr_softc *sc);
void mpr_intr(void *);
void mpr_intr_msi(void *);
void mpr_intr_locked(void *);
int mpr_register_events(struct mpr_softc *, uint8_t *, mpr_evt_callback_t *,
void *, struct mpr_event_handle **);
int mpr_restart(struct mpr_softc *);
int mpr_update_events(struct mpr_softc *, struct mpr_event_handle *,
uint8_t *);
int mpr_deregister_events(struct mpr_softc *, struct mpr_event_handle *);
int mpr_push_sge(struct mpr_command *, MPI2_SGE_SIMPLE64 *, size_t, int);
int mpr_push_ieee_sge(struct mpr_command *, void *, int);
int mpr_add_dmaseg(struct mpr_command *, vm_paddr_t, size_t, u_int, int);
int mpr_attach_sas(struct mpr_softc *sc);
int mpr_detach_sas(struct mpr_softc *sc);
int mpr_read_config_page(struct mpr_softc *, struct mpr_config_params *);
int mpr_write_config_page(struct mpr_softc *, struct mpr_config_params *);
void mpr_memaddr_cb(void *, bus_dma_segment_t *, int , int );
void mpr_init_sge(struct mpr_command *cm, void *req, void *sge);
int mpr_attach_user(struct mpr_softc *);
void mpr_detach_user(struct mpr_softc *);
void mprsas_record_event(struct mpr_softc *sc,
MPI2_EVENT_NOTIFICATION_REPLY *event_reply);
int mpr_map_command(struct mpr_softc *sc, struct mpr_command *cm);
int mpr_wait_command(struct mpr_softc *sc, struct mpr_command *cm,
int timeout, int sleep_flag);
int mpr_request_polled(struct mpr_softc *sc, struct mpr_command *cm);
int mpr_config_get_bios_pg3(struct mpr_softc *sc, Mpi2ConfigReply_t
*mpi_reply, Mpi2BiosPage3_t *config_page);
int mpr_config_get_raid_volume_pg0(struct mpr_softc *sc, Mpi2ConfigReply_t
*mpi_reply, Mpi2RaidVolPage0_t *config_page, u32 page_address);
int mpr_config_get_ioc_pg8(struct mpr_softc *sc, Mpi2ConfigReply_t *,
Mpi2IOCPage8_t *);
int mpr_config_get_iounit_pg8(struct mpr_softc *sc,
Mpi2ConfigReply_t *mpi_reply, Mpi2IOUnitPage8_t *config_page);
int mpr_config_get_sas_device_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
Mpi2SasDevicePage0_t *, u32 , u16 );
int mpr_config_get_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
Mpi2DriverMappingPage0_t *, u16 );
int mpr_config_get_raid_volume_pg1(struct mpr_softc *sc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidVolPage1_t *config_page, u32 form,
u16 handle);
int mpr_config_get_volume_wwid(struct mpr_softc *sc, u16 volume_handle,
u64 *wwid);
int mpr_config_get_raid_pd_pg0(struct mpr_softc *sc,
Mpi2ConfigReply_t *mpi_reply, Mpi2RaidPhysDiskPage0_t *config_page,
u32 page_address);
void mprsas_ir_shutdown(struct mpr_softc *sc);
int mpr_reinit(struct mpr_softc *sc);
void mprsas_handle_reinit(struct mpr_softc *sc);
void mpr_base_static_config_pages(struct mpr_softc *sc);
int mpr_mapping_initialize(struct mpr_softc *);
void mpr_mapping_topology_change_event(struct mpr_softc *,
Mpi2EventDataSasTopologyChangeList_t *);
int mpr_mapping_is_reinit_required(struct mpr_softc *);
void mpr_mapping_free_memory(struct mpr_softc *sc);
int mpr_config_set_dpm_pg0(struct mpr_softc *, Mpi2ConfigReply_t *,
Mpi2DriverMappingPage0_t *, u16 );
void mpr_mapping_exit(struct mpr_softc *);
void mpr_mapping_check_devices(struct mpr_softc *, int);
int mpr_mapping_allocate_memory(struct mpr_softc *sc);
unsigned int mpr_mapping_get_sas_id(struct mpr_softc *, uint64_t , u16);
unsigned int mpr_mapping_get_sas_id_from_handle(struct mpr_softc *sc,
u16 handle);
unsigned int mpr_mapping_get_raid_id(struct mpr_softc *sc, u64 wwid,
u16 handle);
unsigned int mpr_mapping_get_raid_id_from_handle(struct mpr_softc *sc,
u16 volHandle);
void mpr_mapping_enclosure_dev_status_change_event(struct mpr_softc *,
Mpi2EventDataSasEnclDevStatusChange_t *event_data);
void mpr_mapping_ir_config_change_event(struct mpr_softc *sc,
Mpi2EventDataIrConfigChangeList_t *event_data);
void mprsas_evt_handler(struct mpr_softc *sc, uintptr_t data,
MPI2_EVENT_NOTIFICATION_REPLY *event);
void mprsas_prepare_remove(struct mprsas_softc *sassc, uint16_t handle);
void mprsas_prepare_volume_remove(struct mprsas_softc *sassc,
uint16_t handle);
int mprsas_startup(struct mpr_softc *sc);
struct mprsas_target * mprsas_find_target_by_handle(struct mprsas_softc *,
int, uint16_t);
SYSCTL_DECL(_hw_mpr);
/* Compatibility shims for different OS versions */
#if __FreeBSD_version >= 800001
#define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
#define mpr_kproc_exit(arg) kproc_exit(arg)
#else
#define mpr_kproc_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg) \
kthread_create(func, farg, proc_ptr, flags, stackpgs, fmtstr, arg)
#define mpr_kproc_exit(arg) kthread_exit(arg)
#endif
#if defined(CAM_PRIORITY_XPT)
#define MPR_PRIORITY_XPT CAM_PRIORITY_XPT
#else
#define MPR_PRIORITY_XPT 5
#endif
#if __FreeBSD_version < 800107
// Prior to FreeBSD-8.0 scp3_flags was not defined.
#define spc3_flags reserved
#define SPC3_SID_PROTECT 0x01
#define SPC3_SID_3PC 0x08
#define SPC3_SID_TPGS_MASK 0x30
#define SPC3_SID_TPGS_IMPLICIT 0x10
#define SPC3_SID_TPGS_EXPLICIT 0x20
#define SPC3_SID_ACC 0x40
#define SPC3_SID_SCCS 0x80
#define CAM_PRIORITY_NORMAL CAM_PRIORITY_NONE
#endif
#endif

1
sys/i386/conf/GENERIC
View File

@ -119,6 +119,7 @@ device isp # Qlogic family
#device ispfw # Firmware for QLogic HBAs- normally a module
device mpt # LSI-Logic MPT-Fusion
device mps # LSI-Logic MPT-Fusion 2
device mpr # LSI-Logic MPT-Fusion 3
#device ncr # NCR/Symbios Logic
device sym # NCR/Symbios Logic (newer chipsets + those of `ncr')
device trm # Tekram DC395U/UW/F DC315U adapters

2
sys/i386/conf/XEN
View File

@ -7,7 +7,7 @@ cpu I686_CPU
ident XEN
makeoptions DEBUG=-g
makeoptions WITHOUT_MODULES="aha ahb amd ctl cxgb dpt drm drm2 hptnr hptmv ida malo mps mwl rdma sound sym trm xfs"
makeoptions WITHOUT_MODULES="aha ahb amd ctl cxgb dpt drm drm2 hptnr hptmv ida malo mpr mps mwl rdma sound sym trm xfs"
options SCHED_ULE # ULE scheduler
options PREEMPTION # Enable kernel thread preemption

2
sys/ia64/conf/GENERIC
View File

@ -94,6 +94,8 @@ device ahd # AHA39320/29320 and AIC79xx devices
device hptiop # Highpoint RocketRaid 3xxx series
device isp # Qlogic family
device mpt # LSI-Logic MPT-Fusion
device mps # LSI-Logic MPT-Fusion 2
device mpr # LSI-Logic MPT-Fusion 3
device sym # NCR/Symbios Logic
# RAID controllers interfaced to the SCSI subsystem

1
sys/mips/conf/OCTEON1
View File

@ -129,6 +129,7 @@ device isp # Qlogic family
#device ispfw # Firmware for QLogic HBAs- normally a module
device mpt # LSI-Logic MPT-Fusion
device mps # LSI-Logic MPT-Fusion 2
device mpr # LSI-Logic MPT-Fusion 3
#device ncr # NCR/Symbios Logic
device trm # Tekram DC395U/UW/F DC315U adapters

1
sys/modules/Makefile
View File

@ -215,6 +215,7 @@ SUBDIR= \
${_mly} \
mmc \
mmcsd \
mpr \
mps \
mpt \
mqueue \

18
sys/modules/mpr/Makefile Normal file
View File

@ -0,0 +1,18 @@
# $FreeBSD$
.PATH: ${.CURDIR}/../../dev/mpr
KMOD= mpr
SRCS= mpr_pci.c mpr.c mpr_sas.c mpr_table.c mpr_user.c
SRCS+= mpr_config.c mpr_mapping.c mpr_sas_lsi.c
SRCS+= opt_cam.h opt_compat.h
SRCS+= device_if.h bus_if.h pci_if.h
#CFLAGS += -DMPR_DEBUG
.include <bsd.kmod.mk>
CWARNFLAGS.mpr_sas.c= ${NO_WUNNEEDED_INTERNAL_DECL}
# XXX Work around clang warning, until maintainer approves fix.
CWARNFLAGS.mpr_mapping.c= ${NO_WSOMETIMES_UNINITIALIZED}
CWARNFLAGS+= ${CWARNFLAGS.${.IMPSRC:T}}

1
sys/sparc64/conf/GENERIC
View File

@ -109,6 +109,7 @@ device isp # Qlogic family
device ispfw # Firmware module for Qlogic host adapters
device mpt # LSI-Logic MPT-Fusion
device mps # LSI-Logic MPT-Fusion 2
device mpr # LSI-Logic MPT-Fusion 3
device sym # NCR/Symbios/LSI Logic 53C8XX/53C1010/53C1510D
# ATA/SCSI peripherals