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Tweak the imx debug console code so that it works with multiple SoCs.

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Instead of hard-coding the uart register addresses for the imx51, use
a variable that defaults to the imx51 address.  When debugging another
imx-family SoC, the variable can be set early in initarm() to provide
full console/printf support for debugging early boot.
This commit is contained in:
Ian Lepore 2013-08-03 13:31:10 +00:00
parent 006afc9b5c
commit 992a44320c
1 changed files with 32 additions and 19 deletions
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51
sys/arm/freescale/imx/console.c
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@ -41,46 +41,57 @@ __FBSDID("$FreeBSD$");
/* Allow it to be predefined, to be able to use another UART for console */
#ifndef IMX_UART_BASE
#define IMX_UART_BASE 0xe3fbc000 /* UART1 */
#define IMX_UART_BASE 0xe3fbc000 /* imx51 UART1 */
#endif
#define IMX_RXD (u_int32_t *)(IMX_UART_BASE + 0x00)
#define IMX_TXD (u_int32_t *)(IMX_UART_BASE + 0x40)
#define IMX_RXD 0x00
#define IMX_TXD 0x40
#define IMX_UFCR (u_int32_t *)(IMX_UART_BASE + 0x90)
#define IMX_USR1 (u_int32_t *)(IMX_UART_BASE + 0x94)
#define IMX_UFCR 0x90
#define IMX_USR1 0x94
#define IMX_USR1_TRDY (1 << 13)
#define IMX_USR2 (u_int32_t *)(IMX_UART_BASE + 0x98)
#define IMX_USR2 0x98
#define IMX_USR2_RDR (1 << 0)
#define IMX_USR2_TXFE (1 << 14)
#define IMX_USR2_TXDC (1 << 3)
#define IMX_UTS (u_int32_t *)(IMX_UART_BASE + 0xb4)
#define IMX_UTS 0xb4
#define IMX_UTS_TXFULL (1 << 4)
/*
* The base address of the uart registers.
*
* This is global so that it can be changed on the fly from the outside. For
* example, set imx_uart_base=physaddr and then call cninit() as the first two
* lines of initarm() and enjoy printf() availability through the tricky bits of
* startup. After initarm() switches from physical to virtual addressing, just
* set imx_uart_base=virtaddr and printf keeps working.
*/
uint32_t imx_uart_base = IMX_UART_BASE;
/*
* uart related funcs
*/
static u_int32_t
uart_getreg(u_int32_t *bas)
static uint32_t
ub_getreg(uint32_t off)
{
return *((volatile u_int32_t *)(bas)) & 0xff;
return *((volatile uint32_t *)(imx_uart_base + off));
}
static void
uart_setreg(u_int32_t *bas, u_int32_t val)
ub_setreg(uint32_t off, uint32_t val)
{
*((volatile u_int32_t *)(bas)) = (u_int32_t)val;
*((volatile uint32_t *)(imx_uart_base + off)) = val;
}
static int
ub_tstc(void)
{
return ((uart_getreg(IMX_USR2) & IMX_USR2_RDR) ? 1 : 0);
return ((ub_getreg(IMX_USR2) & IMX_USR2_RDR) ? 1 : 0);
}
static int
@ -90,7 +101,7 @@ ub_getc(void)
while (!ub_tstc());
__asm __volatile("nop");
return (uart_getreg(IMX_RXD) & 0xff);
return (ub_getreg(IMX_RXD) & 0xff);
}
static void
@ -100,10 +111,10 @@ ub_putc(unsigned char c)
if (c == '\n')
ub_putc('\r');
while (uart_getreg(IMX_UTS) & IMX_UTS_TXFULL)
while (ub_getreg(IMX_UTS) & IMX_UTS_TXFULL)
__asm __volatile("nop");
uart_setreg(IMX_TXD, c);
ub_setreg(IMX_TXD, c);
}
static cn_probe_t uart_cnprobe;
@ -138,17 +149,19 @@ uart_cnprobe(struct consdev *cp)
static void
uart_cninit(struct consdev *cp)
{
uart_setreg(IMX_UFCR, 0x00004210);
/* Init fifo trigger levels to 32 bytes, refclock div to 2. */
ub_setreg(IMX_UFCR, 0x00004210);
}
void
static void
uart_cnputc(struct consdev *cp, int c)
{
ub_putc(c);
}
int
static int
uart_cngetc(struct consdev * cp)
{