From 9931ba85e39f87eb2d87b50ab05d635fc2a460ac Mon Sep 17 00:00:00 2001 From: Pyun YongHyeon Date: Thu, 27 Oct 2011 21:27:37 +0000 Subject: [PATCH] Rename hard-coded value 1 << 14 with BGE_RX_CPU_DRV_EVENT. This bit(SW event 7 in publicly available data sheet) is used to make RX CPU handle a firmware command and the bit is automatically cleared after RX CPU completed the command. Generally firmware command takes the following steps. 1. Write BGE_SRAM_FW_CMD_MB with a command. 2. Write BGE_SRAM_FW_CMD_LEN_MB with the length of the command in bytes. 3. Write BGE_SRAM_FW_CMD_DATA_MB with actual command data. 4. Generate BGE_RX_CPU_EVENT and let firmware handle the command. 5. Wait for the ACK of the firmware command. No functional changes. --- sys/dev/bge/if_bge.c | 8 +++++--- sys/dev/bge/if_bgereg.h | 2 ++ 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/sys/dev/bge/if_bge.c b/sys/dev/bge/if_bge.c index 13c9c1f6eb38..77b4a69a3d8e 100644 --- a/sys/dev/bge/if_bge.c +++ b/sys/dev/bge/if_bge.c @@ -1370,10 +1370,11 @@ bge_stop_fw(struct bge_softc *sc) if (sc->bge_asf_mode) { bge_writemem_ind(sc, BGE_SRAM_FW_CMD_MB, BGE_FW_CMD_PAUSE); CSR_WRITE_4(sc, BGE_RX_CPU_EVENT, - CSR_READ_4(sc, BGE_RX_CPU_EVENT) | (1 << 14)); + CSR_READ_4(sc, BGE_RX_CPU_EVENT) | BGE_RX_CPU_DRV_EVENT); for (i = 0; i < 100; i++ ) { - if (!(CSR_READ_4(sc, BGE_RX_CPU_EVENT) & (1 << 14))) + if (!(CSR_READ_4(sc, BGE_RX_CPU_EVENT) & + BGE_RX_CPU_DRV_EVENT)) break; DELAY(10); } @@ -4111,7 +4112,8 @@ bge_asf_driver_up(struct bge_softc *sc) bge_writemem_ind(sc, BGE_SRAM_FW_CMD_LEN_MB, 4); bge_writemem_ind(sc, BGE_SRAM_FW_CMD_DATA_MB, 3); CSR_WRITE_4(sc, BGE_RX_CPU_EVENT, - CSR_READ_4(sc, BGE_RX_CPU_EVENT) | (1 << 14)); + CSR_READ_4(sc, BGE_RX_CPU_EVENT) | + BGE_RX_CPU_DRV_EVENT); } } } diff --git a/sys/dev/bge/if_bgereg.h b/sys/dev/bge/if_bgereg.h index 4962a4c0d6a5..c46ba3ef1cc1 100644 --- a/sys/dev/bge/if_bgereg.h +++ b/sys/dev/bge/if_bgereg.h @@ -1901,6 +1901,8 @@ #define BGE_EE_DELAY 0x6848 #define BGE_FASTBOOT_PC 0x6894 +#define BGE_RX_CPU_DRV_EVENT 0x00004000 + /* * NVRAM Control registers */