Add 40 microseconds delay after updating EMAC Mode register as

recommended by Broadcom data sheet.
This commit is contained in:
Pyun YongHyeon 2012-10-05 06:24:22 +00:00
parent 3aec794146
commit 9b80ffe78f

View File

@ -957,6 +957,7 @@ bge_miibus_statchg(device_t dev)
mac_mode |= BGE_MACMODE_HALF_DUPLEX;
CSR_WRITE_4(sc, BGE_MAC_MODE, mac_mode);
DELAY(40);
CSR_WRITE_4(sc, BGE_TX_MODE, tx_mode);
CSR_WRITE_4(sc, BGE_RX_MODE, rx_mode);
}
@ -1434,6 +1435,7 @@ bge_chipinit(struct bge_softc *sc)
/* Clear the MAC control register */
CSR_WRITE_4(sc, BGE_MAC_MODE, 0);
DELAY(40);
/*
* Clear the MAC statistics block in the NIC's
@ -2046,6 +2048,7 @@ bge_blockinit(struct bge_softc *sc)
/* Turn on DMA, clear stats */
CSR_WRITE_4(sc, BGE_MAC_MODE, val);
DELAY(40);
/* Set misc. local control, enable interrupts on attentions */
CSR_WRITE_4(sc, BGE_MISC_LOCAL_CTL, BGE_MLC_INTR_ONATTN);
@ -3752,6 +3755,7 @@ bge_reset(struct bge_softc *sc)
BGE_SETBIT(sc, BGE_MODE_CTL, BGE_MODECTL_STACKUP);
CSR_WRITE_4(sc, BGE_MAC_MODE, 0);
DELAY(40);
/*
* The 5704 in TBI mode apparently needs some special
@ -5148,6 +5152,7 @@ bge_ifmedia_upd_locked(struct ifnet *ifp)
BGE_SETBIT(sc, BGE_MAC_MODE,
BGE_MACMODE_HALF_DUPLEX);
}
DELAY(40);
break;
default:
return (EINVAL);
@ -5623,9 +5628,11 @@ bge_link_upd(struct bge_softc *sc)
if (status & BGE_MACSTAT_TBI_PCS_SYNCHED) {
if (!sc->bge_link) {
sc->bge_link++;
if (sc->bge_asicrev == BGE_ASICREV_BCM5704)
if (sc->bge_asicrev == BGE_ASICREV_BCM5704) {
BGE_CLRBIT(sc, BGE_MAC_MODE,
BGE_MACMODE_TBI_SEND_CFGS);
DELAY(40);
}
CSR_WRITE_4(sc, BGE_MAC_STS, 0xFFFFFFFF);
if (bootverbose)
if_printf(sc->bge_ifp, "link UP\n");