From 9be4bbbb21b3d3ba9d002ce7dc52fb212ffc0a77 Mon Sep 17 00:00:00 2001 From: Konstantin Belousov Date: Mon, 21 May 2018 21:07:13 +0000 Subject: [PATCH] Add definition for Intel Speculative Store Bypass Disable MSR bits Security: CVE-2018-3639 Sponsored by: The FreeBSD Foundation MFC after: 3 days --- sys/x86/include/specialreg.h | 3 +++ sys/x86/x86/identcpu.c | 1 + 2 files changed, 4 insertions(+) diff --git a/sys/x86/include/specialreg.h b/sys/x86/include/specialreg.h index 30f580f0d3d1..0ea6e61e652e 100644 --- a/sys/x86/include/specialreg.h +++ b/sys/x86/include/specialreg.h @@ -428,10 +428,12 @@ #define CPUID_STDEXT3_IBPB 0x04000000 #define CPUID_STDEXT3_STIBP 0x08000000 #define CPUID_STDEXT3_ARCH_CAP 0x20000000 +#define CPUID_STDEXT3_SSBD 0x80000000 /* MSR IA32_ARCH_CAP(ABILITIES) bits */ #define IA32_ARCH_CAP_RDCL_NO 0x00000001 #define IA32_ARCH_CAP_IBRS_ALL 0x00000002 +#define IA32_ARCH_CAP_SSBD_NO 0x00000004 /* * CPUID manufacturers identifiers @@ -704,6 +706,7 @@ /* MSR IA32_SPEC_CTRL */ #define IA32_SPEC_CTRL_IBRS 0x00000001 #define IA32_SPEC_CTRL_STIBP 0x00000002 +#define IA32_SPEC_CTRL_SSBD 0x00000004 /* MSR IA32_PRED_CMD */ #define IA32_PRED_CMD_IBPB_BARRIER 0x0000000000000001ULL diff --git a/sys/x86/x86/identcpu.c b/sys/x86/x86/identcpu.c index b336157afada..ccde9e759b5c 100644 --- a/sys/x86/x86/identcpu.c +++ b/sys/x86/x86/identcpu.c @@ -990,6 +990,7 @@ printcpuinfo(void) "\033IBPB" "\034STIBP" "\036ARCH_CAP" + "\040SSBD" ); }